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[NFC][Msan] Add llvm.fabs test 

llvm.fabs does not need a special handler as llvm.abs as its
single argument type match the return type.
This commit is contained in:
Vitaly Buka 2020-09-29 15:31:25 -07:00
parent 616c68aab7
commit 795d94fdb9
1 changed files with 21 additions and 4 deletions
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25
llvm/test/Instrumentation/MemorySanitizer/abs-vector.ll
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@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -S -msan-check-access-address=0 -passes=msan 2>&1 | FileCheck %s
; RUN: opt < %s -S -msan-check-access-address=0 -msan | FileCheck %s
; RUN: opt < %s -S -msan-check-access-address=0 -msan-track-origins=2 -passes=msan 2>&1 | FileCheck %s --check-prefixes=CHECK,ORIGIN
; RUN: opt < %s -S -msan-check-access-address=0 -msan-track-origins=2 -msan | FileCheck %s --check-prefixes=CHECK,ORIGIN
; RUN: opt %s -S -msan-check-access-address=0 -passes=msan 2>&1 | FileCheck %s
; RUN: opt %s -S -msan-check-access-address=0 -msan | FileCheck %s
; RUN: opt %s -S -msan-check-access-address=0 -msan-track-origins=2 -passes=msan 2>&1 | FileCheck %s --check-prefixes=CHECK,ORIGIN
; RUN: opt %s -S -msan-check-access-address=0 -msan-track-origins=2 -msan | FileCheck %s --check-prefixes=CHECK,ORIGIN
target datalayout = "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ -73,9 +73,26 @@ entry:
ret <4 x i64> %2
}
define <4 x double> @test_fabs(<4 x double> %a) local_unnamed_addr #0 {
; CHECK-LABEL: @test_fabs(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = load <4 x i64>, <4 x i64>* bitcast ([100 x i64]* @__msan_param_tls to <4 x i64>*), align 8
; ORIGIN-NEXT: [[TMP1:%.*]] = load i32, i32* getelementptr inbounds ([200 x i32], [200 x i32]* @__msan_param_origin_tls, i32 0, i32 0), align 4
; CHECK: call void @llvm.donothing()
; CHECK-NEXT: [[TMP2:%.*]] = tail call <4 x double> @llvm.fabs.v4f64(<4 x double> [[A:%.*]])
; CHECK-NEXT: store <4 x i64> [[TMP0]], <4 x i64>* bitcast ([100 x i64]* @__msan_retval_tls to <4 x i64>*), align 8
; ORIGIN-NEXT: store i32 [[TMP1]], i32* @__msan_retval_origin_tls, align 4
; CHECK: ret <4 x double> [[TMP2]]
;
entry:
%0 = tail call <4 x double> @llvm.fabs.v4f64(<4 x double> %a)
ret <4 x double> %0
}
declare <32 x i8> @llvm.abs.v32i8(<32 x i8>, i1 immarg) #1
declare <16 x i16> @llvm.abs.v16i16(<16 x i16>, i1 immarg) #1
declare <8 x i32> @llvm.abs.v8i32(<8 x i32>, i1 immarg) #1
declare <4 x double> @llvm.fabs.v4f64(<4 x double>) #1
attributes #0 = { nounwind readnone sanitize_memory }
attributes #1 = { nounwind readnone speculatable willreturn }