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[X86] AVX512: Only allow k1-k7 as predicates to vpcmp* 

As destination k0 is allowed but not as predicate/writemask.

I also modified the test to allow checking of error messages by the assembler.
I applied a similar approach to the test ret.s in the same directory.

llvm-svn: 212504
This commit is contained in:
Adam Nemet 2014-07-08 00:22:32 +00:00
parent 07435c4775
commit 79580db918
2 changed files with 12 additions and 8 deletions
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14
llvm/lib/Target/X86/X86InstrAVX512.td
View File

@ -873,7 +873,7 @@ def : Pat<(v8i1 (X86pcmpeqm (v8i32 VR256X:$src1), (v8i32 VR256X:$src2))),
(v16i32 (SUBREG_TO_REG (i32 0), VR256X:$src1, sub_ymm)),
(v16i32 (SUBREG_TO_REG (i32 0), VR256X:$src2, sub_ymm))), VK8)>;
multiclass avx512_icmp_cc<bits<8> opc, RegisterClass KRC,
multiclass avx512_icmp_cc<bits<8> opc, RegisterClass WMRC, RegisterClass KRC,
RegisterClass RC, X86MemOperand x86memop, PatFrag memop_frag,
SDNode OpNode, ValueType vt, Operand CC, string Suffix> {
def rri : AVX512AIi8<opc, MRMSrcReg,
@ -896,7 +896,7 @@ multiclass avx512_icmp_cc<bits<8> opc, RegisterClass KRC,
"\t{$cc, $src2, $src1, $dst|$dst, $src1, $src2, $cc}"),
[], IIC_SSE_ALU_F32P_RR>, EVEX_4V;
def rrik_alt : AVX512AIi8<opc, MRMSrcReg,
(outs KRC:$dst), (ins KRC:$mask, RC:$src1, RC:$src2, i8imm:$cc),
(outs KRC:$dst), (ins WMRC:$mask, RC:$src1, RC:$src2, i8imm:$cc),
!strconcat("vpcmp", Suffix,
"\t{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc}"),
[], IIC_SSE_ALU_F32P_RR>, EVEX_4V, EVEX_K;
@ -906,24 +906,24 @@ multiclass avx512_icmp_cc<bits<8> opc, RegisterClass KRC,
"\t{$cc, $src2, $src1, $dst|$dst, $src1, $src2, $cc}"),
[], IIC_SSE_ALU_F32P_RM>, EVEX_4V;
def rmik_alt : AVX512AIi8<opc, MRMSrcMem,
(outs KRC:$dst), (ins KRC:$mask, RC:$src1, x86memop:$src2, i8imm:$cc),
(outs KRC:$dst), (ins WMRC:$mask, RC:$src1, x86memop:$src2, i8imm:$cc),
!strconcat("vpcmp", Suffix,
"\t{$cc, $src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2, $cc}"),
[], IIC_SSE_ALU_F32P_RM>, EVEX_4V, EVEX_K;
}
}
defm VPCMPDZ : avx512_icmp_cc<0x1F, VK16, VR512, i512mem, memopv16i32,
defm VPCMPDZ : avx512_icmp_cc<0x1F, VK16WM, VK16, VR512, i512mem, memopv16i32,
X86cmpm, v16i32, AVXCC, "d">,
EVEX_V512, EVEX_CD8<32, CD8VF>;
defm VPCMPUDZ : avx512_icmp_cc<0x1E, VK16, VR512, i512mem, memopv16i32,
defm VPCMPUDZ : avx512_icmp_cc<0x1E, VK16WM, VK16, VR512, i512mem, memopv16i32,
X86cmpmu, v16i32, AVXCC, "ud">,
EVEX_V512, EVEX_CD8<32, CD8VF>;
defm VPCMPQZ : avx512_icmp_cc<0x1F, VK8, VR512, i512mem, memopv8i64,
defm VPCMPQZ : avx512_icmp_cc<0x1F, VK8WM, VK8, VR512, i512mem, memopv8i64,
X86cmpm, v8i64, AVXCC, "q">,
VEX_W, EVEX_V512, EVEX_CD8<64, CD8VF>;
defm VPCMPUQZ : avx512_icmp_cc<0x1E, VK8, VR512, i512mem, memopv8i64,
defm VPCMPUQZ : avx512_icmp_cc<0x1E, VK8WM, VK8, VR512, i512mem, memopv8i64,
X86cmpmu, v8i64, AVXCC, "uq">,
VEX_W, EVEX_V512, EVEX_CD8<64, CD8VF>;

6
llvm/test/MC/X86/avx512-encodings.s
View File

@ -1,4 +1,5 @@
// RUN: llvm-mc -triple x86_64-unknown-unknown -mcpu=knl --show-encoding %s | FileCheck %s
// RUN: not llvm-mc -triple x86_64-unknown-unknown -mcpu=knl --show-encoding %s 2> %t.err | FileCheck %s
// RUN: FileCheck --check-prefix=ERR < %t.err %s
// CHECK: vaddpd %zmm6, %zmm27, %zmm8
// CHECK: encoding: [0x62,0x71,0xa5,0x40,0x58,0xc6]
@ -3200,6 +3201,9 @@ vpcmpd $1, %zmm24, %zmm7, %k5{%k4}
// CHECK: encoding: [0x62,0xf3,0xf5,0x47,0x1e,0x72,0x01,0x02]
vpcmpuq $2, 0x40(%rdx), %zmm17, %k6{%k7}
// ERR: invalid operand for instruction
vpcmpd $1, %zmm24, %zmm7, %k5{%k0}
// CHECK: vpermi2d
// CHECK: encoding: [0x62,0x42,0x6d,0x4b,0x76,0xd6]
vpermi2d %zmm14, %zmm2, %zmm26 {%k3}