forked from OSchip/llvm-project
Stop special-casing annul and predict bits (which are Sparc-specific anyway)
since those bits are now hard-coded in Sparc*.td files. llvm-svn: 7593
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@ -53,9 +53,7 @@ void CodeEmitterGen::run(std::ostream &o) {
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std::map<std::string, unsigned> OpOrder;
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std::map<std::string, bool> OpContinuous;
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for (unsigned i = 0, e = Vals.size(); i != e; ++i) {
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if (!Vals[i].getPrefix() && !Vals[i].getValue()->isComplete() &&
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// ignore annul and predict bits since no one sets them yet
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Vals[i].getName() != "annul" && Vals[i].getName() != "predict") {
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if (!Vals[i].getPrefix() && !Vals[i].getValue()->isComplete()) {
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// Is the operand continuous? If so, we can just mask and OR it in
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// instead of doing it bit-by-bit, saving a lot in runtime cost.
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const BitsInit *InstInit = BI;
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@ -199,11 +197,6 @@ void CodeEmitterGen::run(std::ostream &o) {
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}
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}
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}
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} else {
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// ignore annul and predict bits since no one sets them yet
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if (Vals[f].getName() == "annul" || Vals[f].getName() == "predict") {
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o << " // found " << Vals[f].getName() << "\n";
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}
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}
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}
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