From 78d69e97cc24ed61167600a117fd42d136a56dbf Mon Sep 17 00:00:00 2001 From: Vedant Kumar Date: Wed, 15 Apr 2020 17:40:26 -0700 Subject: [PATCH] [AArch64CondBrTuning] Ignore debug insts when scanning for NZCV clobbers [10/14] Summary: This fixes several instances in which condbr optimization was missed due to a debug instruction appearing as a bogus NZCV clobber. Reviewers: aemerson, paquette Subscribers: kristof.beyls, hiraditya, jfb, danielkiss, aprantl, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D78264 --- llvm/lib/Target/AArch64/AArch64CondBrTuning.cpp | 16 ++++------------ llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 11 +++++++++++ llvm/lib/Target/AArch64/AArch64InstrInfo.h | 6 ++++++ llvm/test/CodeGen/AArch64/arm64-early-ifcvt.ll | 2 +- .../CodeGen/AArch64/arm64-shrink-wrapping.ll | 4 ++-- llvm/test/CodeGen/AArch64/cond-br-tuning.ll | 2 +- 6 files changed, 25 insertions(+), 16 deletions(-) diff --git a/llvm/lib/Target/AArch64/AArch64CondBrTuning.cpp b/llvm/lib/Target/AArch64/AArch64CondBrTuning.cpp index 25e23e4623de..e90e8e3da057 100644 --- a/llvm/lib/Target/AArch64/AArch64CondBrTuning.cpp +++ b/llvm/lib/Target/AArch64/AArch64CondBrTuning.cpp @@ -194,12 +194,8 @@ bool AArch64CondBrTuning::tryToTuneBranch(MachineInstr &MI, // There must not be any instruction between DefMI and MI that clobbers or // reads NZCV. - MachineBasicBlock::iterator I(DefMI), E(MI); - for (I = std::next(I); I != E; ++I) { - if (I->modifiesRegister(AArch64::NZCV, TRI) || - I->readsRegister(AArch64::NZCV, TRI)) - return false; - } + if (isNZCVTouchedInInstructionRange(DefMI, MI, TRI)) + return false; LLVM_DEBUG(dbgs() << " Replacing instructions:\n "); LLVM_DEBUG(DefMI.print(dbgs())); LLVM_DEBUG(dbgs() << " "); @@ -253,12 +249,8 @@ bool AArch64CondBrTuning::tryToTuneBranch(MachineInstr &MI, return false; // There must not be any instruction between DefMI and MI that clobbers or // reads NZCV. - MachineBasicBlock::iterator I(DefMI), E(MI); - for (I = std::next(I); I != E; ++I) { - if (I->modifiesRegister(AArch64::NZCV, TRI) || - I->readsRegister(AArch64::NZCV, TRI)) - return false; - } + if (isNZCVTouchedInInstructionRange(DefMI, MI, TRI)) + return false; LLVM_DEBUG(dbgs() << " Replacing instructions:\n "); LLVM_DEBUG(DefMI.print(dbgs())); LLVM_DEBUG(dbgs() << " "); diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp index 4a7c3cc13010..aabe4b106de6 100644 --- a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp +++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp @@ -3173,6 +3173,17 @@ void AArch64InstrInfo::loadRegFromStackSlot( MI.addMemOperand(MMO); } +bool llvm::isNZCVTouchedInInstructionRange(const MachineInstr &DefMI, + const MachineInstr &UseMI, + const TargetRegisterInfo *TRI) { + return any_of(instructionsWithoutDebug(std::next(DefMI.getIterator()), + UseMI.getIterator()), + [TRI](const MachineInstr &I) { + return I.modifiesRegister(AArch64::NZCV, TRI) || + I.readsRegister(AArch64::NZCV, TRI); + }); +} + // Helper function to emit a frame offset adjustment from a given // pointer (SrcReg), stored into DestReg. This function is explicit // in that it requires the opcode. diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.h b/llvm/lib/Target/AArch64/AArch64InstrInfo.h index c67a4dadca20..13ef9845ae3d 100644 --- a/llvm/lib/Target/AArch64/AArch64InstrInfo.h +++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.h @@ -316,6 +316,12 @@ private: unsigned findRegisterToSaveLRTo(const outliner::Candidate &C) const; }; +/// Return true if there is an instruction /after/ \p DefMI and before \p UseMI +/// which either reads or clobbers NZCV. +bool isNZCVTouchedInInstructionRange(const MachineInstr &DefMI, + const MachineInstr &UseMI, + const TargetRegisterInfo *TRI); + /// emitFrameOffset - Emit instructions as needed to set DestReg to SrcReg /// plus Offset. This is intended to be used from within the prolog/epilog /// insertion (PEI) pass, where a virtual scratch register may be allocated diff --git a/llvm/test/CodeGen/AArch64/arm64-early-ifcvt.ll b/llvm/test/CodeGen/AArch64/arm64-early-ifcvt.ll index bf5db5058cee..5f5672ec0867 100644 --- a/llvm/test/CodeGen/AArch64/arm64-early-ifcvt.ll +++ b/llvm/test/CodeGen/AArch64/arm64-early-ifcvt.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -stress-early-ifcvt -aarch64-enable-atomic-cfg-tidy=0 | FileCheck %s +; RUN: llc -debugify-and-strip-all-safe < %s -stress-early-ifcvt -aarch64-enable-atomic-cfg-tidy=0 | FileCheck %s target triple = "arm64-apple-macosx" ; CHECK: mm2 diff --git a/llvm/test/CodeGen/AArch64/arm64-shrink-wrapping.ll b/llvm/test/CodeGen/AArch64/arm64-shrink-wrapping.ll index d1089b304a06..68664a35661f 100644 --- a/llvm/test/CodeGen/AArch64/arm64-shrink-wrapping.ll +++ b/llvm/test/CodeGen/AArch64/arm64-shrink-wrapping.ll @@ -1,6 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc %s -o - -mtriple=arm64-apple-ios -enable-shrink-wrap=true -disable-post-ra -frame-pointer=non-leaf | FileCheck %s --check-prefix=ENABLE -; RUN: llc %s -o - -enable-shrink-wrap=false -disable-post-ra -frame-pointer=non-leaf | FileCheck %s --check-prefix=DISABLE +; RUN: llc -debugify-and-strip-all-safe %s -o - -mtriple=arm64-apple-ios -enable-shrink-wrap=true -disable-post-ra -frame-pointer=non-leaf | FileCheck %s --check-prefix=ENABLE +; RUN: llc -debugify-and-strip-all-safe %s -o - -enable-shrink-wrap=false -disable-post-ra -frame-pointer=non-leaf | FileCheck %s --check-prefix=DISABLE target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128" target triple = "arm64-apple-ios" diff --git a/llvm/test/CodeGen/AArch64/cond-br-tuning.ll b/llvm/test/CodeGen/AArch64/cond-br-tuning.ll index d966acbebfdd..e0b6a2f05037 100644 --- a/llvm/test/CodeGen/AArch64/cond-br-tuning.ll +++ b/llvm/test/CodeGen/AArch64/cond-br-tuning.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -O3 -mtriple=aarch64-eabi -verify-machineinstrs | FileCheck %s +; RUN: llc -debugify-and-strip-all-safe < %s -O3 -mtriple=aarch64-eabi -verify-machineinstrs | FileCheck %s target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128" target triple = "aarch64-linaro-linux-gnueabi"