forked from OSchip/llvm-project
parent
85c07d9a93
commit
78bffa5767
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@ -120,7 +120,9 @@ class RAGreedy : public MachineFunctionPass,
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RS_Done
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};
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#ifndef NDEBUG
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static const char *const StageName[];
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#endif
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// RegInfo - Keep additional information about each live range.
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struct RegInfo {
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@ -389,7 +389,6 @@ signed ResourcePriorityQueue::regPressureDelta(SUnit *SU, bool RawPressure) {
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// Constants used to denote relative importance of
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// heuristic components for cost computation.
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static const unsigned PriorityOne = 200;
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static const unsigned PriorityTwo = 100;
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static const unsigned PriorityThree = 50;
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static const unsigned PriorityFour = 15;
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static const unsigned PriorityFive = 5;
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@ -39,8 +39,6 @@
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using namespace llvm;
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const unsigned Hexagon_MAX_RET_SIZE = 64;
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static cl::opt<bool>
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EmitJumpTables("hexagon-emit-jump-tables", cl::init(true), cl::Hidden,
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cl::desc("Control jump table emission on Hexagon target"));
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@ -457,9 +457,7 @@ static SUnit *getSingleUnscheduledSucc(SUnit *SU) {
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// Constants used to denote relative importance of
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// heuristic components for cost computation.
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static const unsigned PriorityOne = 200;
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static const unsigned PriorityTwo = 100;
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static const unsigned PriorityThree = 50;
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static const unsigned PriorityFour = 20;
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static const unsigned ScaleTwo = 10;
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static const unsigned FactorOne = 2;
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@ -2224,8 +2224,6 @@ static bool CC_MipsO32_FP64(unsigned ValNo, MVT ValVT,
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// Call Calling Convention Implementation
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//===----------------------------------------------------------------------===//
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static const unsigned O32IntRegsSize = 4;
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// Return next O32 integer argument register.
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static unsigned getNextIntArgReg(unsigned Reg) {
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assert((Reg == Mips::A0) || (Reg == Mips::A2));
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