forked from OSchip/llvm-project
Before implementing copyfromreg, we'll implement copytoreg correctly.
This gets us this for the previous testcase: _test: lis r2, 0 ori r3, r2, 65535 blr Note that we actually write to r3 (the return reg) correctly now :) llvm-svn: 22933
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cc3035e989
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78b200eb74
llvm/lib/CodeGen/SelectionDAG
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@ -36,14 +36,16 @@ namespace {
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MachineBasicBlock *BB;
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const TargetMachine &TM;
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const TargetInstrInfo &TII;
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const MRegisterInfo &MRI;
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SSARegMap *RegMap;
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std::map<SDNode *, unsigned> EmittedOps;
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public:
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SimpleSched(SelectionDAG &D, MachineBasicBlock *bb)
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: DAG(D), BB(bb), TM(D.getTarget()), TII(*TM.getInstrInfo()),
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RegMap(BB->getParent()->getSSARegMap()) {
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MRI(*TM.getRegisterInfo()), RegMap(BB->getParent()->getSSARegMap()) {
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assert(&TII && "Target doesn't provide instr info?");
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assert(&MRI && "Target doesn't provide register info?");
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}
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void Run() {
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@ -131,7 +133,9 @@ unsigned SimpleSched::Emit(SDOperand Op) {
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case ISD::EntryToken: break;
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case ISD::CopyToReg: {
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unsigned Val = Emit(Op.getOperand(2));
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// FIXME: DO THE COPY NOW.
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MRI.copyRegToReg(*BB, BB->end(),
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cast<RegisterSDNode>(Op.getOperand(1))->getReg(), Val,
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RegMap->getRegClass(Val));
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break;
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}
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}
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