forked from OSchip/llvm-project
Refactor uses of getRegisterNumbering() to not need the isSPVFP argument. Check
if the register is a member of the SPR register class directly instead. llvm-svn: 114012
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@ -1356,8 +1356,8 @@ void ARMCodeEmitter::emitMiscBranchInstruction(const MachineInstr &MI) {
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static unsigned encodeVFPRd(const MachineInstr &MI, unsigned OpIdx) {
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unsigned RegD = MI.getOperand(OpIdx).getReg();
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unsigned Binary = 0;
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bool isSPVFP = false;
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RegD = ARMRegisterInfo::getRegisterNumbering(RegD, &isSPVFP);
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bool isSPVFP = ARM::SPRRegisterClass->contains(RegD);
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RegD = ARMRegisterInfo::getRegisterNumbering(RegD);
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if (!isSPVFP)
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Binary |= RegD << ARMII::RegRdShift;
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else {
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@ -1370,8 +1370,8 @@ static unsigned encodeVFPRd(const MachineInstr &MI, unsigned OpIdx) {
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static unsigned encodeVFPRn(const MachineInstr &MI, unsigned OpIdx) {
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unsigned RegN = MI.getOperand(OpIdx).getReg();
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unsigned Binary = 0;
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bool isSPVFP = false;
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RegN = ARMRegisterInfo::getRegisterNumbering(RegN, &isSPVFP);
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bool isSPVFP = ARM::SPRRegisterClass->contains(RegN);
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RegN = ARMRegisterInfo::getRegisterNumbering(RegN);
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if (!isSPVFP)
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Binary |= RegN << ARMII::RegRnShift;
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else {
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@ -1384,8 +1384,8 @@ static unsigned encodeVFPRn(const MachineInstr &MI, unsigned OpIdx) {
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static unsigned encodeVFPRm(const MachineInstr &MI, unsigned OpIdx) {
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unsigned RegM = MI.getOperand(OpIdx).getReg();
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unsigned Binary = 0;
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bool isSPVFP = false;
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RegM = ARMRegisterInfo::getRegisterNumbering(RegM, &isSPVFP);
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bool isSPVFP = ARM::SPRRegisterClass->contains(RegM);
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RegM = ARMRegisterInfo::getRegisterNumbering(RegM);
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if (!isSPVFP)
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Binary |= RegM;
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else {
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