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[CodeGenModule] Assume dso_local for -fpic -fno-semantic-interposition 

Summary:
Clang -fpic defaults to -fno-semantic-interposition (GCC -fpic defaults
to -fsemantic-interposition).
Users need to specify -fsemantic-interposition to get semantic
interposition behavior.

Semantic interposition is currently a best-effort feature. There may
still be some cases where it is not handled well.

Reviewers: peter.smith, rnk, serge-sans-paille, sfertile, jfb, jdoerfert

Subscribers: dschuff, jyknight, dylanmckay, nemanjai, jvesely, kbarton, fedor.sergeev, asb, rbar, johnrusso, simoncook, sabuasal, niosHD, jrtc27, zzheng, edward-jones, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, arphaman, PkmX, jocewei, jsji, Jim, lenary, s.egerton, pzheng, sameer.abuasal, apazos, luismarques, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D73865
This commit is contained in:
Fangrui Song 2020-02-02 12:23:47 -08:00
parent 1cc4f8d172
commit 789a46f2d7
459 changed files with 3878 additions and 3878 deletions
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4
clang/lib/CodeGen/CodeGenModule.cpp
View File

@ -846,7 +846,7 @@ static bool shouldAssumeDSOLocal(const CodeGenModule &CGM,
const auto &CGOpts = CGM.getCodeGenOpts();
llvm::Reloc::Model RM = CGOpts.RelocationModel;
const auto &LOpts = CGM.getLangOpts();
if (RM != llvm::Reloc::Static && !LOpts.PIE)
if (RM != llvm::Reloc::Static && LOpts.SemanticInterposition)
return false;
// A definition cannot be preempted from an executable.
@ -868,7 +868,7 @@ static bool shouldAssumeDSOLocal(const CodeGenModule &CGM,
// If we can use copy relocations we can assume it is local.
if (auto *Var = dyn_cast<llvm::GlobalVariable>(GV))
if (!Var->isThreadLocal() &&
(RM == llvm::Reloc::Static || CGOpts.PIECopyRelocations))
(RM == llvm::Reloc::Static || (LOpts.PIE && CGOpts.PIECopyRelocations)))
return true;
// If we can use a plt entry as the symbol address we can assume it

4
clang/test/CXX/expr/p10-0x.cpp
View File

@ -7,7 +7,7 @@ struct S {
volatile int& refcall();
// CHECK: define void @_Z2f1PViPV1S
// CHECK: define dso_local void @_Z2f1PViPV1S
void f1(volatile int *x, volatile S* s) {
// We should perform the load in these cases.
// CHECK: load volatile i32, i32*
@ -36,7 +36,7 @@ void f1(volatile int *x, volatile S* s) {
// CHECK: ret
}
// CHECK: define void @_Z2f2PVi
// CHECK: define dso_local void @_Z2f2PVi
// CHECK-NOT: load volatile
// CHECK: ret
void f2(volatile int *x) {

4
clang/test/CodeGen/2006-05-19-SingleEltReturn.c
View File

@ -23,8 +23,8 @@ struct Y bar() {
}
// X86_32: define void @foo(%struct.Y* %P)
// X86_32: define dso_local void @foo(%struct.Y* %P)
// X86_32: call void @bar(%struct.Y* sret %{{[^),]*}})
// X86_32: define void @bar(%struct.Y* noalias sret %{{[^,)]*}})
// X86_32: define dso_local void @bar(%struct.Y* noalias sret %{{[^,)]*}})
// X86_32: ret void

6
clang/test/CodeGen/2008-07-30-implicit-initialization.c
View File

@ -1,9 +1,9 @@
// RUN: %clang_cc1 -triple i386-unknown-unknown -O2 -emit-llvm -o - %s | FileCheck %s
// CHECK-LABEL: define i32 @f0()
// CHECK-LABEL: define dso_local i32 @f0()
// CHECK: ret i32 0
// CHECK-LABEL: define i32 @f1()
// CHECK-LABEL: define dso_local i32 @f1()
// CHECK: ret i32 0
// CHECK-LABEL: define i32 @f2()
// CHECK-LABEL: define dso_local i32 @f2()
// CHECK: ret i32 0
// <rdar://problem/6113085>

6
clang/test/CodeGen/2008-07-31-promotion-of-compound-pointer-arithmetic.c
View File

@ -1,9 +1,9 @@
// RUN: %clang_cc1 -triple i386-unknown-unknown -O1 -emit-llvm -o - %s | FileCheck %s
// CHECK-LABEL: define i32 @f0
// CHECK-LABEL: define dso_local i32 @f0
// CHECK: ret i32 1
// CHECK-LABEL: define i32 @f1
// CHECK-LABEL: define dso_local i32 @f1
// CHECK: ret i32 1
// CHECK-LABEL: define i32 @f2
// CHECK-LABEL: define dso_local i32 @f2
// CHECK: ret i32 1
// <rdr://6115726>

100
clang/test/CodeGen/3dnow-builtins.c
View File

@ -5,176 +5,176 @@
#include <x86intrin.h>
__m64 test_m_pavgusb(__m64 m1, __m64 m2) {
// PS4-LABEL: define i64 @test_m_pavgusb
// GCC-LABEL: define double @test_m_pavgusb
// PS4-LABEL: define dso_local i64 @test_m_pavgusb
// GCC-LABEL: define dso_local double @test_m_pavgusb
// CHECK: @llvm.x86.3dnow.pavgusb
return _m_pavgusb(m1, m2);
}
__m64 test_m_pf2id(__m64 m) {
// PS4-LABEL: define i64 @test_m_pf2id
// GCC-LABEL: define double @test_m_pf2id
// PS4-LABEL: define dso_local i64 @test_m_pf2id
// GCC-LABEL: define dso_local double @test_m_pf2id
// CHECK: @llvm.x86.3dnow.pf2id
return _m_pf2id(m);
}
__m64 test_m_pfacc(__m64 m1, __m64 m2) {
// PS4-LABEL: define i64 @test_m_pfacc
// GCC-LABEL: define double @test_m_pfacc
// PS4-LABEL: define dso_local i64 @test_m_pfacc
// GCC-LABEL: define dso_local double @test_m_pfacc
// CHECK: @llvm.x86.3dnow.pfacc
return _m_pfacc(m1, m2);
}
__m64 test_m_pfadd(__m64 m1, __m64 m2) {
// PS4-LABEL: define i64 @test_m_pfadd
// GCC-LABEL: define double @test_m_pfadd
// PS4-LABEL: define dso_local i64 @test_m_pfadd
// GCC-LABEL: define dso_local double @test_m_pfadd
// CHECK: @llvm.x86.3dnow.pfadd
return _m_pfadd(m1, m2);
}
__m64 test_m_pfcmpeq(__m64 m1, __m64 m2) {
// PS4-LABEL: define i64 @test_m_pfcmpeq
// GCC-LABEL: define double @test_m_pfcmpeq
// PS4-LABEL: define dso_local i64 @test_m_pfcmpeq
// GCC-LABEL: define dso_local double @test_m_pfcmpeq
// CHECK: @llvm.x86.3dnow.pfcmpeq
return _m_pfcmpeq(m1, m2);
}
__m64 test_m_pfcmpge(__m64 m1, __m64 m2) {
// PS4-LABEL: define i64 @test_m_pfcmpge
// GCC-LABEL: define double @test_m_pfcmpge
// PS4-LABEL: define dso_local i64 @test_m_pfcmpge
// GCC-LABEL: define dso_local double @test_m_pfcmpge
// CHECK: @llvm.x86.3dnow.pfcmpge
return _m_pfcmpge(m1, m2);
}
__m64 test_m_pfcmpgt(__m64 m1, __m64 m2) {
// PS4-LABEL: define i64 @test_m_pfcmpgt
// GCC-LABEL: define double @test_m_pfcmpgt
// PS4-LABEL: define dso_local i64 @test_m_pfcmpgt
// GCC-LABEL: define dso_local double @test_m_pfcmpgt
// CHECK: @llvm.x86.3dnow.pfcmpgt
return _m_pfcmpgt(m1, m2);
}
__m64 test_m_pfmax(__m64 m1, __m64 m2) {
// PS4-LABEL: define i64 @test_m_pfmax
// GCC-LABEL: define double @test_m_pfmax
// PS4-LABEL: define dso_local i64 @test_m_pfmax
// GCC-LABEL: define dso_local double @test_m_pfmax
// CHECK: @llvm.x86.3dnow.pfmax
return _m_pfmax(m1, m2);
}
__m64 test_m_pfmin(__m64 m1, __m64 m2) {
// PS4-LABEL: define i64 @test_m_pfmin
// GCC-LABEL: define double @test_m_pfmin
// PS4-LABEL: define dso_local i64 @test_m_pfmin
// GCC-LABEL: define dso_local double @test_m_pfmin
// CHECK: @llvm.x86.3dnow.pfmin
return _m_pfmin(m1, m2);
}
__m64 test_m_pfmul(__m64 m1, __m64 m2) {
// PS4-LABEL: define i64 @test_m_pfmul
// GCC-LABEL: define double @test_m_pfmul
// PS4-LABEL: define dso_local i64 @test_m_pfmul
// GCC-LABEL: define dso_local double @test_m_pfmul
// CHECK: @llvm.x86.3dnow.pfmul
return _m_pfmul(m1, m2);
}
__m64 test_m_pfrcp(__m64 m) {
// PS4-LABEL: define i64 @test_m_pfrcp
// GCC-LABEL: define double @test_m_pfrcp
// PS4-LABEL: define dso_local i64 @test_m_pfrcp
// GCC-LABEL: define dso_local double @test_m_pfrcp
// CHECK: @llvm.x86.3dnow.pfrcp
return _m_pfrcp(m);
}
__m64 test_m_pfrcpit1(__m64 m1, __m64 m2) {
// PS4-LABEL: define i64 @test_m_pfrcpit1
// GCC-LABEL: define double @test_m_pfrcpit1
// PS4-LABEL: define dso_local i64 @test_m_pfrcpit1
// GCC-LABEL: define dso_local double @test_m_pfrcpit1
// CHECK: @llvm.x86.3dnow.pfrcpit1
return _m_pfrcpit1(m1, m2);
}
__m64 test_m_pfrcpit2(__m64 m1, __m64 m2) {
// PS4-LABEL: define i64 @test_m_pfrcpit2
// GCC-LABEL: define double @test_m_pfrcpit2
// PS4-LABEL: define dso_local i64 @test_m_pfrcpit2
// GCC-LABEL: define dso_local double @test_m_pfrcpit2
// CHECK: @llvm.x86.3dnow.pfrcpit2
return _m_pfrcpit2(m1, m2);
}
__m64 test_m_pfrsqrt(__m64 m) {
// PS4-LABEL: define i64 @test_m_pfrsqrt
// GCC-LABEL: define double @test_m_pfrsqrt
// PS4-LABEL: define dso_local i64 @test_m_pfrsqrt
// GCC-LABEL: define dso_local double @test_m_pfrsqrt
// CHECK: @llvm.x86.3dnow.pfrsqrt
return _m_pfrsqrt(m);
}
__m64 test_m_pfrsqrtit1(__m64 m1, __m64 m2) {
// PS4-LABEL: define i64 @test_m_pfrsqrtit1
// GCC-LABEL: define double @test_m_pfrsqrtit1
// PS4-LABEL: define dso_local i64 @test_m_pfrsqrtit1
// GCC-LABEL: define dso_local double @test_m_pfrsqrtit1
// CHECK: @llvm.x86.3dnow.pfrsqit1
return _m_pfrsqrtit1(m1, m2);
}
__m64 test_m_pfsub(__m64 m1, __m64 m2) {
// PS4-LABEL: define i64 @test_m_pfsub
// GCC-LABEL: define double @test_m_pfsub
// PS4-LABEL: define dso_local i64 @test_m_pfsub
// GCC-LABEL: define dso_local double @test_m_pfsub
// CHECK: @llvm.x86.3dnow.pfsub
return _m_pfsub(m1, m2);
}
__m64 test_m_pfsubr(__m64 m1, __m64 m2) {
// PS4-LABEL: define i64 @test_m_pfsubr
// GCC-LABEL: define double @test_m_pfsubr
// PS4-LABEL: define dso_local i64 @test_m_pfsubr
// GCC-LABEL: define dso_local double @test_m_pfsubr
// CHECK: @llvm.x86.3dnow.pfsubr
return _m_pfsubr(m1, m2);
}
__m64 test_m_pi2fd(__m64 m) {
// PS4-LABEL: define i64 @test_m_pi2fd
// GCC-LABEL: define double @test_m_pi2fd
// PS4-LABEL: define dso_local i64 @test_m_pi2fd
// GCC-LABEL: define dso_local double @test_m_pi2fd
// CHECK: @llvm.x86.3dnow.pi2fd
return _m_pi2fd(m);
}
__m64 test_m_pmulhrw(__m64 m1, __m64 m2) {
// PS4-LABEL: define i64 @test_m_pmulhrw
// GCC-LABEL: define double @test_m_pmulhrw
// PS4-LABEL: define dso_local i64 @test_m_pmulhrw
// GCC-LABEL: define dso_local double @test_m_pmulhrw
// CHECK: @llvm.x86.3dnow.pmulhrw
return _m_pmulhrw(m1, m2);
}
__m64 test_m_pf2iw(__m64 m) {
// PS4-LABEL: define i64 @test_m_pf2iw
// GCC-LABEL: define double @test_m_pf2iw
// PS4-LABEL: define dso_local i64 @test_m_pf2iw
// GCC-LABEL: define dso_local double @test_m_pf2iw
// CHECK: @llvm.x86.3dnowa.pf2iw
return _m_pf2iw(m);
}
__m64 test_m_pfnacc(__m64 m1, __m64 m2) {
// PS4-LABEL: define i64 @test_m_pfnacc
// GCC-LABEL: define double @test_m_pfnacc
// PS4-LABEL: define dso_local i64 @test_m_pfnacc
// GCC-LABEL: define dso_local double @test_m_pfnacc
// CHECK: @llvm.x86.3dnowa.pfnacc
return _m_pfnacc(m1, m2);
}
__m64 test_m_pfpnacc(__m64 m1, __m64 m2) {
// PS4-LABEL: define i64 @test_m_pfpnacc
// GCC-LABEL: define double @test_m_pfpnacc
// PS4-LABEL: define dso_local i64 @test_m_pfpnacc
// GCC-LABEL: define dso_local double @test_m_pfpnacc
// CHECK: @llvm.x86.3dnowa.pfpnacc
return _m_pfpnacc(m1, m2);
}
__m64 test_m_pi2fw(__m64 m) {
// PS4-LABEL: define i64 @test_m_pi2fw
// GCC-LABEL: define double @test_m_pi2fw
// PS4-LABEL: define dso_local i64 @test_m_pi2fw
// GCC-LABEL: define dso_local double @test_m_pi2fw
// CHECK: @llvm.x86.3dnowa.pi2fw
return _m_pi2fw(m);
}
__m64 test_m_pswapdsf(__m64 m) {
// PS4-LABEL: define i64 @test_m_pswapdsf
// GCC-LABEL: define double @test_m_pswapdsf
// PS4-LABEL: define dso_local i64 @test_m_pswapdsf
// GCC-LABEL: define dso_local double @test_m_pswapdsf
// CHECK: @llvm.x86.3dnowa.pswapd
return _m_pswapdsf(m);
}
__m64 test_m_pswapdsi(__m64 m) {
// PS4-LABEL: define i64 @test_m_pswapdsi
// GCC-LABEL: define double @test_m_pswapdsi
// PS4-LABEL: define dso_local i64 @test_m_pswapdsi
// GCC-LABEL: define dso_local double @test_m_pswapdsi
// CHECK: @llvm.x86.3dnowa.pswapd
return _m_pswapdsi(m);
}

2
clang/test/CodeGen/_Bool-conversion.c
View File

@ -1,6 +1,6 @@
// RUN: %clang_cc1 -triple i386 -emit-llvm -O2 -o - %s | FileCheck %s
// CHECK-LABEL: define i32 @f0()
// CHECK-LABEL: define dso_local i32 @f0()
// CHECK: ret i32 1
// CHECK: }

14
clang/test/CodeGen/aapcs-align.cpp
View File

@ -18,7 +18,7 @@ void g0() {
f0(1, s);
f0m(1, 2, 3, 4, 5, s);
}
// CHECK: define void @g0
// CHECK: define dso_local void @g0
// CHECK: call void @f0(i32 1, [2 x i32] [i32 6, i32 7]
// CHECK: call void @f0m(i32 1, i32 2, i32 3, i32 4, i32 5, [2 x i32] [i32 6, i32 7]
// CHECK: declare void @f0(i32, [2 x i32])
@ -36,7 +36,7 @@ void g1() {
f1(1, s);
f1m(1, 2, 3, 4, 5, s);
}
// CHECK: define void @g1
// CHECK: define dso_local void @g1
// CHECK: call void @f1(i32 1, [2 x i32] [i32 6, i32 7]
// CHECK: call void @f1m(i32 1, i32 2, i32 3, i32 4, i32 5, [2 x i32] [i32 6, i32 7]
// CHECK: declare void @f1(i32, [2 x i32])
@ -55,7 +55,7 @@ void g2() {
f2(1, s);
f2m(1, 2, 3, 4, 5, s);
}
// CHECK: define void @g2
// CHECK: define dso_local void @g2
// CHECK: call void @f2(i32 1, [4 x i32] [i32 6, i32 7
// CHECK: call void @f2m(i32 1, i32 2, i32 3, i32 4, i32 5, [4 x i32] [i32 6, i32 7
// CHECK: declare void @f2(i32, [4 x i32])
@ -74,7 +74,7 @@ void g3() {
f3(1, s);
f3m(1, 2, 3, 4, 5, s);
}
// CHECK: define void @g3
// CHECK: define dso_local void @g3
// CHECK: call void @f3(i32 1, [1 x i64] [i64 30064771078]
// CHECK: call void @f3m(i32 1, i32 2, i32 3, i32 4, i32 5, [1 x i64] [i64 30064771078]
// CHECK: declare void @f3(i32, [1 x i64])
@ -94,7 +94,7 @@ void g4() {
f4(1, s);
f4m(1, 2, 3, 4, 5, s);
}
// CHECK: define void @g4
// CHECK: define dso_local void @g4
// CHECK: call void @f4(i32 1, %struct.SF16* nonnull byval(%struct.SF16) align 8
// CHECK: call void @f4m(i32 1, i32 2, i32 3, i32 4, i32 5, %struct.SF16* nonnull byval(%struct.SF16) align 8
// CHECK: declare void @f4(i32, %struct.SF16* byval(%struct.SF16) align 8)
@ -113,7 +113,7 @@ void g5() {
f5(1, s);
f5m(1, 2, 3, 4, 5, s);
}
// CHECK: define void @g5
// CHECK: define dso_local void @g5
// CHECK: call void @f5(i32 1, [3 x i32] [i32 6, i32 7, i32 0])
// CHECK: call void @f5m(i32 1, i32 2, i32 3, i32 4, i32 5, [3 x i32] [i32 6, i32 7, i32 0])
// CHECK: declare void @f5(i32, [3 x i32])
@ -133,7 +133,7 @@ void g6() {
f6(1, s);
f6m(1, 2, 3, 4, 5, s);
}
// CHECK: define void @g6
// CHECK: define dso_local void @g6
// CHECK: call void @f6(i32 1, [4 x i32] [i32 6, i32 7, i32 0, i32 0])
// CHECK: call void @f6m(i32 1, i32 2, i32 3, i32 4, i32 5, [4 x i32] [i32 6, i32 7, i32 0, i32 0])
// CHECK: declare void @f6(i32, [4 x i32])

10
clang/test/CodeGen/aapcs64-align.cpp
View File

@ -17,7 +17,7 @@ void g0() {
f0(1, s);
f0m(1, 2, 3, 4, 5, s);
}
// CHECK: define void @g0
// CHECK: define dso_local void @g0
// CHECK: call void @f0(i64 1, [2 x i64] [i64 6, i64 7]
// CHECK: call void @f0m{{.*}}[2 x i64] [i64 6, i64 7]
// CHECK: declare void @f0(i64, [2 x i64])
@ -35,7 +35,7 @@ void g1() {
f1(1, s);
f1m(1, 2, 3, 4, 5, s);
}
// CHECK: define void @g1
// CHECK: define dso_local void @g1
// CHECK: call void @f1{{.*}}[2 x i64] [i64 6, i64 7]
// CHECK: call void @f1m{{.*}}[2 x i64] [i64 6, i64 7]
// CHECK: declare void @f1(i64, [2 x i64])
@ -54,7 +54,7 @@ void g3() {
f3(1, s);
f3m(1, 2, 3, 4, 5, s);
}
// CHECK: define void @g3
// CHECK: define dso_local void @g3
// CHECK: call void @f3(i64 1, i128 129127208515966861318)
// CHECK: call void @f3m(i64 1, i64 2, i64 3, i64 4, i64 5, i128 129127208515966861318)
// CHECK: declare void @f3(i64, i128)
@ -74,7 +74,7 @@ void g4() {
f4(1, s);
f4m(1, 2, 3, 4, 5, s);
}
// CHECK: define void @g4()
// CHECK: define dso_local void @g4()
// CHECK: call void @f4(i32 1, [2 x i64] [i64 30064771078, i64 0])
// CHECK: void @f4m(i32 1, i32 2, i32 3, i32 4, i32 5, [2 x i64] [i64 30064771078, i64 0])
// CHECK: declare void @f4(i32, [2 x i64])
@ -94,7 +94,7 @@ void f5m(int, int, int, int, int, P16);
f5(1, s);
f5m(1, 2, 3, 4, 5, s);
}
// CHECK: define void @g5()
// CHECK: define dso_local void @g5()
// CHECK: call void @f5(i32 1, [2 x i64] [i64 30064771078, i64 0])
// CHECK: void @f5m(i32 1, i32 2, i32 3, i32 4, i32 5, [2 x i64] [i64 30064771078, i64 0])
// CHECK: declare void @f5(i32, [2 x i64])

20
clang/test/CodeGen/aarch64-args.cpp
View File

@ -16,15 +16,15 @@
struct Empty {};
// CHECK: define i32 @empty_arg(i32 %a)
// CHECK-GNU-C: define i32 @empty_arg(i32 %a)
// CHECK-GNU-CXX: define i32 @empty_arg(i8 %e.coerce, i32 %a)
// CHECK-GNU-C: define dso_local i32 @empty_arg(i32 %a)
// CHECK-GNU-CXX: define dso_local i32 @empty_arg(i8 %e.coerce, i32 %a)
EXTERNC int empty_arg(struct Empty e, int a) {
return a;
}
// CHECK: define void @empty_ret()
// CHECK-GNU-C: define void @empty_ret()
// CHECK-GNU-CXX: define void @empty_ret()
// CHECK-GNU-C: define dso_local void @empty_ret()
// CHECK-GNU-CXX: define dso_local void @empty_ret()
EXTERNC struct Empty empty_ret() {
struct Empty e;
return e;
@ -39,8 +39,8 @@ struct SuperEmpty {
};
// CHECK: define i32 @super_empty_arg(i32 %a)
// CHECK-GNU-C: define i32 @super_empty_arg(i32 %a)
// CHECK-GNU-CXX: define i32 @super_empty_arg(i32 %a)
// CHECK-GNU-C: define dso_local i32 @super_empty_arg(i32 %a)
// CHECK-GNU-CXX: define dso_local i32 @super_empty_arg(i32 %a)
EXTERNC int super_empty_arg(struct SuperEmpty e, int a) {
return a;
}
@ -52,15 +52,15 @@ struct SortOfEmpty {
};
// CHECK: define i32 @sort_of_empty_arg(i32 %a)
// CHECK-GNU-C: define i32 @sort_of_empty_arg(i32 %a)
// CHECK-GNU-CXX: define i32 @sort_of_empty_arg(i8 %e.coerce, i32 %a)
// CHECK-GNU-C: define dso_local i32 @sort_of_empty_arg(i32 %a)
// CHECK-GNU-CXX: define dso_local i32 @sort_of_empty_arg(i8 %e.coerce, i32 %a)
EXTERNC int sort_of_empty_arg(struct Empty e, int a) {
return a;
}
// CHECK: define void @sort_of_empty_ret()
// CHECK-GNU-C: define void @sort_of_empty_ret()
// CHECK-GNU-CXX: define void @sort_of_empty_ret()
// CHECK-GNU-C: define dso_local void @sort_of_empty_ret()
// CHECK-GNU-CXX: define dso_local void @sort_of_empty_ret()
EXTERNC struct SortOfEmpty sort_of_empty_ret() {
struct SortOfEmpty e;
return e;

48
clang/test/CodeGen/aarch64-branch-protection-attr.c
View File

@ -6,63 +6,63 @@
// RUN: | FileCheck %s --check-prefix=CHECK --check-prefix=OVERRIDE
void missing() {}
// NO-OVERRIDE: define void @missing() #[[#NONE:]]
// OVERRIDE: define void @missing() #[[#STD:]]
// NO-OVERRIDE: define dso_local void @missing() #[[#NONE:]]
// OVERRIDE: define dso_local void @missing() #[[#STD:]]
__attribute__ ((target("branch-protection=none")))
void none() {}
// NO-OVERRIDE: define void @none() #[[#NONE]]
// OVERRIDE: define void @none() #[[#NONE:]]
// NO-OVERRIDE: define dso_local void @none() #[[#NONE]]
// OVERRIDE: define dso_local void @none() #[[#NONE:]]
__attribute__ ((target("branch-protection=standard")))
void std() {}
// NO-OVERRIDE: define void @std() #[[#STD:]]
// OVERRIDE: define void @std() #[[#STD]]
// NO-OVERRIDE: define dso_local void @std() #[[#STD:]]
// OVERRIDE: define dso_local void @std() #[[#STD]]
__attribute__ ((target("branch-protection=bti")))
void btionly() {}
// NO-OVERRIDE: define void @btionly() #[[#BTI:]]
// OVERRIDE: define void @btionly() #[[#BTI:]]
// NO-OVERRIDE: define dso_local void @btionly() #[[#BTI:]]
// OVERRIDE: define dso_local void @btionly() #[[#BTI:]]
__attribute__ ((target("branch-protection=pac-ret")))
void paconly() {}
// NO-OVERRIDE: define void @paconly() #[[#PAC:]]
// OVERRIDE: define void @paconly() #[[#PAC:]]
// NO-OVERRIDE: define dso_local void @paconly() #[[#PAC:]]
// OVERRIDE: define dso_local void @paconly() #[[#PAC:]]
__attribute__ ((target("branch-protection=pac-ret+bti")))
void pacbti0() {}
// NO-OVERRIDE: define void @pacbti0() #[[#PACBTI:]]
// OVERRIDE: define void @pacbti0() #[[#PACBTI:]]
// NO-OVERRIDE: define dso_local void @pacbti0() #[[#PACBTI:]]
// OVERRIDE: define dso_local void @pacbti0() #[[#PACBTI:]]
__attribute__ ((target("branch-protection=bti+pac-ret")))
void pacbti1() {}
// NO-OVERRIDE: define void @pacbti1() #[[#PACBTI]]
// OVERRIDE: define void @pacbti1() #[[#PACBTI]]
// NO-OVERRIDE: define dso_local void @pacbti1() #[[#PACBTI]]
// OVERRIDE: define dso_local void @pacbti1() #[[#PACBTI]]
__attribute__ ((target("branch-protection=pac-ret+leaf")))
void leaf() {}
// NO-OVERRIDE: define void @leaf() #[[#PACLEAF:]]
// OVERRIDE: define void @leaf() #[[#PACLEAF:]]
// NO-OVERRIDE: define dso_local void @leaf() #[[#PACLEAF:]]
// OVERRIDE: define dso_local void @leaf() #[[#PACLEAF:]]
__attribute__ ((target("branch-protection=pac-ret+b-key")))
void bkey() {}
// NO-OVERRIDE: define void @bkey() #[[#PACBKEY:]]
// OVERRIDE: define void @bkey() #[[#PACBKEY:]]
// NO-OVERRIDE: define dso_local void @bkey() #[[#PACBKEY:]]
// OVERRIDE: define dso_local void @bkey() #[[#PACBKEY:]]
__attribute__ ((target("branch-protection=pac-ret+b-key+leaf")))
void bkeyleaf0() {}
// NO-OVERRIDE: define void @bkeyleaf0() #[[#PACBKEYLEAF:]]
// OVERRIDE: define void @bkeyleaf0() #[[#PACBKEYLEAF:]]
// NO-OVERRIDE: define dso_local void @bkeyleaf0() #[[#PACBKEYLEAF:]]
// OVERRIDE: define dso_local void @bkeyleaf0() #[[#PACBKEYLEAF:]]
__attribute__ ((target("branch-protection=pac-ret+leaf+b-key")))
void bkeyleaf1() {}
// NO-OVERRIDE: define void @bkeyleaf1() #[[#PACBKEYLEAF]]
// OVERRIDE: define void @bkeyleaf1() #[[#PACBKEYLEAF]]
// NO-OVERRIDE: define dso_local void @bkeyleaf1() #[[#PACBKEYLEAF]]
// OVERRIDE: define dso_local void @bkeyleaf1() #[[#PACBKEYLEAF]]
__attribute__ ((target("branch-protection=pac-ret+leaf+bti")))
void btileaf() {}
// NO-OVERRIDE: define void @btileaf() #[[#BTIPACLEAF:]]
// OVERRIDE: define void @btileaf() #[[#BTIPACLEAF:]]
// NO-OVERRIDE: define dso_local void @btileaf() #[[#BTIPACLEAF:]]
// OVERRIDE: define dso_local void @btileaf() #[[#BTIPACLEAF:]]
// CHECK-DAG: attributes #[[#NONE]]

4
clang/test/CodeGen/aarch64-byval-temp.c
View File

@ -17,7 +17,7 @@ void example() {
pass_large(l);
pass_large(l);
}
// CHECK-O0-LABEL: define void @example(
// CHECK-O0-LABEL: define dso_local void @example(
// The alloca for the struct on the stack.
// CHECK-O0: %[[l:[0-9A-Za-z-]+]] = alloca %struct.large, align 8
// The alloca for the temporary stack space that we use to pass the argument.
@ -42,7 +42,7 @@ void example() {
//
// At O3, we should have lifetime markers to help the optimizer re-use the temporary allocas.
//
// CHECK-O3-LABEL: define void @example(
// CHECK-O3-LABEL: define dso_local void @example(
// The alloca for the struct on the stack.
// CHECK-O3: %[[l:[0-9A-Za-z-]+]] = alloca %struct.large, align 8
// The alloca for the temporary stack space that we use to pass the argument.

160
clang/test/CodeGen/aarch64-neon-3v.c
View File

@ -4,343 +4,343 @@
#include <arm_neon.h>
// CHECK-LABEL: define <8 x i8> @test_vand_s8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vand_s8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK: [[AND_I:%.*]] = and <8 x i8> %a, %b
// CHECK: ret <8 x i8> [[AND_I]]
int8x8_t test_vand_s8(int8x8_t a, int8x8_t b) {
return vand_s8(a, b);
}
// CHECK-LABEL: define <16 x i8> @test_vandq_s8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK-LABEL: define dso_local <16 x i8> @test_vandq_s8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK: [[AND_I:%.*]] = and <16 x i8> %a, %b
// CHECK: ret <16 x i8> [[AND_I]]
int8x16_t test_vandq_s8(int8x16_t a, int8x16_t b) {
return vandq_s8(a, b);
}
// CHECK-LABEL: define <4 x i16> @test_vand_s16(<4 x i16> %a, <4 x i16> %b) #0 {
// CHECK-LABEL: define dso_local <4 x i16> @test_vand_s16(<4 x i16> %a, <4 x i16> %b) #0 {
// CHECK: [[AND_I:%.*]] = and <4 x i16> %a, %b
// CHECK: ret <4 x i16> [[AND_I]]
int16x4_t test_vand_s16(int16x4_t a, int16x4_t b) {
return vand_s16(a, b);
}
// CHECK-LABEL: define <8 x i16> @test_vandq_s16(<8 x i16> %a, <8 x i16> %b) #1 {
// CHECK-LABEL: define dso_local <8 x i16> @test_vandq_s16(<8 x i16> %a, <8 x i16> %b) #1 {
// CHECK: [[AND_I:%.*]] = and <8 x i16> %a, %b
// CHECK: ret <8 x i16> [[AND_I]]
int16x8_t test_vandq_s16(int16x8_t a, int16x8_t b) {
return vandq_s16(a, b);
}
// CHECK-LABEL: define <2 x i32> @test_vand_s32(<2 x i32> %a, <2 x i32> %b) #0 {
// CHECK-LABEL: define dso_local <2 x i32> @test_vand_s32(<2 x i32> %a, <2 x i32> %b) #0 {
// CHECK: [[AND_I:%.*]] = and <2 x i32> %a, %b
// CHECK: ret <2 x i32> [[AND_I]]
int32x2_t test_vand_s32(int32x2_t a, int32x2_t b) {
return vand_s32(a, b);
}
// CHECK-LABEL: define <4 x i32> @test_vandq_s32(<4 x i32> %a, <4 x i32> %b) #1 {
// CHECK-LABEL: define dso_local <4 x i32> @test_vandq_s32(<4 x i32> %a, <4 x i32> %b) #1 {
// CHECK: [[AND_I:%.*]] = and <4 x i32> %a, %b
// CHECK: ret <4 x i32> [[AND_I]]
int32x4_t test_vandq_s32(int32x4_t a, int32x4_t b) {
return vandq_s32(a, b);
}
// CHECK-LABEL: define <1 x i64> @test_vand_s64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK-LABEL: define dso_local <1 x i64> @test_vand_s64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK: [[AND_I:%.*]] = and <1 x i64> %a, %b
// CHECK: ret <1 x i64> [[AND_I]]
int64x1_t test_vand_s64(int64x1_t a, int64x1_t b) {
return vand_s64(a, b);
}
// CHECK-LABEL: define <2 x i64> @test_vandq_s64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK-LABEL: define dso_local <2 x i64> @test_vandq_s64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[AND_I:%.*]] = and <2 x i64> %a, %b
// CHECK: ret <2 x i64> [[AND_I]]
int64x2_t test_vandq_s64(int64x2_t a, int64x2_t b) {
return vandq_s64(a, b);
}
// CHECK-LABEL: define <8 x i8> @test_vand_u8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vand_u8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK: [[AND_I:%.*]] = and <8 x i8> %a, %b
// CHECK: ret <8 x i8> [[AND_I]]
uint8x8_t test_vand_u8(uint8x8_t a, uint8x8_t b) {
return vand_u8(a, b);
}
// CHECK-LABEL: define <16 x i8> @test_vandq_u8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK-LABEL: define dso_local <16 x i8> @test_vandq_u8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK: [[AND_I:%.*]] = and <16 x i8> %a, %b
// CHECK: ret <16 x i8> [[AND_I]]
uint8x16_t test_vandq_u8(uint8x16_t a, uint8x16_t b) {
return vandq_u8(a, b);
}
// CHECK-LABEL: define <4 x i16> @test_vand_u16(<4 x i16> %a, <4 x i16> %b) #0 {
// CHECK-LABEL: define dso_local <4 x i16> @test_vand_u16(<4 x i16> %a, <4 x i16> %b) #0 {
// CHECK: [[AND_I:%.*]] = and <4 x i16> %a, %b
// CHECK: ret <4 x i16> [[AND_I]]
uint16x4_t test_vand_u16(uint16x4_t a, uint16x4_t b) {
return vand_u16(a, b);
}
// CHECK-LABEL: define <8 x i16> @test_vandq_u16(<8 x i16> %a, <8 x i16> %b) #1 {
// CHECK-LABEL: define dso_local <8 x i16> @test_vandq_u16(<8 x i16> %a, <8 x i16> %b) #1 {
// CHECK: [[AND_I:%.*]] = and <8 x i16> %a, %b
// CHECK: ret <8 x i16> [[AND_I]]
uint16x8_t test_vandq_u16(uint16x8_t a, uint16x8_t b) {
return vandq_u16(a, b);
}
// CHECK-LABEL: define <2 x i32> @test_vand_u32(<2 x i32> %a, <2 x i32> %b) #0 {
// CHECK-LABEL: define dso_local <2 x i32> @test_vand_u32(<2 x i32> %a, <2 x i32> %b) #0 {
// CHECK: [[AND_I:%.*]] = and <2 x i32> %a, %b
// CHECK: ret <2 x i32> [[AND_I]]
uint32x2_t test_vand_u32(uint32x2_t a, uint32x2_t b) {
return vand_u32(a, b);
}
// CHECK-LABEL: define <4 x i32> @test_vandq_u32(<4 x i32> %a, <4 x i32> %b) #1 {
// CHECK-LABEL: define dso_local <4 x i32> @test_vandq_u32(<4 x i32> %a, <4 x i32> %b) #1 {
// CHECK: [[AND_I:%.*]] = and <4 x i32> %a, %b
// CHECK: ret <4 x i32> [[AND_I]]
uint32x4_t test_vandq_u32(uint32x4_t a, uint32x4_t b) {
return vandq_u32(a, b);
}
// CHECK-LABEL: define <1 x i64> @test_vand_u64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK-LABEL: define dso_local <1 x i64> @test_vand_u64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK: [[AND_I:%.*]] = and <1 x i64> %a, %b
// CHECK: ret <1 x i64> [[AND_I]]
uint64x1_t test_vand_u64(uint64x1_t a, uint64x1_t b) {
return vand_u64(a, b);
}
// CHECK-LABEL: define <2 x i64> @test_vandq_u64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK-LABEL: define dso_local <2 x i64> @test_vandq_u64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[AND_I:%.*]] = and <2 x i64> %a, %b
// CHECK: ret <2 x i64> [[AND_I]]
uint64x2_t test_vandq_u64(uint64x2_t a, uint64x2_t b) {
return vandq_u64(a, b);
}
// CHECK-LABEL: define <8 x i8> @test_vorr_s8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vorr_s8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK: [[OR_I:%.*]] = or <8 x i8> %a, %b
// CHECK: ret <8 x i8> [[OR_I]]
int8x8_t test_vorr_s8(int8x8_t a, int8x8_t b) {
return vorr_s8(a, b);
}
// CHECK-LABEL: define <16 x i8> @test_vorrq_s8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK-LABEL: define dso_local <16 x i8> @test_vorrq_s8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK: [[OR_I:%.*]] = or <16 x i8> %a, %b
// CHECK: ret <16 x i8> [[OR_I]]
int8x16_t test_vorrq_s8(int8x16_t a, int8x16_t b) {
return vorrq_s8(a, b);
}
// CHECK-LABEL: define <4 x i16> @test_vorr_s16(<4 x i16> %a, <4 x i16> %b) #0 {
// CHECK-LABEL: define dso_local <4 x i16> @test_vorr_s16(<4 x i16> %a, <4 x i16> %b) #0 {
// CHECK: [[OR_I:%.*]] = or <4 x i16> %a, %b
// CHECK: ret <4 x i16> [[OR_I]]
int16x4_t test_vorr_s16(int16x4_t a, int16x4_t b) {
return vorr_s16(a, b);
}
// CHECK-LABEL: define <8 x i16> @test_vorrq_s16(<8 x i16> %a, <8 x i16> %b) #1 {
// CHECK-LABEL: define dso_local <8 x i16> @test_vorrq_s16(<8 x i16> %a, <8 x i16> %b) #1 {
// CHECK: [[OR_I:%.*]] = or <8 x i16> %a, %b
// CHECK: ret <8 x i16> [[OR_I]]
int16x8_t test_vorrq_s16(int16x8_t a, int16x8_t b) {
return vorrq_s16(a, b);
}
// CHECK-LABEL: define <2 x i32> @test_vorr_s32(<2 x i32> %a, <2 x i32> %b) #0 {
// CHECK-LABEL: define dso_local <2 x i32> @test_vorr_s32(<2 x i32> %a, <2 x i32> %b) #0 {
// CHECK: [[OR_I:%.*]] = or <2 x i32> %a, %b
// CHECK: ret <2 x i32> [[OR_I]]
int32x2_t test_vorr_s32(int32x2_t a, int32x2_t b) {
return vorr_s32(a, b);
}
// CHECK-LABEL: define <4 x i32> @test_vorrq_s32(<4 x i32> %a, <4 x i32> %b) #1 {
// CHECK-LABEL: define dso_local <4 x i32> @test_vorrq_s32(<4 x i32> %a, <4 x i32> %b) #1 {
// CHECK: [[OR_I:%.*]] = or <4 x i32> %a, %b
// CHECK: ret <4 x i32> [[OR_I]]
int32x4_t test_vorrq_s32(int32x4_t a, int32x4_t b) {
return vorrq_s32(a, b);
}
// CHECK-LABEL: define <1 x i64> @test_vorr_s64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK-LABEL: define dso_local <1 x i64> @test_vorr_s64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK: [[OR_I:%.*]] = or <1 x i64> %a, %b
// CHECK: ret <1 x i64> [[OR_I]]
int64x1_t test_vorr_s64(int64x1_t a, int64x1_t b) {
return vorr_s64(a, b);
}
// CHECK-LABEL: define <2 x i64> @test_vorrq_s64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK-LABEL: define dso_local <2 x i64> @test_vorrq_s64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[OR_I:%.*]] = or <2 x i64> %a, %b
// CHECK: ret <2 x i64> [[OR_I]]
int64x2_t test_vorrq_s64(int64x2_t a, int64x2_t b) {
return vorrq_s64(a, b);
}
// CHECK-LABEL: define <8 x i8> @test_vorr_u8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vorr_u8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK: [[OR_I:%.*]] = or <8 x i8> %a, %b
// CHECK: ret <8 x i8> [[OR_I]]
uint8x8_t test_vorr_u8(uint8x8_t a, uint8x8_t b) {
return vorr_u8(a, b);
}
// CHECK-LABEL: define <16 x i8> @test_vorrq_u8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK-LABEL: define dso_local <16 x i8> @test_vorrq_u8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK: [[OR_I:%.*]] = or <16 x i8> %a, %b
// CHECK: ret <16 x i8> [[OR_I]]
uint8x16_t test_vorrq_u8(uint8x16_t a, uint8x16_t b) {
return vorrq_u8(a, b);
}
// CHECK-LABEL: define <4 x i16> @test_vorr_u16(<4 x i16> %a, <4 x i16> %b) #0 {
// CHECK-LABEL: define dso_local <4 x i16> @test_vorr_u16(<4 x i16> %a, <4 x i16> %b) #0 {
// CHECK: [[OR_I:%.*]] = or <4 x i16> %a, %b
// CHECK: ret <4 x i16> [[OR_I]]
uint16x4_t test_vorr_u16(uint16x4_t a, uint16x4_t b) {
return vorr_u16(a, b);
}
// CHECK-LABEL: define <8 x i16> @test_vorrq_u16(<8 x i16> %a, <8 x i16> %b) #1 {
// CHECK-LABEL: define dso_local <8 x i16> @test_vorrq_u16(<8 x i16> %a, <8 x i16> %b) #1 {
// CHECK: [[OR_I:%.*]] = or <8 x i16> %a, %b
// CHECK: ret <8 x i16> [[OR_I]]
uint16x8_t test_vorrq_u16(uint16x8_t a, uint16x8_t b) {
return vorrq_u16(a, b);
}
// CHECK-LABEL: define <2 x i32> @test_vorr_u32(<2 x i32> %a, <2 x i32> %b) #0 {
// CHECK-LABEL: define dso_local <2 x i32> @test_vorr_u32(<2 x i32> %a, <2 x i32> %b) #0 {
// CHECK: [[OR_I:%.*]] = or <2 x i32> %a, %b
// CHECK: ret <2 x i32> [[OR_I]]
uint32x2_t test_vorr_u32(uint32x2_t a, uint32x2_t b) {
return vorr_u32(a, b);
}
// CHECK-LABEL: define <4 x i32> @test_vorrq_u32(<4 x i32> %a, <4 x i32> %b) #1 {
// CHECK-LABEL: define dso_local <4 x i32> @test_vorrq_u32(<4 x i32> %a, <4 x i32> %b) #1 {
// CHECK: [[OR_I:%.*]] = or <4 x i32> %a, %b
// CHECK: ret <4 x i32> [[OR_I]]
uint32x4_t test_vorrq_u32(uint32x4_t a, uint32x4_t b) {
return vorrq_u32(a, b);
}
// CHECK-LABEL: define <1 x i64> @test_vorr_u64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK-LABEL: define dso_local <1 x i64> @test_vorr_u64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK: [[OR_I:%.*]] = or <1 x i64> %a, %b
// CHECK: ret <1 x i64> [[OR_I]]
uint64x1_t test_vorr_u64(uint64x1_t a, uint64x1_t b) {
return vorr_u64(a, b);
}
// CHECK-LABEL: define <2 x i64> @test_vorrq_u64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK-LABEL: define dso_local <2 x i64> @test_vorrq_u64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[OR_I:%.*]] = or <2 x i64> %a, %b
// CHECK: ret <2 x i64> [[OR_I]]
uint64x2_t test_vorrq_u64(uint64x2_t a, uint64x2_t b) {
return vorrq_u64(a, b);
}
// CHECK-LABEL: define <8 x i8> @test_veor_s8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_veor_s8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK: [[XOR_I:%.*]] = xor <8 x i8> %a, %b
// CHECK: ret <8 x i8> [[XOR_I]]
int8x8_t test_veor_s8(int8x8_t a, int8x8_t b) {
return veor_s8(a, b);
}
// CHECK-LABEL: define <16 x i8> @test_veorq_s8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK-LABEL: define dso_local <16 x i8> @test_veorq_s8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK: [[XOR_I:%.*]] = xor <16 x i8> %a, %b
// CHECK: ret <16 x i8> [[XOR_I]]
int8x16_t test_veorq_s8(int8x16_t a, int8x16_t b) {
return veorq_s8(a, b);
}
// CHECK-LABEL: define <4 x i16> @test_veor_s16(<4 x i16> %a, <4 x i16> %b) #0 {
// CHECK-LABEL: define dso_local <4 x i16> @test_veor_s16(<4 x i16> %a, <4 x i16> %b) #0 {
// CHECK: [[XOR_I:%.*]] = xor <4 x i16> %a, %b
// CHECK: ret <4 x i16> [[XOR_I]]
int16x4_t test_veor_s16(int16x4_t a, int16x4_t b) {
return veor_s16(a, b);
}
// CHECK-LABEL: define <8 x i16> @test_veorq_s16(<8 x i16> %a, <8 x i16> %b) #1 {
// CHECK-LABEL: define dso_local <8 x i16> @test_veorq_s16(<8 x i16> %a, <8 x i16> %b) #1 {
// CHECK: [[XOR_I:%.*]] = xor <8 x i16> %a, %b
// CHECK: ret <8 x i16> [[XOR_I]]
int16x8_t test_veorq_s16(int16x8_t a, int16x8_t b) {
return veorq_s16(a, b);
}
// CHECK-LABEL: define <2 x i32> @test_veor_s32(<2 x i32> %a, <2 x i32> %b) #0 {
// CHECK-LABEL: define dso_local <2 x i32> @test_veor_s32(<2 x i32> %a, <2 x i32> %b) #0 {
// CHECK: [[XOR_I:%.*]] = xor <2 x i32> %a, %b
// CHECK: ret <2 x i32> [[XOR_I]]
int32x2_t test_veor_s32(int32x2_t a, int32x2_t b) {
return veor_s32(a, b);
}
// CHECK-LABEL: define <4 x i32> @test_veorq_s32(<4 x i32> %a, <4 x i32> %b) #1 {
// CHECK-LABEL: define dso_local <4 x i32> @test_veorq_s32(<4 x i32> %a, <4 x i32> %b) #1 {
// CHECK: [[XOR_I:%.*]] = xor <4 x i32> %a, %b
// CHECK: ret <4 x i32> [[XOR_I]]
int32x4_t test_veorq_s32(int32x4_t a, int32x4_t b) {
return veorq_s32(a, b);
}
// CHECK-LABEL: define <1 x i64> @test_veor_s64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK-LABEL: define dso_local <1 x i64> @test_veor_s64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK: [[XOR_I:%.*]] = xor <1 x i64> %a, %b
// CHECK: ret <1 x i64> [[XOR_I]]
int64x1_t test_veor_s64(int64x1_t a, int64x1_t b) {
return veor_s64(a, b);
}
// CHECK-LABEL: define <2 x i64> @test_veorq_s64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK-LABEL: define dso_local <2 x i64> @test_veorq_s64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[XOR_I:%.*]] = xor <2 x i64> %a, %b
// CHECK: ret <2 x i64> [[XOR_I]]
int64x2_t test_veorq_s64(int64x2_t a, int64x2_t b) {
return veorq_s64(a, b);
}
// CHECK-LABEL: define <8 x i8> @test_veor_u8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_veor_u8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK: [[XOR_I:%.*]] = xor <8 x i8> %a, %b
// CHECK: ret <8 x i8> [[XOR_I]]
uint8x8_t test_veor_u8(uint8x8_t a, uint8x8_t b) {
return veor_u8(a, b);
}
// CHECK-LABEL: define <16 x i8> @test_veorq_u8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK-LABEL: define dso_local <16 x i8> @test_veorq_u8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK: [[XOR_I:%.*]] = xor <16 x i8> %a, %b
// CHECK: ret <16 x i8> [[XOR_I]]
uint8x16_t test_veorq_u8(uint8x16_t a, uint8x16_t b) {
return veorq_u8(a, b);
}
// CHECK-LABEL: define <4 x i16> @test_veor_u16(<4 x i16> %a, <4 x i16> %b) #0 {
// CHECK-LABEL: define dso_local <4 x i16> @test_veor_u16(<4 x i16> %a, <4 x i16> %b) #0 {
// CHECK: [[XOR_I:%.*]] = xor <4 x i16> %a, %b
// CHECK: ret <4 x i16> [[XOR_I]]
uint16x4_t test_veor_u16(uint16x4_t a, uint16x4_t b) {
return veor_u16(a, b);
}
// CHECK-LABEL: define <8 x i16> @test_veorq_u16(<8 x i16> %a, <8 x i16> %b) #1 {
// CHECK-LABEL: define dso_local <8 x i16> @test_veorq_u16(<8 x i16> %a, <8 x i16> %b) #1 {
// CHECK: [[XOR_I:%.*]] = xor <8 x i16> %a, %b
// CHECK: ret <8 x i16> [[XOR_I]]
uint16x8_t test_veorq_u16(uint16x8_t a, uint16x8_t b) {
return veorq_u16(a, b);
}
// CHECK-LABEL: define <2 x i32> @test_veor_u32(<2 x i32> %a, <2 x i32> %b) #0 {
// CHECK-LABEL: define dso_local <2 x i32> @test_veor_u32(<2 x i32> %a, <2 x i32> %b) #0 {
// CHECK: [[XOR_I:%.*]] = xor <2 x i32> %a, %b
// CHECK: ret <2 x i32> [[XOR_I]]
uint32x2_t test_veor_u32(uint32x2_t a, uint32x2_t b) {
return veor_u32(a, b);
}
// CHECK-LABEL: define <4 x i32> @test_veorq_u32(<4 x i32> %a, <4 x i32> %b) #1 {
// CHECK-LABEL: define dso_local <4 x i32> @test_veorq_u32(<4 x i32> %a, <4 x i32> %b) #1 {
// CHECK: [[XOR_I:%.*]] = xor <4 x i32> %a, %b
// CHECK: ret <4 x i32> [[XOR_I]]
uint32x4_t test_veorq_u32(uint32x4_t a, uint32x4_t b) {
return veorq_u32(a, b);
}
// CHECK-LABEL: define <1 x i64> @test_veor_u64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK-LABEL: define dso_local <1 x i64> @test_veor_u64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK: [[XOR_I:%.*]] = xor <1 x i64> %a, %b
// CHECK: ret <1 x i64> [[XOR_I]]
uint64x1_t test_veor_u64(uint64x1_t a, uint64x1_t b) {
return veor_u64(a, b);
}
// CHECK-LABEL: define <2 x i64> @test_veorq_u64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK-LABEL: define dso_local <2 x i64> @test_veorq_u64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[XOR_I:%.*]] = xor <2 x i64> %a, %b
// CHECK: ret <2 x i64> [[XOR_I]]
uint64x2_t test_veorq_u64(uint64x2_t a, uint64x2_t b) {
return veorq_u64(a, b);
}
// CHECK-LABEL: define <8 x i8> @test_vbic_s8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vbic_s8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK: [[NEG_I:%.*]] = xor <8 x i8> %b, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
// CHECK: [[AND_I:%.*]] = and <8 x i8> %a, [[NEG_I]]
// CHECK: ret <8 x i8> [[AND_I]]
@ -348,7 +348,7 @@ int8x8_t test_vbic_s8(int8x8_t a, int8x8_t b) {
return vbic_s8(a, b);
}
// CHECK-LABEL: define <16 x i8> @test_vbicq_s8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK-LABEL: define dso_local <16 x i8> @test_vbicq_s8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK: [[NEG_I:%.*]] = xor <16 x i8> %b, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
// CHECK: [[AND_I:%.*]] = and <16 x i8> %a, [[NEG_I]]
// CHECK: ret <16 x i8> [[AND_I]]
@ -356,7 +356,7 @@ int8x16_t test_vbicq_s8(int8x16_t a, int8x16_t b) {
return vbicq_s8(a, b);
}
// CHECK-LABEL: define <4 x i16> @test_vbic_s16(<4 x i16> %a, <4 x i16> %b) #0 {
// CHECK-LABEL: define dso_local <4 x i16> @test_vbic_s16(<4 x i16> %a, <4 x i16> %b) #0 {
// CHECK: [[NEG_I:%.*]] = xor <4 x i16> %b, <i16 -1, i16 -1, i16 -1, i16 -1>
// CHECK: [[AND_I:%.*]] = and <4 x i16> %a, [[NEG_I]]
// CHECK: ret <4 x i16> [[AND_I]]
@ -364,7 +364,7 @@ int16x4_t test_vbic_s16(int16x4_t a, int16x4_t b) {
return vbic_s16(a, b);
}
// CHECK-LABEL: define <8 x i16> @test_vbicq_s16(<8 x i16> %a, <8 x i16> %b) #1 {
// CHECK-LABEL: define dso_local <8 x i16> @test_vbicq_s16(<8 x i16> %a, <8 x i16> %b) #1 {
// CHECK: [[NEG_I:%.*]] = xor <8 x i16> %b, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
// CHECK: [[AND_I:%.*]] = and <8 x i16> %a, [[NEG_I]]
// CHECK: ret <8 x i16> [[AND_I]]
@ -372,7 +372,7 @@ int16x8_t test_vbicq_s16(int16x8_t a, int16x8_t b) {
return vbicq_s16(a, b);
}
// CHECK-LABEL: define <2 x i32> @test_vbic_s32(<2 x i32> %a, <2 x i32> %b) #0 {
// CHECK-LABEL: define dso_local <2 x i32> @test_vbic_s32(<2 x i32> %a, <2 x i32> %b) #0 {
// CHECK: [[NEG_I:%.*]] = xor <2 x i32> %b, <i32 -1, i32 -1>
// CHECK: [[AND_I:%.*]] = and <2 x i32> %a, [[NEG_I]]
// CHECK: ret <2 x i32> [[AND_I]]
@ -380,7 +380,7 @@ int32x2_t test_vbic_s32(int32x2_t a, int32x2_t b) {
return vbic_s32(a, b);
}
// CHECK-LABEL: define <4 x i32> @test_vbicq_s32(<4 x i32> %a, <4 x i32> %b) #1 {
// CHECK-LABEL: define dso_local <4 x i32> @test_vbicq_s32(<4 x i32> %a, <4 x i32> %b) #1 {
// CHECK: [[NEG_I:%.*]] = xor <4 x i32> %b, <i32 -1, i32 -1, i32 -1, i32 -1>
// CHECK: [[AND_I:%.*]] = and <4 x i32> %a, [[NEG_I]]
// CHECK: ret <4 x i32> [[AND_I]]
@ -388,7 +388,7 @@ int32x4_t test_vbicq_s32(int32x4_t a, int32x4_t b) {
return vbicq_s32(a, b);
}
// CHECK-LABEL: define <1 x i64> @test_vbic_s64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK-LABEL: define dso_local <1 x i64> @test_vbic_s64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK: [[NEG_I:%.*]] = xor <1 x i64> %b, <i64 -1>
// CHECK: [[AND_I:%.*]] = and <1 x i64> %a, [[NEG_I]]
// CHECK: ret <1 x i64> [[AND_I]]
@ -396,7 +396,7 @@ int64x1_t test_vbic_s64(int64x1_t a, int64x1_t b) {
return vbic_s64(a, b);
}
// CHECK-LABEL: define <2 x i64> @test_vbicq_s64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK-LABEL: define dso_local <2 x i64> @test_vbicq_s64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[NEG_I:%.*]] = xor <2 x i64> %b, <i64 -1, i64 -1>
// CHECK: [[AND_I:%.*]] = and <2 x i64> %a, [[NEG_I]]
// CHECK: ret <2 x i64> [[AND_I]]
@ -404,7 +404,7 @@ int64x2_t test_vbicq_s64(int64x2_t a, int64x2_t b) {
return vbicq_s64(a, b);
}
// CHECK-LABEL: define <8 x i8> @test_vbic_u8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vbic_u8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK: [[NEG_I:%.*]] = xor <8 x i8> %b, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
// CHECK: [[AND_I:%.*]] = and <8 x i8> %a, [[NEG_I]]
// CHECK: ret <8 x i8> [[AND_I]]
@ -412,7 +412,7 @@ uint8x8_t test_vbic_u8(uint8x8_t a, uint8x8_t b) {
return vbic_u8(a, b);
}
// CHECK-LABEL: define <16 x i8> @test_vbicq_u8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK-LABEL: define dso_local <16 x i8> @test_vbicq_u8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK: [[NEG_I:%.*]] = xor <16 x i8> %b, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
// CHECK: [[AND_I:%.*]] = and <16 x i8> %a, [[NEG_I]]
// CHECK: ret <16 x i8> [[AND_I]]
@ -420,7 +420,7 @@ uint8x16_t test_vbicq_u8(uint8x16_t a, uint8x16_t b) {
return vbicq_u8(a, b);
}
// CHECK-LABEL: define <4 x i16> @test_vbic_u16(<4 x i16> %a, <4 x i16> %b) #0 {
// CHECK-LABEL: define dso_local <4 x i16> @test_vbic_u16(<4 x i16> %a, <4 x i16> %b) #0 {
// CHECK: [[NEG_I:%.*]] = xor <4 x i16> %b, <i16 -1, i16 -1, i16 -1, i16 -1>
// CHECK: [[AND_I:%.*]] = and <4 x i16> %a, [[NEG_I]]
// CHECK: ret <4 x i16> [[AND_I]]
@ -428,7 +428,7 @@ uint16x4_t test_vbic_u16(uint16x4_t a, uint16x4_t b) {
return vbic_u16(a, b);
}
// CHECK-LABEL: define <8 x i16> @test_vbicq_u16(<8 x i16> %a, <8 x i16> %b) #1 {
// CHECK-LABEL: define dso_local <8 x i16> @test_vbicq_u16(<8 x i16> %a, <8 x i16> %b) #1 {
// CHECK: [[NEG_I:%.*]] = xor <8 x i16> %b, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
// CHECK: [[AND_I:%.*]] = and <8 x i16> %a, [[NEG_I]]
// CHECK: ret <8 x i16> [[AND_I]]
@ -436,7 +436,7 @@ uint16x8_t test_vbicq_u16(uint16x8_t a, uint16x8_t b) {
return vbicq_u16(a, b);
}
// CHECK-LABEL: define <2 x i32> @test_vbic_u32(<2 x i32> %a, <2 x i32> %b) #0 {
// CHECK-LABEL: define dso_local <2 x i32> @test_vbic_u32(<2 x i32> %a, <2 x i32> %b) #0 {
// CHECK: [[NEG_I:%.*]] = xor <2 x i32> %b, <i32 -1, i32 -1>
// CHECK: [[AND_I:%.*]] = and <2 x i32> %a, [[NEG_I]]
// CHECK: ret <2 x i32> [[AND_I]]
@ -444,7 +444,7 @@ uint32x2_t test_vbic_u32(uint32x2_t a, uint32x2_t b) {
return vbic_u32(a, b);
}
// CHECK-LABEL: define <4 x i32> @test_vbicq_u32(<4 x i32> %a, <4 x i32> %b) #1 {
// CHECK-LABEL: define dso_local <4 x i32> @test_vbicq_u32(<4 x i32> %a, <4 x i32> %b) #1 {
// CHECK: [[NEG_I:%.*]] = xor <4 x i32> %b, <i32 -1, i32 -1, i32 -1, i32 -1>
// CHECK: [[AND_I:%.*]] = and <4 x i32> %a, [[NEG_I]]
// CHECK: ret <4 x i32> [[AND_I]]
@ -452,7 +452,7 @@ uint32x4_t test_vbicq_u32(uint32x4_t a, uint32x4_t b) {
return vbicq_u32(a, b);
}
// CHECK-LABEL: define <1 x i64> @test_vbic_u64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK-LABEL: define dso_local <1 x i64> @test_vbic_u64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK: [[NEG_I:%.*]] = xor <1 x i64> %b, <i64 -1>
// CHECK: [[AND_I:%.*]] = and <1 x i64> %a, [[NEG_I]]
// CHECK: ret <1 x i64> [[AND_I]]
@ -460,7 +460,7 @@ uint64x1_t test_vbic_u64(uint64x1_t a, uint64x1_t b) {
return vbic_u64(a, b);
}
// CHECK-LABEL: define <2 x i64> @test_vbicq_u64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK-LABEL: define dso_local <2 x i64> @test_vbicq_u64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[NEG_I:%.*]] = xor <2 x i64> %b, <i64 -1, i64 -1>
// CHECK: [[AND_I:%.*]] = and <2 x i64> %a, [[NEG_I]]
// CHECK: ret <2 x i64> [[AND_I]]
@ -468,7 +468,7 @@ uint64x2_t test_vbicq_u64(uint64x2_t a, uint64x2_t b) {
return vbicq_u64(a, b);
}
// CHECK-LABEL: define <8 x i8> @test_vorn_s8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vorn_s8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK: [[NEG_I:%.*]] = xor <8 x i8> %b, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
// CHECK: [[OR_I:%.*]] = or <8 x i8> %a, [[NEG_I]]
// CHECK: ret <8 x i8> [[OR_I]]
@ -476,7 +476,7 @@ int8x8_t test_vorn_s8(int8x8_t a, int8x8_t b) {
return vorn_s8(a, b);
}
// CHECK-LABEL: define <16 x i8> @test_vornq_s8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK-LABEL: define dso_local <16 x i8> @test_vornq_s8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK: [[NEG_I:%.*]] = xor <16 x i8> %b, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
// CHECK: [[OR_I:%.*]] = or <16 x i8> %a, [[NEG_I]]
// CHECK: ret <16 x i8> [[OR_I]]
@ -484,7 +484,7 @@ int8x16_t test_vornq_s8(int8x16_t a, int8x16_t b) {
return vornq_s8(a, b);
}
// CHECK-LABEL: define <4 x i16> @test_vorn_s16(<4 x i16> %a, <4 x i16> %b) #0 {
// CHECK-LABEL: define dso_local <4 x i16> @test_vorn_s16(<4 x i16> %a, <4 x i16> %b) #0 {
// CHECK: [[NEG_I:%.*]] = xor <4 x i16> %b, <i16 -1, i16 -1, i16 -1, i16 -1>
// CHECK: [[OR_I:%.*]] = or <4 x i16> %a, [[NEG_I]]
// CHECK: ret <4 x i16> [[OR_I]]
@ -492,7 +492,7 @@ int16x4_t test_vorn_s16(int16x4_t a, int16x4_t b) {
return vorn_s16(a, b);
}
// CHECK-LABEL: define <8 x i16> @test_vornq_s16(<8 x i16> %a, <8 x i16> %b) #1 {
// CHECK-LABEL: define dso_local <8 x i16> @test_vornq_s16(<8 x i16> %a, <8 x i16> %b) #1 {
// CHECK: [[NEG_I:%.*]] = xor <8 x i16> %b, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
// CHECK: [[OR_I:%.*]] = or <8 x i16> %a, [[NEG_I]]
// CHECK: ret <8 x i16> [[OR_I]]
@ -500,7 +500,7 @@ int16x8_t test_vornq_s16(int16x8_t a, int16x8_t b) {
return vornq_s16(a, b);
}
// CHECK-LABEL: define <2 x i32> @test_vorn_s32(<2 x i32> %a, <2 x i32> %b) #0 {
// CHECK-LABEL: define dso_local <2 x i32> @test_vorn_s32(<2 x i32> %a, <2 x i32> %b) #0 {
// CHECK: [[NEG_I:%.*]] = xor <2 x i32> %b, <i32 -1, i32 -1>
// CHECK: [[OR_I:%.*]] = or <2 x i32> %a, [[NEG_I]]
// CHECK: ret <2 x i32> [[OR_I]]
@ -508,7 +508,7 @@ int32x2_t test_vorn_s32(int32x2_t a, int32x2_t b) {
return vorn_s32(a, b);
}
// CHECK-LABEL: define <4 x i32> @test_vornq_s32(<4 x i32> %a, <4 x i32> %b) #1 {
// CHECK-LABEL: define dso_local <4 x i32> @test_vornq_s32(<4 x i32> %a, <4 x i32> %b) #1 {
// CHECK: [[NEG_I:%.*]] = xor <4 x i32> %b, <i32 -1, i32 -1, i32 -1, i32 -1>
// CHECK: [[OR_I:%.*]] = or <4 x i32> %a, [[NEG_I]]
// CHECK: ret <4 x i32> [[OR_I]]
@ -516,7 +516,7 @@ int32x4_t test_vornq_s32(int32x4_t a, int32x4_t b) {
return vornq_s32(a, b);
}
// CHECK-LABEL: define <1 x i64> @test_vorn_s64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK-LABEL: define dso_local <1 x i64> @test_vorn_s64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK: [[NEG_I:%.*]] = xor <1 x i64> %b, <i64 -1>
// CHECK: [[OR_I:%.*]] = or <1 x i64> %a, [[NEG_I]]
// CHECK: ret <1 x i64> [[OR_I]]
@ -524,7 +524,7 @@ int64x1_t test_vorn_s64(int64x1_t a, int64x1_t b) {
return vorn_s64(a, b);
}
// CHECK-LABEL: define <2 x i64> @test_vornq_s64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK-LABEL: define dso_local <2 x i64> @test_vornq_s64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[NEG_I:%.*]] = xor <2 x i64> %b, <i64 -1, i64 -1>
// CHECK: [[OR_I:%.*]] = or <2 x i64> %a, [[NEG_I]]
// CHECK: ret <2 x i64> [[OR_I]]
@ -532,7 +532,7 @@ int64x2_t test_vornq_s64(int64x2_t a, int64x2_t b) {
return vornq_s64(a, b);
}
// CHECK-LABEL: define <8 x i8> @test_vorn_u8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vorn_u8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK: [[NEG_I:%.*]] = xor <8 x i8> %b, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
// CHECK: [[OR_I:%.*]] = or <8 x i8> %a, [[NEG_I]]
// CHECK: ret <8 x i8> [[OR_I]]
@ -540,7 +540,7 @@ uint8x8_t test_vorn_u8(uint8x8_t a, uint8x8_t b) {
return vorn_u8(a, b);
}
// CHECK-LABEL: define <16 x i8> @test_vornq_u8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK-LABEL: define dso_local <16 x i8> @test_vornq_u8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK: [[NEG_I:%.*]] = xor <16 x i8> %b, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
// CHECK: [[OR_I:%.*]] = or <16 x i8> %a, [[NEG_I]]
// CHECK: ret <16 x i8> [[OR_I]]
@ -548,7 +548,7 @@ uint8x16_t test_vornq_u8(uint8x16_t a, uint8x16_t b) {
return vornq_u8(a, b);
}
// CHECK-LABEL: define <4 x i16> @test_vorn_u16(<4 x i16> %a, <4 x i16> %b) #0 {
// CHECK-LABEL: define dso_local <4 x i16> @test_vorn_u16(<4 x i16> %a, <4 x i16> %b) #0 {
// CHECK: [[NEG_I:%.*]] = xor <4 x i16> %b, <i16 -1, i16 -1, i16 -1, i16 -1>
// CHECK: [[OR_I:%.*]] = or <4 x i16> %a, [[NEG_I]]
// CHECK: ret <4 x i16> [[OR_I]]
@ -556,7 +556,7 @@ uint16x4_t test_vorn_u16(uint16x4_t a, uint16x4_t b) {
return vorn_u16(a, b);
}
// CHECK-LABEL: define <8 x i16> @test_vornq_u16(<8 x i16> %a, <8 x i16> %b) #1 {
// CHECK-LABEL: define dso_local <8 x i16> @test_vornq_u16(<8 x i16> %a, <8 x i16> %b) #1 {
// CHECK: [[NEG_I:%.*]] = xor <8 x i16> %b, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
// CHECK: [[OR_I:%.*]] = or <8 x i16> %a, [[NEG_I]]
// CHECK: ret <8 x i16> [[OR_I]]
@ -564,7 +564,7 @@ uint16x8_t test_vornq_u16(uint16x8_t a, uint16x8_t b) {
return vornq_u16(a, b);
}
// CHECK-LABEL: define <2 x i32> @test_vorn_u32(<2 x i32> %a, <2 x i32> %b) #0 {
// CHECK-LABEL: define dso_local <2 x i32> @test_vorn_u32(<2 x i32> %a, <2 x i32> %b) #0 {
// CHECK: [[NEG_I:%.*]] = xor <2 x i32> %b, <i32 -1, i32 -1>
// CHECK: [[OR_I:%.*]] = or <2 x i32> %a, [[NEG_I]]
// CHECK: ret <2 x i32> [[OR_I]]
@ -572,7 +572,7 @@ uint32x2_t test_vorn_u32(uint32x2_t a, uint32x2_t b) {
return vorn_u32(a, b);
}
// CHECK-LABEL: define <4 x i32> @test_vornq_u32(<4 x i32> %a, <4 x i32> %b) #1 {
// CHECK-LABEL: define dso_local <4 x i32> @test_vornq_u32(<4 x i32> %a, <4 x i32> %b) #1 {
// CHECK: [[NEG_I:%.*]] = xor <4 x i32> %b, <i32 -1, i32 -1, i32 -1, i32 -1>
// CHECK: [[OR_I:%.*]] = or <4 x i32> %a, [[NEG_I]]
// CHECK: ret <4 x i32> [[OR_I]]
@ -580,7 +580,7 @@ uint32x4_t test_vornq_u32(uint32x4_t a, uint32x4_t b) {
return vornq_u32(a, b);
}
// CHECK-LABEL: define <1 x i64> @test_vorn_u64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK-LABEL: define dso_local <1 x i64> @test_vorn_u64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK: [[NEG_I:%.*]] = xor <1 x i64> %b, <i64 -1>
// CHECK: [[OR_I:%.*]] = or <1 x i64> %a, [[NEG_I]]
// CHECK: ret <1 x i64> [[OR_I]]
@ -588,7 +588,7 @@ uint64x1_t test_vorn_u64(uint64x1_t a, uint64x1_t b) {
return vorn_u64(a, b);
}
// CHECK-LABEL: define <2 x i64> @test_vornq_u64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK-LABEL: define dso_local <2 x i64> @test_vornq_u64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[NEG_I:%.*]] = xor <2 x i64> %b, <i64 -1, i64 -1>
// CHECK: [[OR_I:%.*]] = or <2 x i64> %a, [[NEG_I]]
// CHECK: ret <2 x i64> [[OR_I]]

88
clang/test/CodeGen/aarch64-neon-across.c
View File

@ -5,7 +5,7 @@
#include <arm_neon.h>
// CHECK-LABEL: define i16 @test_vaddlv_s8(<8 x i8> %a) #0 {
// CHECK-LABEL: define dso_local i16 @test_vaddlv_s8(<8 x i8> %a) #0 {
// CHECK: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.saddlv.i32.v8i8(<8 x i8> %a) #3
// CHECK: [[TMP0:%.*]] = trunc i32 [[VADDLV_I]] to i16
// CHECK: ret i16 [[TMP0]]
@ -13,14 +13,14 @@ int16_t test_vaddlv_s8(int8x8_t a) {
return vaddlv_s8(a);
}
// CHECK-LABEL: define i32 @test_vaddlv_s16(<4 x i16> %a) #0 {
// CHECK-LABEL: define dso_local i32 @test_vaddlv_s16(<4 x i16> %a) #0 {
// CHECK: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.saddlv.i32.v4i16(<4 x i16> %a) #3
// CHECK: ret i32 [[VADDLV_I]]
int32_t test_vaddlv_s16(int16x4_t a) {
return vaddlv_s16(a);
}
// CHECK-LABEL: define i16 @test_vaddlv_u8(<8 x i8> %a) #0 {
// CHECK-LABEL: define dso_local i16 @test_vaddlv_u8(<8 x i8> %a) #0 {
// CHECK: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddlv.i32.v8i8(<8 x i8> %a) #3
// CHECK: [[TMP0:%.*]] = trunc i32 [[VADDLV_I]] to i16
// CHECK: ret i16 [[TMP0]]
@ -28,14 +28,14 @@ uint16_t test_vaddlv_u8(uint8x8_t a) {
return vaddlv_u8(a);
}
// CHECK-LABEL: define i32 @test_vaddlv_u16(<4 x i16> %a) #0 {
// CHECK-LABEL: define dso_local i32 @test_vaddlv_u16(<4 x i16> %a) #0 {
// CHECK: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddlv.i32.v4i16(<4 x i16> %a) #3
// CHECK: ret i32 [[VADDLV_I]]
uint32_t test_vaddlv_u16(uint16x4_t a) {
return vaddlv_u16(a);
}
// CHECK-LABEL: define i16 @test_vaddlvq_s8(<16 x i8> %a) #1 {
// CHECK-LABEL: define dso_local i16 @test_vaddlvq_s8(<16 x i8> %a) #1 {
// CHECK: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.saddlv.i32.v16i8(<16 x i8> %a) #3
// CHECK: [[TMP0:%.*]] = trunc i32 [[VADDLV_I]] to i16
// CHECK: ret i16 [[TMP0]]
@ -43,21 +43,21 @@ int16_t test_vaddlvq_s8(int8x16_t a) {
return vaddlvq_s8(a);
}
// CHECK-LABEL: define i32 @test_vaddlvq_s16(<8 x i16> %a) #1 {
// CHECK-LABEL: define dso_local i32 @test_vaddlvq_s16(<8 x i16> %a) #1 {
// CHECK: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.saddlv.i32.v8i16(<8 x i16> %a) #3
// CHECK: ret i32 [[VADDLV_I]]
int32_t test_vaddlvq_s16(int16x8_t a) {
return vaddlvq_s16(a);
}
// CHECK-LABEL: define i64 @test_vaddlvq_s32(<4 x i32> %a) #1 {
// CHECK-LABEL: define dso_local i64 @test_vaddlvq_s32(<4 x i32> %a) #1 {
// CHECK: [[VADDLVQ_S32_I:%.*]] = call i64 @llvm.aarch64.neon.saddlv.i64.v4i32(<4 x i32> %a) #3
// CHECK: ret i64 [[VADDLVQ_S32_I]]
int64_t test_vaddlvq_s32(int32x4_t a) {
return vaddlvq_s32(a);
}
// CHECK-LABEL: define i16 @test_vaddlvq_u8(<16 x i8> %a) #1 {
// CHECK-LABEL: define dso_local i16 @test_vaddlvq_u8(<16 x i8> %a) #1 {
// CHECK: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddlv.i32.v16i8(<16 x i8> %a) #3
// CHECK: [[TMP0:%.*]] = trunc i32 [[VADDLV_I]] to i16
// CHECK: ret i16 [[TMP0]]
@ -65,21 +65,21 @@ uint16_t test_vaddlvq_u8(uint8x16_t a) {
return vaddlvq_u8(a);
}
// CHECK-LABEL: define i32 @test_vaddlvq_u16(<8 x i16> %a) #1 {
// CHECK-LABEL: define dso_local i32 @test_vaddlvq_u16(<8 x i16> %a) #1 {
// CHECK: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddlv.i32.v8i16(<8 x i16> %a) #3
// CHECK: ret i32 [[VADDLV_I]]
uint32_t test_vaddlvq_u16(uint16x8_t a) {
return vaddlvq_u16(a);
}
// CHECK-LABEL: define i64 @test_vaddlvq_u32(<4 x i32> %a) #1 {
// CHECK-LABEL: define dso_local i64 @test_vaddlvq_u32(<4 x i32> %a) #1 {
// CHECK: [[VADDLVQ_U32_I:%.*]] = call i64 @llvm.aarch64.neon.uaddlv.i64.v4i32(<4 x i32> %a) #3
// CHECK: ret i64 [[VADDLVQ_U32_I]]
uint64_t test_vaddlvq_u32(uint32x4_t a) {
return vaddlvq_u32(a);
}
// CHECK-LABEL: define i8 @test_vmaxv_s8(<8 x i8> %a) #0 {
// CHECK-LABEL: define dso_local i8 @test_vmaxv_s8(<8 x i8> %a) #0 {
// CHECK: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.smaxv.i32.v8i8(<8 x i8> %a) #3
// CHECK: [[TMP0:%.*]] = trunc i32 [[VMAXV_I]] to i8
// CHECK: ret i8 [[TMP0]]
@ -87,7 +87,7 @@ int8_t test_vmaxv_s8(int8x8_t a) {
return vmaxv_s8(a);
}
// CHECK-LABEL: define i16 @test_vmaxv_s16(<4 x i16> %a) #0 {
// CHECK-LABEL: define dso_local i16 @test_vmaxv_s16(<4 x i16> %a) #0 {
// CHECK: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.smaxv.i32.v4i16(<4 x i16> %a) #3
// CHECK: [[TMP2:%.*]] = trunc i32 [[VMAXV_I]] to i16
// CHECK: ret i16 [[TMP2]]
@ -95,7 +95,7 @@ int16_t test_vmaxv_s16(int16x4_t a) {
return vmaxv_s16(a);
}
// CHECK-LABEL: define i8 @test_vmaxv_u8(<8 x i8> %a) #0 {
// CHECK-LABEL: define dso_local i8 @test_vmaxv_u8(<8 x i8> %a) #0 {
// CHECK: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.umaxv.i32.v8i8(<8 x i8> %a) #3
// CHECK: [[TMP0:%.*]] = trunc i32 [[VMAXV_I]] to i8
// CHECK: ret i8 [[TMP0]]
@ -103,7 +103,7 @@ uint8_t test_vmaxv_u8(uint8x8_t a) {
return vmaxv_u8(a);
}
// CHECK-LABEL: define i16 @test_vmaxv_u16(<4 x i16> %a) #0 {
// CHECK-LABEL: define dso_local i16 @test_vmaxv_u16(<4 x i16> %a) #0 {
// CHECK: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.umaxv.i32.v4i16(<4 x i16> %a) #3
// CHECK: [[TMP2:%.*]] = trunc i32 [[VMAXV_I]] to i16
// CHECK: ret i16 [[TMP2]]
@ -111,7 +111,7 @@ uint16_t test_vmaxv_u16(uint16x4_t a) {
return vmaxv_u16(a);
}
// CHECK-LABEL: define i8 @test_vmaxvq_s8(<16 x i8> %a) #1 {
// CHECK-LABEL: define dso_local i8 @test_vmaxvq_s8(<16 x i8> %a) #1 {
// CHECK: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.smaxv.i32.v16i8(<16 x i8> %a) #3
// CHECK: [[TMP0:%.*]] = trunc i32 [[VMAXV_I]] to i8
// CHECK: ret i8 [[TMP0]]
@ -119,7 +119,7 @@ int8_t test_vmaxvq_s8(int8x16_t a) {
return vmaxvq_s8(a);
}
// CHECK-LABEL: define i16 @test_vmaxvq_s16(<8 x i16> %a) #1 {
// CHECK-LABEL: define dso_local i16 @test_vmaxvq_s16(<8 x i16> %a) #1 {
// CHECK: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.smaxv.i32.v8i16(<8 x i16> %a) #3
// CHECK: [[TMP2:%.*]] = trunc i32 [[VMAXV_I]] to i16
// CHECK: ret i16 [[TMP2]]
@ -127,14 +127,14 @@ int16_t test_vmaxvq_s16(int16x8_t a) {
return vmaxvq_s16(a);
}
// CHECK-LABEL: define i32 @test_vmaxvq_s32(<4 x i32> %a) #1 {
// CHECK-LABEL: define dso_local i32 @test_vmaxvq_s32(<4 x i32> %a) #1 {
// CHECK: [[VMAXVQ_S32_I:%.*]] = call i32 @llvm.aarch64.neon.smaxv.i32.v4i32(<4 x i32> %a) #3
// CHECK: ret i32 [[VMAXVQ_S32_I]]
int32_t test_vmaxvq_s32(int32x4_t a) {
return vmaxvq_s32(a);
}
// CHECK-LABEL: define i8 @test_vmaxvq_u8(<16 x i8> %a) #1 {
// CHECK-LABEL: define dso_local i8 @test_vmaxvq_u8(<16 x i8> %a) #1 {
// CHECK: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.umaxv.i32.v16i8(<16 x i8> %a) #3
// CHECK: [[TMP0:%.*]] = trunc i32 [[VMAXV_I]] to i8
// CHECK: ret i8 [[TMP0]]
@ -142,7 +142,7 @@ uint8_t test_vmaxvq_u8(uint8x16_t a) {
return vmaxvq_u8(a);
}
// CHECK-LABEL: define i16 @test_vmaxvq_u16(<8 x i16> %a) #1 {
// CHECK-LABEL: define dso_local i16 @test_vmaxvq_u16(<8 x i16> %a) #1 {
// CHECK: [[VMAXV_I:%.*]] = call i32 @llvm.aarch64.neon.umaxv.i32.v8i16(<8 x i16> %a) #3
// CHECK: [[TMP2:%.*]] = trunc i32 [[VMAXV_I]] to i16
// CHECK: ret i16 [[TMP2]]
@ -150,14 +150,14 @@ uint16_t test_vmaxvq_u16(uint16x8_t a) {
return vmaxvq_u16(a);
}
// CHECK-LABEL: define i32 @test_vmaxvq_u32(<4 x i32> %a) #1 {
// CHECK-LABEL: define dso_local i32 @test_vmaxvq_u32(<4 x i32> %a) #1 {
// CHECK: [[VMAXVQ_U32_I:%.*]] = call i32 @llvm.aarch64.neon.umaxv.i32.v4i32(<4 x i32> %a) #3
// CHECK: ret i32 [[VMAXVQ_U32_I]]
uint32_t test_vmaxvq_u32(uint32x4_t a) {
return vmaxvq_u32(a);
}
// CHECK-LABEL: define i8 @test_vminv_s8(<8 x i8> %a) #0 {
// CHECK-LABEL: define dso_local i8 @test_vminv_s8(<8 x i8> %a) #0 {
// CHECK: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.sminv.i32.v8i8(<8 x i8> %a) #3
// CHECK: [[TMP0:%.*]] = trunc i32 [[VMINV_I]] to i8
// CHECK: ret i8 [[TMP0]]
@ -165,7 +165,7 @@ int8_t test_vminv_s8(int8x8_t a) {
return vminv_s8(a);
}
// CHECK-LABEL: define i16 @test_vminv_s16(<4 x i16> %a) #0 {
// CHECK-LABEL: define dso_local i16 @test_vminv_s16(<4 x i16> %a) #0 {
// CHECK: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.sminv.i32.v4i16(<4 x i16> %a) #3
// CHECK: [[TMP2:%.*]] = trunc i32 [[VMINV_I]] to i16
// CHECK: ret i16 [[TMP2]]
@ -173,7 +173,7 @@ int16_t test_vminv_s16(int16x4_t a) {
return vminv_s16(a);
}
// CHECK-LABEL: define i8 @test_vminv_u8(<8 x i8> %a) #0 {
// CHECK-LABEL: define dso_local i8 @test_vminv_u8(<8 x i8> %a) #0 {
// CHECK: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.uminv.i32.v8i8(<8 x i8> %a) #3
// CHECK: [[TMP0:%.*]] = trunc i32 [[VMINV_I]] to i8
// CHECK: ret i8 [[TMP0]]
@ -181,7 +181,7 @@ uint8_t test_vminv_u8(uint8x8_t a) {
return vminv_u8(a);
}
// CHECK-LABEL: define i16 @test_vminv_u16(<4 x i16> %a) #0 {
// CHECK-LABEL: define dso_local i16 @test_vminv_u16(<4 x i16> %a) #0 {
// CHECK: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.uminv.i32.v4i16(<4 x i16> %a) #3
// CHECK: [[TMP2:%.*]] = trunc i32 [[VMINV_I]] to i16
// CHECK: ret i16 [[TMP2]]
@ -189,7 +189,7 @@ uint16_t test_vminv_u16(uint16x4_t a) {
return vminv_u16(a);
}
// CHECK-LABEL: define i8 @test_vminvq_s8(<16 x i8> %a) #1 {
// CHECK-LABEL: define dso_local i8 @test_vminvq_s8(<16 x i8> %a) #1 {
// CHECK: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.sminv.i32.v16i8(<16 x i8> %a) #3
// CHECK: [[TMP0:%.*]] = trunc i32 [[VMINV_I]] to i8
// CHECK: ret i8 [[TMP0]]
@ -197,7 +197,7 @@ int8_t test_vminvq_s8(int8x16_t a) {
return vminvq_s8(a);
}
// CHECK-LABEL: define i16 @test_vminvq_s16(<8 x i16> %a) #1 {
// CHECK-LABEL: define dso_local i16 @test_vminvq_s16(<8 x i16> %a) #1 {
// CHECK: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.sminv.i32.v8i16(<8 x i16> %a) #3
// CHECK: [[TMP2:%.*]] = trunc i32 [[VMINV_I]] to i16
// CHECK: ret i16 [[TMP2]]
@ -205,14 +205,14 @@ int16_t test_vminvq_s16(int16x8_t a) {
return vminvq_s16(a);
}
// CHECK-LABEL: define i32 @test_vminvq_s32(<4 x i32> %a) #1 {
// CHECK-LABEL: define dso_local i32 @test_vminvq_s32(<4 x i32> %a) #1 {
// CHECK: [[VMINVQ_S32_I:%.*]] = call i32 @llvm.aarch64.neon.sminv.i32.v4i32(<4 x i32> %a) #3
// CHECK: ret i32 [[VMINVQ_S32_I]]
int32_t test_vminvq_s32(int32x4_t a) {
return vminvq_s32(a);
}
// CHECK-LABEL: define i8 @test_vminvq_u8(<16 x i8> %a) #1 {
// CHECK-LABEL: define dso_local i8 @test_vminvq_u8(<16 x i8> %a) #1 {
// CHECK: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.uminv.i32.v16i8(<16 x i8> %a) #3
// CHECK: [[TMP0:%.*]] = trunc i32 [[VMINV_I]] to i8
// CHECK: ret i8 [[TMP0]]
@ -220,7 +220,7 @@ uint8_t test_vminvq_u8(uint8x16_t a) {
return vminvq_u8(a);
}
// CHECK-LABEL: define i16 @test_vminvq_u16(<8 x i16> %a) #1 {
// CHECK-LABEL: define dso_local i16 @test_vminvq_u16(<8 x i16> %a) #1 {
// CHECK: [[VMINV_I:%.*]] = call i32 @llvm.aarch64.neon.uminv.i32.v8i16(<8 x i16> %a) #3
// CHECK: [[TMP2:%.*]] = trunc i32 [[VMINV_I]] to i16
// CHECK: ret i16 [[TMP2]]
@ -228,14 +228,14 @@ uint16_t test_vminvq_u16(uint16x8_t a) {
return vminvq_u16(a);
}
// CHECK-LABEL: define i32 @test_vminvq_u32(<4 x i32> %a) #1 {
// CHECK-LABEL: define dso_local i32 @test_vminvq_u32(<4 x i32> %a) #1 {
// CHECK: [[VMINVQ_U32_I:%.*]] = call i32 @llvm.aarch64.neon.uminv.i32.v4i32(<4 x i32> %a) #3
// CHECK: ret i32 [[VMINVQ_U32_I]]
uint32_t test_vminvq_u32(uint32x4_t a) {
return vminvq_u32(a);
}
// CHECK-LABEL: define i8 @test_vaddv_s8(<8 x i8> %a) #0 {
// CHECK-LABEL: define dso_local i8 @test_vaddv_s8(<8 x i8> %a) #0 {
// CHECK: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.saddv.i32.v8i8(<8 x i8> %a) #3
// CHECK: [[TMP0:%.*]] = trunc i32 [[VADDV_I]] to i8
// CHECK: ret i8 [[TMP0]]
@ -243,7 +243,7 @@ int8_t test_vaddv_s8(int8x8_t a) {
return vaddv_s8(a);
}
// CHECK-LABEL: define i16 @test_vaddv_s16(<4 x i16> %a) #0 {
// CHECK-LABEL: define dso_local i16 @test_vaddv_s16(<4 x i16> %a) #0 {
// CHECK: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.saddv.i32.v4i16(<4 x i16> %a) #3
// CHECK: [[TMP2:%.*]] = trunc i32 [[VADDV_I]] to i16
// CHECK: ret i16 [[TMP2]]
@ -251,7 +251,7 @@ int16_t test_vaddv_s16(int16x4_t a) {
return vaddv_s16(a);
}
// CHECK-LABEL: define i8 @test_vaddv_u8(<8 x i8> %a) #0 {
// CHECK-LABEL: define dso_local i8 @test_vaddv_u8(<8 x i8> %a) #0 {
// CHECK: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddv.i32.v8i8(<8 x i8> %a) #3
// CHECK: [[TMP0:%.*]] = trunc i32 [[VADDV_I]] to i8
// CHECK: ret i8 [[TMP0]]
@ -259,7 +259,7 @@ uint8_t test_vaddv_u8(uint8x8_t a) {
return vaddv_u8(a);
}
// CHECK-LABEL: define i16 @test_vaddv_u16(<4 x i16> %a) #0 {
// CHECK-LABEL: define dso_local i16 @test_vaddv_u16(<4 x i16> %a) #0 {
// CHECK: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddv.i32.v4i16(<4 x i16> %a) #3
// CHECK: [[TMP2:%.*]] = trunc i32 [[VADDV_I]] to i16
// CHECK: ret i16 [[TMP2]]
@ -267,7 +267,7 @@ uint16_t test_vaddv_u16(uint16x4_t a) {
return vaddv_u16(a);
}
// CHECK-LABEL: define i8 @test_vaddvq_s8(<16 x i8> %a) #1 {
// CHECK-LABEL: define dso_local i8 @test_vaddvq_s8(<16 x i8> %a) #1 {
// CHECK: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.saddv.i32.v16i8(<16 x i8> %a) #3
// CHECK: [[TMP0:%.*]] = trunc i32 [[VADDV_I]] to i8
// CHECK: ret i8 [[TMP0]]
@ -275,7 +275,7 @@ int8_t test_vaddvq_s8(int8x16_t a) {
return vaddvq_s8(a);
}
// CHECK-LABEL: define i16 @test_vaddvq_s16(<8 x i16> %a) #1 {
// CHECK-LABEL: define dso_local i16 @test_vaddvq_s16(<8 x i16> %a) #1 {
// CHECK: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.saddv.i32.v8i16(<8 x i16> %a) #3
// CHECK: [[TMP2:%.*]] = trunc i32 [[VADDV_I]] to i16
// CHECK: ret i16 [[TMP2]]
@ -283,14 +283,14 @@ int16_t test_vaddvq_s16(int16x8_t a) {
return vaddvq_s16(a);
}
// CHECK-LABEL: define i32 @test_vaddvq_s32(<4 x i32> %a) #1 {
// CHECK-LABEL: define dso_local i32 @test_vaddvq_s32(<4 x i32> %a) #1 {
// CHECK: [[VADDVQ_S32_I:%.*]] = call i32 @llvm.aarch64.neon.saddv.i32.v4i32(<4 x i32> %a) #3
// CHECK: ret i32 [[VADDVQ_S32_I]]
int32_t test_vaddvq_s32(int32x4_t a) {
return vaddvq_s32(a);
}
// CHECK-LABEL: define i8 @test_vaddvq_u8(<16 x i8> %a) #1 {
// CHECK-LABEL: define dso_local i8 @test_vaddvq_u8(<16 x i8> %a) #1 {
// CHECK: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddv.i32.v16i8(<16 x i8> %a) #3
// CHECK: [[TMP0:%.*]] = trunc i32 [[VADDV_I]] to i8
// CHECK: ret i8 [[TMP0]]
@ -298,7 +298,7 @@ uint8_t test_vaddvq_u8(uint8x16_t a) {
return vaddvq_u8(a);
}
// CHECK-LABEL: define i16 @test_vaddvq_u16(<8 x i16> %a) #1 {
// CHECK-LABEL: define dso_local i16 @test_vaddvq_u16(<8 x i16> %a) #1 {
// CHECK: [[VADDV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddv.i32.v8i16(<8 x i16> %a) #3
// CHECK: [[TMP2:%.*]] = trunc i32 [[VADDV_I]] to i16
// CHECK: ret i16 [[TMP2]]
@ -306,35 +306,35 @@ uint16_t test_vaddvq_u16(uint16x8_t a) {
return vaddvq_u16(a);
}
// CHECK-LABEL: define i32 @test_vaddvq_u32(<4 x i32> %a) #1 {
// CHECK-LABEL: define dso_local i32 @test_vaddvq_u32(<4 x i32> %a) #1 {
// CHECK: [[VADDVQ_U32_I:%.*]] = call i32 @llvm.aarch64.neon.uaddv.i32.v4i32(<4 x i32> %a) #3
// CHECK: ret i32 [[VADDVQ_U32_I]]
uint32_t test_vaddvq_u32(uint32x4_t a) {
return vaddvq_u32(a);
}
// CHECK-LABEL: define float @test_vmaxvq_f32(<4 x float> %a) #1 {
// CHECK-LABEL: define dso_local float @test_vmaxvq_f32(<4 x float> %a) #1 {
// CHECK: [[VMAXVQ_F32_I:%.*]] = call float @llvm.aarch64.neon.fmaxv.f32.v4f32(<4 x float> %a) #3
// CHECK: ret float [[VMAXVQ_F32_I]]
float32_t test_vmaxvq_f32(float32x4_t a) {
return vmaxvq_f32(a);
}
// CHECK-LABEL: define float @test_vminvq_f32(<4 x float> %a) #1 {
// CHECK-LABEL: define dso_local float @test_vminvq_f32(<4 x float> %a) #1 {
// CHECK: [[VMINVQ_F32_I:%.*]] = call float @llvm.aarch64.neon.fminv.f32.v4f32(<4 x float> %a) #3
// CHECK: ret float [[VMINVQ_F32_I]]
float32_t test_vminvq_f32(float32x4_t a) {
return vminvq_f32(a);
}
// CHECK-LABEL: define float @test_vmaxnmvq_f32(<4 x float> %a) #1 {
// CHECK-LABEL: define dso_local float @test_vmaxnmvq_f32(<4 x float> %a) #1 {
// CHECK: [[VMAXNMVQ_F32_I:%.*]] = call float @llvm.aarch64.neon.fmaxnmv.f32.v4f32(<4 x float> %a) #3
// CHECK: ret float [[VMAXNMVQ_F32_I]]
float32_t test_vmaxnmvq_f32(float32x4_t a) {
return vmaxnmvq_f32(a);
}
// CHECK-LABEL: define float @test_vminnmvq_f32(<4 x float> %a) #1 {
// CHECK-LABEL: define dso_local float @test_vminnmvq_f32(<4 x float> %a) #1 {
// CHECK: [[VMINNMVQ_F32_I:%.*]] = call float @llvm.aarch64.neon.fminnmv.f32.v4f32(<4 x float> %a) #3
// CHECK: ret float [[VMINNMVQ_F32_I]]
float32_t test_vminnmvq_f32(float32x4_t a) {

24
clang/test/CodeGen/aarch64-neon-dot-product.c
View File

@ -8,35 +8,35 @@
#include <arm_neon.h>
uint32x2_t test_vdot_u32(uint32x2_t a, uint8x8_t b, uint8x8_t c) {
// CHECK-LABEL: define <2 x i32> @test_vdot_u32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
// CHECK-LABEL: define dso_local <2 x i32> @test_vdot_u32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
// CHECK: [[RESULT:%.*]] = call <2 x i32> @llvm.aarch64.neon.udot.v2i32.v8i8(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
// CHECK: ret <2 x i32> [[RESULT]]
return vdot_u32(a, b, c);
}
uint32x4_t test_vdotq_u32(uint32x4_t a, uint8x16_t b, uint8x16_t c) {
// CHECK-LABEL: define <4 x i32> @test_vdotq_u32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
// CHECK-LABEL: define dso_local <4 x i32> @test_vdotq_u32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
// CHECK: [[RESULT:%.*]] = call <4 x i32> @llvm.aarch64.neon.udot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
// CHECK: ret <4 x i32> [[RESULT]]
return vdotq_u32(a, b, c);
}
int32x2_t test_vdot_s32(int32x2_t a, int8x8_t b, int8x8_t c) {
// CHECK-LABEL: define <2 x i32> @test_vdot_s32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
// CHECK-LABEL: define dso_local <2 x i32> @test_vdot_s32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
// CHECK: [[RESULT:%.*]] = call <2 x i32> @llvm.aarch64.neon.sdot.v2i32.v8i8(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
// CHECK: ret <2 x i32> [[RESULT]]
return vdot_s32(a, b, c);
}
int32x4_t test_vdotq_s32(int32x4_t a, int8x16_t b, int8x16_t c) {
// CHECK-LABEL: define <4 x i32> @test_vdotq_s32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
// CHECK-LABEL: define dso_local <4 x i32> @test_vdotq_s32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
// CHECK: [[RESULT:%.*]] = call <4 x i32> @llvm.aarch64.neon.sdot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
// CHECK: ret <4 x i32> [[RESULT]]
return vdotq_s32(a, b, c);
}
uint32x2_t test_vdot_lane_u32(uint32x2_t a, uint8x8_t b, uint8x8_t c) {
// CHECK-LABEL: define <2 x i32> @test_vdot_lane_u32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
// CHECK-LABEL: define dso_local <2 x i32> @test_vdot_lane_u32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
// CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32>
// CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> undef, <2 x i32> <i32 1, i32 1>
// CHECK: [[CAST2:%.*]] = bitcast <2 x i32> [[SHUFFLE]] to <8 x i8>
@ -46,7 +46,7 @@ uint32x2_t test_vdot_lane_u32(uint32x2_t a, uint8x8_t b, uint8x8_t c) {
}
uint32x4_t test_vdotq_lane_u32(uint32x4_t a, uint8x16_t b, uint8x8_t c) {
// CHECK-LABEL: define <4 x i32> @test_vdotq_lane_u32(<4 x i32> %a, <16 x i8> %b, <8 x i8> %c)
// CHECK-LABEL: define dso_local <4 x i32> @test_vdotq_lane_u32(<4 x i32> %a, <16 x i8> %b, <8 x i8> %c)
// CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32>
// CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
// CHECK: [[CAST2:%.*]] = bitcast <4 x i32> [[SHUFFLE]] to <16 x i8>
@ -56,7 +56,7 @@ uint32x4_t test_vdotq_lane_u32(uint32x4_t a, uint8x16_t b, uint8x8_t c) {
}
uint32x2_t test_vdot_laneq_u32(uint32x2_t a, uint8x8_t b, uint8x16_t c) {
// CHECK-LABEL: define <2 x i32> @test_vdot_laneq_u32(<2 x i32> %a, <8 x i8> %b, <16 x i8> %c)
// CHECK-LABEL: define dso_local <2 x i32> @test_vdot_laneq_u32(<2 x i32> %a, <8 x i8> %b, <16 x i8> %c)
// CHECK: [[CAST1:%.*]] = bitcast <16 x i8> %c to <4 x i32>
// CHECK: [[SHUFFLE:%.*]] = shufflevector <4 x i32> [[CAST1]], <4 x i32> undef, <2 x i32> <i32 1, i32 1>
// CHECK: [[CAST2:%.*]] = bitcast <2 x i32> [[SHUFFLE]] to <8 x i8>
@ -66,7 +66,7 @@ uint32x2_t test_vdot_laneq_u32(uint32x2_t a, uint8x8_t b, uint8x16_t c) {
}
uint32x4_t test_vdotq_laneq_u32(uint32x4_t a, uint8x16_t b, uint8x16_t c) {
// CHECK-LABEL: define <4 x i32> @test_vdotq_laneq_u32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
// CHECK-LABEL: define dso_local <4 x i32> @test_vdotq_laneq_u32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
// CHECK: [[CAST1:%.*]] = bitcast <16 x i8> %c to <4 x i32>
// CHECK: [[SHUFFLE:%.*]] = shufflevector <4 x i32> [[CAST1]], <4 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
// CHECK: [[CAST2:%.*]] = bitcast <4 x i32> [[SHUFFLE]] to <16 x i8>
@ -76,7 +76,7 @@ uint32x4_t test_vdotq_laneq_u32(uint32x4_t a, uint8x16_t b, uint8x16_t c) {
}
int32x2_t test_vdot_lane_s32(int32x2_t a, int8x8_t b, int8x8_t c) {
// CHECK-LABEL: define <2 x i32> @test_vdot_lane_s32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
// CHECK-LABEL: define dso_local <2 x i32> @test_vdot_lane_s32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
// CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32>
// CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> undef, <2 x i32> <i32 1, i32 1>
// CHECK: [[CAST2:%.*]] = bitcast <2 x i32> [[SHUFFLE]] to <8 x i8>
@ -86,7 +86,7 @@ int32x2_t test_vdot_lane_s32(int32x2_t a, int8x8_t b, int8x8_t c) {
}
int32x4_t test_vdotq_lane_s32(int32x4_t a, int8x16_t b, int8x8_t c) {
// CHECK-LABEL: define <4 x i32> @test_vdotq_lane_s32(<4 x i32> %a, <16 x i8> %b, <8 x i8> %c)
// CHECK-LABEL: define dso_local <4 x i32> @test_vdotq_lane_s32(<4 x i32> %a, <16 x i8> %b, <8 x i8> %c)
// CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32>
// CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
// CHECK: [[CAST2:%.*]] = bitcast <4 x i32> [[SHUFFLE]] to <16 x i8>
@ -96,7 +96,7 @@ int32x4_t test_vdotq_lane_s32(int32x4_t a, int8x16_t b, int8x8_t c) {
}
int32x2_t test_vdot_laneq_s32(int32x2_t a, int8x8_t b, int8x16_t c) {
// CHECK-LABEL: define <2 x i32> @test_vdot_laneq_s32(<2 x i32> %a, <8 x i8> %b, <16 x i8> %c)
// CHECK-LABEL: define dso_local <2 x i32> @test_vdot_laneq_s32(<2 x i32> %a, <8 x i8> %b, <16 x i8> %c)
// CHECK: [[CAST1:%.*]] = bitcast <16 x i8> %c to <4 x i32>
// CHECK: [[SHUFFLE:%.*]] = shufflevector <4 x i32> [[CAST1]], <4 x i32> undef, <2 x i32> <i32 1, i32 1>
// CHECK: [[CAST2:%.*]] = bitcast <2 x i32> [[SHUFFLE]] to <8 x i8>
@ -106,7 +106,7 @@ int32x2_t test_vdot_laneq_s32(int32x2_t a, int8x8_t b, int8x16_t c) {
}
int32x4_t test_vdotq_laneq_s32(int32x4_t a, int8x16_t b, int8x16_t c) {
// CHECK-LABEL: define <4 x i32> @test_vdotq_laneq_s32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
// CHECK-LABEL: define dso_local <4 x i32> @test_vdotq_laneq_s32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
// CHECK: [[CAST1:%.*]] = bitcast <16 x i8> %c to <4 x i32>
// CHECK: [[SHUFFLE:%.*]] = shufflevector <4 x i32> [[CAST1]], <4 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
// CHECK: [[CAST2:%.*]] = bitcast <4 x i32> [[SHUFFLE]] to <16 x i8>

48
clang/test/CodeGen/aarch64-neon-extract.c
View File

@ -6,14 +6,14 @@
#include <arm_neon.h>
// CHECK-LABEL: define <8 x i8> @test_vext_s8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vext_s8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK: [[VEXT:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9>
// CHECK: ret <8 x i8> [[VEXT]]
int8x8_t test_vext_s8(int8x8_t a, int8x8_t b) {
return vext_s8(a, b, 2);
}
// CHECK-LABEL: define <4 x i16> @test_vext_s16(<4 x i16> %a, <4 x i16> %b) #0 {
// CHECK-LABEL: define dso_local <4 x i16> @test_vext_s16(<4 x i16> %a, <4 x i16> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast <4 x i16> %a to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>
@ -24,7 +24,7 @@ int16x4_t test_vext_s16(int16x4_t a, int16x4_t b) {
return vext_s16(a, b, 3);
}
// CHECK-LABEL: define <2 x i32> @test_vext_s32(<2 x i32> %a, <2 x i32> %b) #0 {
// CHECK-LABEL: define dso_local <2 x i32> @test_vext_s32(<2 x i32> %a, <2 x i32> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast <2 x i32> %a to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>
@ -35,7 +35,7 @@ int32x2_t test_vext_s32(int32x2_t a, int32x2_t b) {
return vext_s32(a, b, 1);
}
// CHECK-LABEL: define <1 x i64> @test_vext_s64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK-LABEL: define dso_local <1 x i64> @test_vext_s64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast <1 x i64> %a to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>
@ -46,14 +46,14 @@ int64x1_t test_vext_s64(int64x1_t a, int64x1_t b) {
return vext_s64(a, b, 0);
}
// CHECK-LABEL: define <16 x i8> @test_vextq_s8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK-LABEL: define dso_local <16 x i8> @test_vextq_s8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK: [[VEXT:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17>
// CHECK: ret <16 x i8> [[VEXT]]
int8x16_t test_vextq_s8(int8x16_t a, int8x16_t b) {
return vextq_s8(a, b, 2);
}
// CHECK-LABEL: define <8 x i16> @test_vextq_s16(<8 x i16> %a, <8 x i16> %b) #1 {
// CHECK-LABEL: define dso_local <8 x i16> @test_vextq_s16(<8 x i16> %a, <8 x i16> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <8 x i16> %a to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>
@ -64,7 +64,7 @@ int16x8_t test_vextq_s16(int16x8_t a, int16x8_t b) {
return vextq_s16(a, b, 3);
}
// CHECK-LABEL: define <4 x i32> @test_vextq_s32(<4 x i32> %a, <4 x i32> %b) #1 {
// CHECK-LABEL: define dso_local <4 x i32> @test_vextq_s32(<4 x i32> %a, <4 x i32> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <4 x i32> %a to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <4 x i32> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>
@ -75,7 +75,7 @@ int32x4_t test_vextq_s32(int32x4_t a, int32x4_t b) {
return vextq_s32(a, b, 1);
}
// CHECK-LABEL: define <2 x i64> @test_vextq_s64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK-LABEL: define dso_local <2 x i64> @test_vextq_s64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <2 x i64> %a to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>
@ -86,14 +86,14 @@ int64x2_t test_vextq_s64(int64x2_t a, int64x2_t b) {
return vextq_s64(a, b, 1);
}
// CHECK-LABEL: define <8 x i8> @test_vext_u8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vext_u8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK: [[VEXT:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9>
// CHECK: ret <8 x i8> [[VEXT]]
uint8x8_t test_vext_u8(uint8x8_t a, uint8x8_t b) {
return vext_u8(a, b, 2);
}
// CHECK-LABEL: define <4 x i16> @test_vext_u16(<4 x i16> %a, <4 x i16> %b) #0 {
// CHECK-LABEL: define dso_local <4 x i16> @test_vext_u16(<4 x i16> %a, <4 x i16> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast <4 x i16> %a to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>
@ -104,7 +104,7 @@ uint16x4_t test_vext_u16(uint16x4_t a, uint16x4_t b) {
return vext_u16(a, b, 3);
}
// CHECK-LABEL: define <2 x i32> @test_vext_u32(<2 x i32> %a, <2 x i32> %b) #0 {
// CHECK-LABEL: define dso_local <2 x i32> @test_vext_u32(<2 x i32> %a, <2 x i32> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast <2 x i32> %a to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x i32>
@ -115,7 +115,7 @@ uint32x2_t test_vext_u32(uint32x2_t a, uint32x2_t b) {
return vext_u32(a, b, 1);
}
// CHECK-LABEL: define <1 x i64> @test_vext_u64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK-LABEL: define dso_local <1 x i64> @test_vext_u64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast <1 x i64> %a to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>
@ -126,14 +126,14 @@ uint64x1_t test_vext_u64(uint64x1_t a, uint64x1_t b) {
return vext_u64(a, b, 0);
}
// CHECK-LABEL: define <16 x i8> @test_vextq_u8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK-LABEL: define dso_local <16 x i8> @test_vextq_u8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK: [[VEXT:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17>
// CHECK: ret <16 x i8> [[VEXT]]
uint8x16_t test_vextq_u8(uint8x16_t a, uint8x16_t b) {
return vextq_u8(a, b, 2);
}
// CHECK-LABEL: define <8 x i16> @test_vextq_u16(<8 x i16> %a, <8 x i16> %b) #1 {
// CHECK-LABEL: define dso_local <8 x i16> @test_vextq_u16(<8 x i16> %a, <8 x i16> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <8 x i16> %a to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>
@ -144,7 +144,7 @@ uint16x8_t test_vextq_u16(uint16x8_t a, uint16x8_t b) {
return vextq_u16(a, b, 3);
}
// CHECK-LABEL: define <4 x i32> @test_vextq_u32(<4 x i32> %a, <4 x i32> %b) #1 {
// CHECK-LABEL: define dso_local <4 x i32> @test_vextq_u32(<4 x i32> %a, <4 x i32> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <4 x i32> %a to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <4 x i32> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x i32>
@ -155,7 +155,7 @@ uint32x4_t test_vextq_u32(uint32x4_t a, uint32x4_t b) {
return vextq_u32(a, b, 1);
}
// CHECK-LABEL: define <2 x i64> @test_vextq_u64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK-LABEL: define dso_local <2 x i64> @test_vextq_u64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <2 x i64> %a to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>
@ -166,7 +166,7 @@ uint64x2_t test_vextq_u64(uint64x2_t a, uint64x2_t b) {
return vextq_u64(a, b, 1);
}
// CHECK-LABEL: define <2 x float> @test_vext_f32(<2 x float> %a, <2 x float> %b) #0 {
// CHECK-LABEL: define dso_local <2 x float> @test_vext_f32(<2 x float> %a, <2 x float> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast <2 x float> %a to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <2 x float> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float>
@ -177,7 +177,7 @@ float32x2_t test_vext_f32(float32x2_t a, float32x2_t b) {
return vext_f32(a, b, 1);
}
// CHECK-LABEL: define <1 x double> @test_vext_f64(<1 x double> %a, <1 x double> %b) #0 {
// CHECK-LABEL: define dso_local <1 x double> @test_vext_f64(<1 x double> %a, <1 x double> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <1 x double> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x double>
@ -188,7 +188,7 @@ float64x1_t test_vext_f64(float64x1_t a, float64x1_t b) {
return vext_f64(a, b, 0);
}
// CHECK-LABEL: define <4 x float> @test_vextq_f32(<4 x float> %a, <4 x float> %b) #1 {
// CHECK-LABEL: define dso_local <4 x float> @test_vextq_f32(<4 x float> %a, <4 x float> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <4 x float> %a to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <4 x float> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float>
@ -199,7 +199,7 @@ float32x4_t test_vextq_f32(float32x4_t a, float32x4_t b) {
return vextq_f32(a, b, 1);
}
// CHECK-LABEL: define <2 x double> @test_vextq_f64(<2 x double> %a, <2 x double> %b) #1 {
// CHECK-LABEL: define dso_local <2 x double> @test_vextq_f64(<2 x double> %a, <2 x double> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <2 x double> %a to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <2 x double> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x double>
@ -210,14 +210,14 @@ float64x2_t test_vextq_f64(float64x2_t a, float64x2_t b) {
return vextq_f64(a, b, 1);
}
// CHECK-LABEL: define <8 x i8> @test_vext_p8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vext_p8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK: [[VEXT:%.*]] = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9>
// CHECK: ret <8 x i8> [[VEXT]]
poly8x8_t test_vext_p8(poly8x8_t a, poly8x8_t b) {
return vext_p8(a, b, 2);
}
// CHECK-LABEL: define <4 x i16> @test_vext_p16(<4 x i16> %a, <4 x i16> %b) #0 {
// CHECK-LABEL: define dso_local <4 x i16> @test_vext_p16(<4 x i16> %a, <4 x i16> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast <4 x i16> %a to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <4 x i16>
@ -228,14 +228,14 @@ poly16x4_t test_vext_p16(poly16x4_t a, poly16x4_t b) {
return vext_p16(a, b, 3);
}
// CHECK-LABEL: define <16 x i8> @test_vextq_p8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK-LABEL: define dso_local <16 x i8> @test_vextq_p8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK: [[VEXT:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17>
// CHECK: ret <16 x i8> [[VEXT]]
poly8x16_t test_vextq_p8(poly8x16_t a, poly8x16_t b) {
return vextq_p8(a, b, 2);
}
// CHECK-LABEL: define <8 x i16> @test_vextq_p16(<8 x i16> %a, <8 x i16> %b) #1 {
// CHECK-LABEL: define dso_local <8 x i16> @test_vextq_p16(<8 x i16> %a, <8 x i16> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <8 x i16> %a to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <8 x i16>

42
clang/test/CodeGen/aarch64-neon-fcvt-intrinsics.c
View File

@ -5,147 +5,147 @@
#include <arm_neon.h>
// CHECK-LABEL: define float @test_vcvtxd_f32_f64(double %a) #0 {
// CHECK-LABEL: define dso_local float @test_vcvtxd_f32_f64(double %a) #0 {
// CHECK: [[VCVTXD_F32_F64_I:%.*]] = call float @llvm.aarch64.sisd.fcvtxn(double %a) #2
// CHECK: ret float [[VCVTXD_F32_F64_I]]
float32_t test_vcvtxd_f32_f64(float64_t a) {
return (float32_t)vcvtxd_f32_f64(a);
}
// CHECK-LABEL: define i32 @test_vcvtas_s32_f32(float %a) #0 {
// CHECK-LABEL: define dso_local i32 @test_vcvtas_s32_f32(float %a) #0 {
// CHECK: [[VCVTAS_S32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtas.i32.f32(float %a) #2
// CHECK: ret i32 [[VCVTAS_S32_F32_I]]
int32_t test_vcvtas_s32_f32(float32_t a) {
return (int32_t)vcvtas_s32_f32(a);
}
// CHECK-LABEL: define i64 @test_test_vcvtad_s64_f64(double %a) #0 {
// CHECK-LABEL: define dso_local i64 @test_test_vcvtad_s64_f64(double %a) #0 {
// CHECK: [[VCVTAD_S64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtas.i64.f64(double %a) #2
// CHECK: ret i64 [[VCVTAD_S64_F64_I]]
int64_t test_test_vcvtad_s64_f64(float64_t a) {
return (int64_t)vcvtad_s64_f64(a);
}
// CHECK-LABEL: define i32 @test_vcvtas_u32_f32(float %a) #0 {
// CHECK-LABEL: define dso_local i32 @test_vcvtas_u32_f32(float %a) #0 {
// CHECK: [[VCVTAS_U32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtau.i32.f32(float %a) #2
// CHECK: ret i32 [[VCVTAS_U32_F32_I]]
uint32_t test_vcvtas_u32_f32(float32_t a) {
return (uint32_t)vcvtas_u32_f32(a);
}
// CHECK-LABEL: define i64 @test_vcvtad_u64_f64(double %a) #0 {
// CHECK-LABEL: define dso_local i64 @test_vcvtad_u64_f64(double %a) #0 {
// CHECK: [[VCVTAD_U64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtau.i64.f64(double %a) #2
// CHECK: ret i64 [[VCVTAD_U64_F64_I]]
uint64_t test_vcvtad_u64_f64(float64_t a) {
return (uint64_t)vcvtad_u64_f64(a);
}
// CHECK-LABEL: define i32 @test_vcvtms_s32_f32(float %a) #0 {
// CHECK-LABEL: define dso_local i32 @test_vcvtms_s32_f32(float %a) #0 {
// CHECK: [[VCVTMS_S32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtms.i32.f32(float %a) #2
// CHECK: ret i32 [[VCVTMS_S32_F32_I]]
int32_t test_vcvtms_s32_f32(float32_t a) {
return (int32_t)vcvtms_s32_f32(a);
}
// CHECK-LABEL: define i64 @test_vcvtmd_s64_f64(double %a) #0 {
// CHECK-LABEL: define dso_local i64 @test_vcvtmd_s64_f64(double %a) #0 {
// CHECK: [[VCVTMD_S64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtms.i64.f64(double %a) #2
// CHECK: ret i64 [[VCVTMD_S64_F64_I]]
int64_t test_vcvtmd_s64_f64(float64_t a) {
return (int64_t)vcvtmd_s64_f64(a);
}
// CHECK-LABEL: define i32 @test_vcvtms_u32_f32(float %a) #0 {
// CHECK-LABEL: define dso_local i32 @test_vcvtms_u32_f32(float %a) #0 {
// CHECK: [[VCVTMS_U32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtmu.i32.f32(float %a) #2
// CHECK: ret i32 [[VCVTMS_U32_F32_I]]
uint32_t test_vcvtms_u32_f32(float32_t a) {
return (uint32_t)vcvtms_u32_f32(a);
}
// CHECK-LABEL: define i64 @test_vcvtmd_u64_f64(double %a) #0 {
// CHECK-LABEL: define dso_local i64 @test_vcvtmd_u64_f64(double %a) #0 {
// CHECK: [[VCVTMD_U64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtmu.i64.f64(double %a) #2
// CHECK: ret i64 [[VCVTMD_U64_F64_I]]
uint64_t test_vcvtmd_u64_f64(float64_t a) {
return (uint64_t)vcvtmd_u64_f64(a);
}
// CHECK-LABEL: define i32 @test_vcvtns_s32_f32(float %a) #0 {
// CHECK-LABEL: define dso_local i32 @test_vcvtns_s32_f32(float %a) #0 {
// CHECK: [[VCVTNS_S32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtns.i32.f32(float %a) #2
// CHECK: ret i32 [[VCVTNS_S32_F32_I]]
int32_t test_vcvtns_s32_f32(float32_t a) {
return (int32_t)vcvtns_s32_f32(a);
}
// CHECK-LABEL: define i64 @test_vcvtnd_s64_f64(double %a) #0 {
// CHECK-LABEL: define dso_local i64 @test_vcvtnd_s64_f64(double %a) #0 {
// CHECK: [[VCVTND_S64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtns.i64.f64(double %a) #2
// CHECK: ret i64 [[VCVTND_S64_F64_I]]
int64_t test_vcvtnd_s64_f64(float64_t a) {
return (int64_t)vcvtnd_s64_f64(a);
}
// CHECK-LABEL: define i32 @test_vcvtns_u32_f32(float %a) #0 {
// CHECK-LABEL: define dso_local i32 @test_vcvtns_u32_f32(float %a) #0 {
// CHECK: [[VCVTNS_U32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtnu.i32.f32(float %a) #2
// CHECK: ret i32 [[VCVTNS_U32_F32_I]]
uint32_t test_vcvtns_u32_f32(float32_t a) {
return (uint32_t)vcvtns_u32_f32(a);
}
// CHECK-LABEL: define i64 @test_vcvtnd_u64_f64(double %a) #0 {
// CHECK-LABEL: define dso_local i64 @test_vcvtnd_u64_f64(double %a) #0 {
// CHECK: [[VCVTND_U64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtnu.i64.f64(double %a) #2
// CHECK: ret i64 [[VCVTND_U64_F64_I]]
uint64_t test_vcvtnd_u64_f64(float64_t a) {
return (uint64_t)vcvtnd_u64_f64(a);
}
// CHECK-LABEL: define i32 @test_vcvtps_s32_f32(float %a) #0 {
// CHECK-LABEL: define dso_local i32 @test_vcvtps_s32_f32(float %a) #0 {
// CHECK: [[VCVTPS_S32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtps.i32.f32(float %a) #2
// CHECK: ret i32 [[VCVTPS_S32_F32_I]]
int32_t test_vcvtps_s32_f32(float32_t a) {
return (int32_t)vcvtps_s32_f32(a);
}
// CHECK-LABEL: define i64 @test_vcvtpd_s64_f64(double %a) #0 {
// CHECK-LABEL: define dso_local i64 @test_vcvtpd_s64_f64(double %a) #0 {
// CHECK: [[VCVTPD_S64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtps.i64.f64(double %a) #2
// CHECK: ret i64 [[VCVTPD_S64_F64_I]]
int64_t test_vcvtpd_s64_f64(float64_t a) {
return (int64_t)vcvtpd_s64_f64(a);
}
// CHECK-LABEL: define i32 @test_vcvtps_u32_f32(float %a) #0 {
// CHECK-LABEL: define dso_local i32 @test_vcvtps_u32_f32(float %a) #0 {
// CHECK: [[VCVTPS_U32_F32_I:%.*]] = call i32 @llvm.aarch64.neon.fcvtpu.i32.f32(float %a) #2
// CHECK: ret i32 [[VCVTPS_U32_F32_I]]
uint32_t test_vcvtps_u32_f32(float32_t a) {
return (uint32_t)vcvtps_u32_f32(a);
}
// CHECK-LABEL: define i64 @test_vcvtpd_u64_f64(double %a) #0 {
// CHECK-LABEL: define dso_local i64 @test_vcvtpd_u64_f64(double %a) #0 {
// CHECK: [[VCVTPD_U64_F64_I:%.*]] = call i64 @llvm.aarch64.neon.fcvtpu.i64.f64(double %a) #2
// CHECK: ret i64 [[VCVTPD_U64_F64_I]]
uint64_t test_vcvtpd_u64_f64(float64_t a) {
return (uint64_t)vcvtpd_u64_f64(a);
}
// CHECK-LABEL: define i32 @test_vcvts_s32_f32(float %a) #0 {
// CHECK-LABEL: define dso_local i32 @test_vcvts_s32_f32(float %a) #0 {
// CHECK: [[TMP0:%.*]] = fptosi float %a to i32
// CHECK: ret i32 [[TMP0]]
int32_t test_vcvts_s32_f32(float32_t a) {
return (int32_t)vcvts_s32_f32(a);
}
// CHECK-LABEL: define i64 @test_vcvtd_s64_f64(double %a) #0 {
// CHECK-LABEL: define dso_local i64 @test_vcvtd_s64_f64(double %a) #0 {
// CHECK: [[TMP0:%.*]] = fptosi double %a to i64
// CHECK: ret i64 [[TMP0]]
int64_t test_vcvtd_s64_f64(float64_t a) {
return (int64_t)vcvtd_s64_f64(a);
}
// CHECK-LABEL: define i32 @test_vcvts_u32_f32(float %a) #0 {
// CHECK-LABEL: define dso_local i32 @test_vcvts_u32_f32(float %a) #0 {
// CHECK: [[TMP0:%.*]] = fptoui float %a to i32
// CHECK: ret i32 [[TMP0]]
uint32_t test_vcvts_u32_f32(float32_t a) {
return (uint32_t)vcvts_u32_f32(a);
}
// CHECK-LABEL: define i64 @test_vcvtd_u64_f64(double %a) #0 {
// CHECK-LABEL: define dso_local i64 @test_vcvtd_u64_f64(double %a) #0 {
// CHECK: [[TMP0:%.*]] = fptoui double %a to i64
// CHECK: ret i64 [[TMP0]]
uint64_t test_vcvtd_u64_f64(float64_t a) {

48
clang/test/CodeGen/aarch64-neon-fma.c
View File

@ -4,7 +4,7 @@
#include <arm_neon.h>
// CHECK-LABEL: define <2 x float> @test_vmla_n_f32(<2 x float> %a, <2 x float> %b, float %c) #0 {
// CHECK-LABEL: define dso_local <2 x float> @test_vmla_n_f32(<2 x float> %a, <2 x float> %b, float %c) #0 {
// CHECK: [[VECINIT_I:%.*]] = insertelement <2 x float> undef, float %c, i32 0
// CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x float> [[VECINIT_I]], float %c, i32 1
// CHECK: [[MUL_I:%.*]] = fmul <2 x float> %b, [[VECINIT1_I]]
@ -14,7 +14,7 @@ float32x2_t test_vmla_n_f32(float32x2_t a, float32x2_t b, float32_t c) {
return vmla_n_f32(a, b, c);
}
// CHECK-LABEL: define <4 x float> @test_vmlaq_n_f32(<4 x float> %a, <4 x float> %b, float %c) #1 {
// CHECK-LABEL: define dso_local <4 x float> @test_vmlaq_n_f32(<4 x float> %a, <4 x float> %b, float %c) #1 {
// CHECK: [[VECINIT_I:%.*]] = insertelement <4 x float> undef, float %c, i32 0
// CHECK: [[VECINIT1_I:%.*]] = insertelement <4 x float> [[VECINIT_I]], float %c, i32 1
// CHECK: [[VECINIT2_I:%.*]] = insertelement <4 x float> [[VECINIT1_I]], float %c, i32 2
@ -26,7 +26,7 @@ float32x4_t test_vmlaq_n_f32(float32x4_t a, float32x4_t b, float32_t c) {
return vmlaq_n_f32(a, b, c);
}
// CHECK-LABEL: define <2 x double> @test_vmlaq_n_f64(<2 x double> %a, <2 x double> %b, double %c) #1 {
// CHECK-LABEL: define dso_local <2 x double> @test_vmlaq_n_f64(<2 x double> %a, <2 x double> %b, double %c) #1 {
// CHECK: [[VECINIT_I:%.*]] = insertelement <2 x double> undef, double %c, i32 0
// CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x double> [[VECINIT_I]], double %c, i32 1
// CHECK: [[MUL_I:%.*]] = fmul <2 x double> %b, [[VECINIT1_I]]
@ -36,7 +36,7 @@ float64x2_t test_vmlaq_n_f64(float64x2_t a, float64x2_t b, float64_t c) {
return vmlaq_n_f64(a, b, c);
}
// CHECK-LABEL: define <4 x float> @test_vmlsq_n_f32(<4 x float> %a, <4 x float> %b, float %c) #1 {
// CHECK-LABEL: define dso_local <4 x float> @test_vmlsq_n_f32(<4 x float> %a, <4 x float> %b, float %c) #1 {
// CHECK: [[VECINIT_I:%.*]] = insertelement <4 x float> undef, float %c, i32 0
// CHECK: [[VECINIT1_I:%.*]] = insertelement <4 x float> [[VECINIT_I]], float %c, i32 1
// CHECK: [[VECINIT2_I:%.*]] = insertelement <4 x float> [[VECINIT1_I]], float %c, i32 2
@ -48,7 +48,7 @@ float32x4_t test_vmlsq_n_f32(float32x4_t a, float32x4_t b, float32_t c) {
return vmlsq_n_f32(a, b, c);
}
// CHECK-LABEL: define <2 x float> @test_vmls_n_f32(<2 x float> %a, <2 x float> %b, float %c) #0 {
// CHECK-LABEL: define dso_local <2 x float> @test_vmls_n_f32(<2 x float> %a, <2 x float> %b, float %c) #0 {
// CHECK: [[VECINIT_I:%.*]] = insertelement <2 x float> undef, float %c, i32 0
// CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x float> [[VECINIT_I]], float %c, i32 1
// CHECK: [[MUL_I:%.*]] = fmul <2 x float> %b, [[VECINIT1_I]]
@ -58,7 +58,7 @@ float32x2_t test_vmls_n_f32(float32x2_t a, float32x2_t b, float32_t c) {
return vmls_n_f32(a, b, c);
}
// CHECK-LABEL: define <2 x double> @test_vmlsq_n_f64(<2 x double> %a, <2 x double> %b, double %c) #1 {
// CHECK-LABEL: define dso_local <2 x double> @test_vmlsq_n_f64(<2 x double> %a, <2 x double> %b, double %c) #1 {
// CHECK: [[VECINIT_I:%.*]] = insertelement <2 x double> undef, double %c, i32 0
// CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x double> [[VECINIT_I]], double %c, i32 1
// CHECK: [[MUL_I:%.*]] = fmul <2 x double> %b, [[VECINIT1_I]]
@ -68,7 +68,7 @@ float64x2_t test_vmlsq_n_f64(float64x2_t a, float64x2_t b, float64_t c) {
return vmlsq_n_f64(a, b, c);
}
// CHECK-LABEL: define <2 x float> @test_vmla_lane_f32_0(<2 x float> %a, <2 x float> %b, <2 x float> %v) #0 {
// CHECK-LABEL: define dso_local <2 x float> @test_vmla_lane_f32_0(<2 x float> %a, <2 x float> %b, <2 x float> %v) #0 {
// CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x float> %v, <2 x float> %v, <2 x i32> zeroinitializer
// CHECK: [[MUL:%.*]] = fmul <2 x float> %b, [[SHUFFLE]]
// CHECK: [[ADD:%.*]] = fadd <2 x float> %a, [[MUL]]
@ -77,7 +77,7 @@ float32x2_t test_vmla_lane_f32_0(float32x2_t a, float32x2_t b, float32x2_t v) {
return vmla_lane_f32(a, b, v, 0);
}
// CHECK-LABEL: define <4 x float> @test_vmlaq_lane_f32_0(<4 x float> %a, <4 x float> %b, <2 x float> %v) #1 {
// CHECK-LABEL: define dso_local <4 x float> @test_vmlaq_lane_f32_0(<4 x float> %a, <4 x float> %b, <2 x float> %v) #1 {
// CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x float> %v, <2 x float> %v, <4 x i32> zeroinitializer
// CHECK: [[MUL:%.*]] = fmul <4 x float> %b, [[SHUFFLE]]
// CHECK: [[ADD:%.*]] = fadd <4 x float> %a, [[MUL]]
@ -86,7 +86,7 @@ float32x4_t test_vmlaq_lane_f32_0(float32x4_t a, float32x4_t b, float32x2_t v) {
return vmlaq_lane_f32(a, b, v, 0);
}
// CHECK-LABEL: define <2 x float> @test_vmla_laneq_f32_0(<2 x float> %a, <2 x float> %b, <4 x float> %v) #1 {
// CHECK-LABEL: define dso_local <2 x float> @test_vmla_laneq_f32_0(<2 x float> %a, <2 x float> %b, <4 x float> %v) #1 {
// CHECK: [[SHUFFLE:%.*]] = shufflevector <4 x float> %v, <4 x float> %v, <2 x i32> zeroinitializer
// CHECK: [[MUL:%.*]] = fmul <2 x float> %b, [[SHUFFLE]]
// CHECK: [[ADD:%.*]] = fadd <2 x float> %a, [[MUL]]
@ -95,7 +95,7 @@ float32x2_t test_vmla_laneq_f32_0(float32x2_t a, float32x2_t b, float32x4_t v) {
return vmla_laneq_f32(a, b, v, 0);
}
// CHECK-LABEL: define <4 x float> @test_vmlaq_laneq_f32_0(<4 x float> %a, <4 x float> %b, <4 x float> %v) #1 {
// CHECK-LABEL: define dso_local <4 x float> @test_vmlaq_laneq_f32_0(<4 x float> %a, <4 x float> %b, <4 x float> %v) #1 {
// CHECK: [[SHUFFLE:%.*]] = shufflevector <4 x float> %v, <4 x float> %v, <4 x i32> zeroinitializer
// CHECK: [[MUL:%.*]] = fmul <4 x float> %b, [[SHUFFLE]]
// CHECK: [[ADD:%.*]] = fadd <4 x float> %a, [[MUL]]
@ -104,7 +104,7 @@ float32x4_t test_vmlaq_laneq_f32_0(float32x4_t a, float32x4_t b, float32x4_t v)
return vmlaq_laneq_f32(a, b, v, 0);
}
// CHECK-LABEL: define <2 x float> @test_vmls_lane_f32_0(<2 x float> %a, <2 x float> %b, <2 x float> %v) #0 {
// CHECK-LABEL: define dso_local <2 x float> @test_vmls_lane_f32_0(<2 x float> %a, <2 x float> %b, <2 x float> %v) #0 {
// CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x float> %v, <2 x float> %v, <2 x i32> zeroinitializer
// CHECK: [[MUL:%.*]] = fmul <2 x float> %b, [[SHUFFLE]]
// CHECK: [[SUB:%.*]] = fsub <2 x float> %a, [[MUL]]
@ -113,7 +113,7 @@ float32x2_t test_vmls_lane_f32_0(float32x2_t a, float32x2_t b, float32x2_t v) {
return vmls_lane_f32(a, b, v, 0);
}
// CHECK-LABEL: define <4 x float> @test_vmlsq_lane_f32_0(<4 x float> %a, <4 x float> %b, <2 x float> %v) #1 {
// CHECK-LABEL: define dso_local <4 x float> @test_vmlsq_lane_f32_0(<4 x float> %a, <4 x float> %b, <2 x float> %v) #1 {
// CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x float> %v, <2 x float> %v, <4 x i32> zeroinitializer
// CHECK: [[MUL:%.*]] = fmul <4 x float> %b, [[SHUFFLE]]
// CHECK: [[SUB:%.*]] = fsub <4 x float> %a, [[MUL]]
@ -122,7 +122,7 @@ float32x4_t test_vmlsq_lane_f32_0(float32x4_t a, float32x4_t b, float32x2_t v) {
return vmlsq_lane_f32(a, b, v, 0);
}
// CHECK-LABEL: define <2 x float> @test_vmls_laneq_f32_0(<2 x float> %a, <2 x float> %b, <4 x float> %v) #1 {
// CHECK-LABEL: define dso_local <2 x float> @test_vmls_laneq_f32_0(<2 x float> %a, <2 x float> %b, <4 x float> %v) #1 {
// CHECK: [[SHUFFLE:%.*]] = shufflevector <4 x float> %v, <4 x float> %v, <2 x i32> zeroinitializer
// CHECK: [[MUL:%.*]] = fmul <2 x float> %b, [[SHUFFLE]]
// CHECK: [[SUB:%.*]] = fsub <2 x float> %a, [[MUL]]
@ -131,7 +131,7 @@ float32x2_t test_vmls_laneq_f32_0(float32x2_t a, float32x2_t b, float32x4_t v) {
return vmls_laneq_f32(a, b, v, 0);
}
// CHECK-LABEL: define <4 x float> @test_vmlsq_laneq_f32_0(<4 x float> %a, <4 x float> %b, <4 x float> %v) #1 {
// CHECK-LABEL: define dso_local <4 x float> @test_vmlsq_laneq_f32_0(<4 x float> %a, <4 x float> %b, <4 x float> %v) #1 {
// CHECK: [[SHUFFLE:%.*]] = shufflevector <4 x float> %v, <4 x float> %v, <4 x i32> zeroinitializer
// CHECK: [[MUL:%.*]] = fmul <4 x float> %b, [[SHUFFLE]]
// CHECK: [[SUB:%.*]] = fsub <4 x float> %a, [[MUL]]
@ -140,7 +140,7 @@ float32x4_t test_vmlsq_laneq_f32_0(float32x4_t a, float32x4_t b, float32x4_t v)
return vmlsq_laneq_f32(a, b, v, 0);
}
// CHECK-LABEL: define <2 x float> @test_vmla_lane_f32(<2 x float> %a, <2 x float> %b, <2 x float> %v) #0 {
// CHECK-LABEL: define dso_local <2 x float> @test_vmla_lane_f32(<2 x float> %a, <2 x float> %b, <2 x float> %v) #0 {
// CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x float> %v, <2 x float> %v, <2 x i32> <i32 1, i32 1>
// CHECK: [[MUL:%.*]] = fmul <2 x float> %b, [[SHUFFLE]]
// CHECK: [[ADD:%.*]] = fadd <2 x float> %a, [[MUL]]
@ -149,7 +149,7 @@ float32x2_t test_vmla_lane_f32(float32x2_t a, float32x2_t b, float32x2_t v) {
return vmla_lane_f32(a, b, v, 1);
}
// CHECK-LABEL: define <4 x float> @test_vmlaq_lane_f32(<4 x float> %a, <4 x float> %b, <2 x float> %v) #1 {
// CHECK-LABEL: define dso_local <4 x float> @test_vmlaq_lane_f32(<4 x float> %a, <4 x float> %b, <2 x float> %v) #1 {
// CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x float> %v, <2 x float> %v, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
// CHECK: [[MUL:%.*]] = fmul <4 x float> %b, [[SHUFFLE]]
// CHECK: [[ADD:%.*]] = fadd <4 x float> %a, [[MUL]]
@ -158,7 +158,7 @@ float32x4_t test_vmlaq_lane_f32(float32x4_t a, float32x4_t b, float32x2_t v) {
return vmlaq_lane_f32(a, b, v, 1);
}
// CHECK-LABEL: define <2 x float> @test_vmla_laneq_f32(<2 x float> %a, <2 x float> %b, <4 x float> %v) #1 {
// CHECK-LABEL: define dso_local <2 x float> @test_vmla_laneq_f32(<2 x float> %a, <2 x float> %b, <4 x float> %v) #1 {
// CHECK: [[SHUFFLE:%.*]] = shufflevector <4 x float> %v, <4 x float> %v, <2 x i32> <i32 3, i32 3>
// CHECK: [[MUL:%.*]] = fmul <2 x float> %b, [[SHUFFLE]]
// CHECK: [[ADD:%.*]] = fadd <2 x float> %a, [[MUL]]
@ -167,7 +167,7 @@ float32x2_t test_vmla_laneq_f32(float32x2_t a, float32x2_t b, float32x4_t v) {
return vmla_laneq_f32(a, b, v, 3);
}
// CHECK-LABEL: define <4 x float> @test_vmlaq_laneq_f32(<4 x float> %a, <4 x float> %b, <4 x float> %v) #1 {
// CHECK-LABEL: define dso_local <4 x float> @test_vmlaq_laneq_f32(<4 x float> %a, <4 x float> %b, <4 x float> %v) #1 {
// CHECK: [[SHUFFLE:%.*]] = shufflevector <4 x float> %v, <4 x float> %v, <4 x i32> <i32 3, i32 3, i32 3, i32 3>
// CHECK: [[MUL:%.*]] = fmul <4 x float> %b, [[SHUFFLE]]
// CHECK: [[ADD:%.*]] = fadd <4 x float> %a, [[MUL]]
@ -176,7 +176,7 @@ float32x4_t test_vmlaq_laneq_f32(float32x4_t a, float32x4_t b, float32x4_t v) {
return vmlaq_laneq_f32(a, b, v, 3);
}
// CHECK-LABEL: define <2 x float> @test_vmls_lane_f32(<2 x float> %a, <2 x float> %b, <2 x float> %v) #0 {
// CHECK-LABEL: define dso_local <2 x float> @test_vmls_lane_f32(<2 x float> %a, <2 x float> %b, <2 x float> %v) #0 {
// CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x float> %v, <2 x float> %v, <2 x i32> <i32 1, i32 1>
// CHECK: [[MUL:%.*]] = fmul <2 x float> %b, [[SHUFFLE]]
// CHECK: [[SUB:%.*]] = fsub <2 x float> %a, [[MUL]]
@ -185,7 +185,7 @@ float32x2_t test_vmls_lane_f32(float32x2_t a, float32x2_t b, float32x2_t v) {
return vmls_lane_f32(a, b, v, 1);
}
// CHECK-LABEL: define <4 x float> @test_vmlsq_lane_f32(<4 x float> %a, <4 x float> %b, <2 x float> %v) #1 {
// CHECK-LABEL: define dso_local <4 x float> @test_vmlsq_lane_f32(<4 x float> %a, <4 x float> %b, <2 x float> %v) #1 {
// CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x float> %v, <2 x float> %v, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
// CHECK: [[MUL:%.*]] = fmul <4 x float> %b, [[SHUFFLE]]
// CHECK: [[SUB:%.*]] = fsub <4 x float> %a, [[MUL]]
@ -193,7 +193,7 @@ float32x2_t test_vmls_lane_f32(float32x2_t a, float32x2_t b, float32x2_t v) {
float32x4_t test_vmlsq_lane_f32(float32x4_t a, float32x4_t b, float32x2_t v) {
return vmlsq_lane_f32(a, b, v, 1);
}
// CHECK-LABEL: define <2 x float> @test_vmls_laneq_f32(<2 x float> %a, <2 x float> %b, <4 x float> %v) #1 {
// CHECK-LABEL: define dso_local <2 x float> @test_vmls_laneq_f32(<2 x float> %a, <2 x float> %b, <4 x float> %v) #1 {
// CHECK: [[SHUFFLE:%.*]] = shufflevector <4 x float> %v, <4 x float> %v, <2 x i32> <i32 3, i32 3>
// CHECK: [[MUL:%.*]] = fmul <2 x float> %b, [[SHUFFLE]]
// CHECK: [[SUB:%.*]] = fsub <2 x float> %a, [[MUL]]
@ -202,7 +202,7 @@ float32x2_t test_vmls_laneq_f32(float32x2_t a, float32x2_t b, float32x4_t v) {
return vmls_laneq_f32(a, b, v, 3);
}
// CHECK-LABEL: define <4 x float> @test_vmlsq_laneq_f32(<4 x float> %a, <4 x float> %b, <4 x float> %v) #1 {
// CHECK-LABEL: define dso_local <4 x float> @test_vmlsq_laneq_f32(<4 x float> %a, <4 x float> %b, <4 x float> %v) #1 {
// CHECK: [[SHUFFLE:%.*]] = shufflevector <4 x float> %v, <4 x float> %v, <4 x i32> <i32 3, i32 3, i32 3, i32 3>
// CHECK: [[MUL:%.*]] = fmul <4 x float> %b, [[SHUFFLE]]
// CHECK: [[SUB:%.*]] = fsub <4 x float> %a, [[MUL]]
@ -211,7 +211,7 @@ float32x4_t test_vmlsq_laneq_f32(float32x4_t a, float32x4_t b, float32x4_t v) {
return vmlsq_laneq_f32(a, b, v, 3);
}
// CHECK-LABEL: define <2 x double> @test_vfmaq_n_f64(<2 x double> %a, <2 x double> %b, double %c) #1 {
// CHECK-LABEL: define dso_local <2 x double> @test_vfmaq_n_f64(<2 x double> %a, <2 x double> %b, double %c) #1 {
// CHECK: [[VECINIT_I:%.*]] = insertelement <2 x double> undef, double %c, i32 0
// CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x double> [[VECINIT_I]], double %c, i32 1
// CHECK: [[TMP6:%.*]] = call <2 x double> @llvm.fma.v2f64(<2 x double> %b, <2 x double> [[VECINIT1_I]], <2 x double> %a)
@ -220,7 +220,7 @@ float64x2_t test_vfmaq_n_f64(float64x2_t a, float64x2_t b, float64_t c) {
return vfmaq_n_f64(a, b, c);
}
// CHECK-LABEL: define <2 x double> @test_vfmsq_n_f64(<2 x double> %a, <2 x double> %b, double %c) #1 {
// CHECK-LABEL: define dso_local <2 x double> @test_vfmsq_n_f64(<2 x double> %a, <2 x double> %b, double %c) #1 {
// CHECK: [[SUB_I:%.*]] = fneg <2 x double> %b
// CHECK: [[VECINIT_I:%.*]] = insertelement <2 x double> undef, double %c, i32 0
// CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x double> [[VECINIT_I]], double %c, i32 1

48
clang/test/CodeGen/aarch64-neon-fp16fml.c
View File

@ -10,56 +10,56 @@
// Vector form
float32x2_t test_vfmlal_low_f16(float32x2_t a, float16x4_t b, float16x4_t c) {
// CHECK-LABEL: define <2 x float> @test_vfmlal_low_f16(<2 x float> %a, <4 x half> %b, <4 x half> %c)
// CHECK-LABEL: define dso_local <2 x float> @test_vfmlal_low_f16(<2 x float> %a, <4 x half> %b, <4 x half> %c)
// CHECK: [[RESULT:%.*]] = call <2 x float> @llvm.aarch64.neon.fmlal.v2f32.v4f16(<2 x float> %a, <4 x half> %b, <4 x half> %c)
// CHECK: ret <2 x float> [[RESULT]]
return vfmlal_low_f16(a, b, c);
}
float32x2_t test_vfmlsl_low_f16(float32x2_t a, float16x4_t b, float16x4_t c) {
// CHECK-LABEL: define <2 x float> @test_vfmlsl_low_f16(<2 x float> %a, <4 x half> %b, <4 x half> %c)
// CHECK-LABEL: define dso_local <2 x float> @test_vfmlsl_low_f16(<2 x float> %a, <4 x half> %b, <4 x half> %c)
// CHECK: [[RESULT:%.*]] = call <2 x float> @llvm.aarch64.neon.fmlsl.v2f32.v4f16(<2 x float> %a, <4 x half> %b, <4 x half> %c)
// CHECK: ret <2 x float> [[RESULT]]
return vfmlsl_low_f16(a, b, c);
}
float32x2_t test_vfmlal_high_f16(float32x2_t a, float16x4_t b, float16x4_t c) {
// CHECK-LABEL: define <2 x float> @test_vfmlal_high_f16(<2 x float> %a, <4 x half> %b, <4 x half> %c)
// CHECK-LABEL: define dso_local <2 x float> @test_vfmlal_high_f16(<2 x float> %a, <4 x half> %b, <4 x half> %c)
// CHECK: [[RESULT:%.*]] = call <2 x float> @llvm.aarch64.neon.fmlal2.v2f32.v4f16(<2 x float> %a, <4 x half> %b, <4 x half> %c)
// CHECK: ret <2 x float> [[RESULT]]
return vfmlal_high_f16(a, b, c);
}
float32x2_t test_vfmlsl_high_f16(float32x2_t a, float16x4_t b, float16x4_t c) {
// CHECK-LABEL: define <2 x float> @test_vfmlsl_high_f16(<2 x float> %a, <4 x half> %b, <4 x half> %c)
// CHECK-LABEL: define dso_local <2 x float> @test_vfmlsl_high_f16(<2 x float> %a, <4 x half> %b, <4 x half> %c)
// CHECK: [[RESULT:%.*]] = call <2 x float> @llvm.aarch64.neon.fmlsl2.v2f32.v4f16(<2 x float> %a, <4 x half> %b, <4 x half> %c)
// CHECK: ret <2 x float> [[RESULT]]
return vfmlsl_high_f16(a, b, c);
}
float32x4_t test_vfmlalq_low_f16(float32x4_t a, float16x8_t b, float16x8_t c) {
// CHECK-LABEL: define <4 x float> @test_vfmlalq_low_f16(<4 x float> %a, <8 x half> %b, <8 x half> %c)
// CHECK-LABEL: define dso_local <4 x float> @test_vfmlalq_low_f16(<4 x float> %a, <8 x half> %b, <8 x half> %c)
// CHECK: [[RESULT:%.*]] = call <4 x float> @llvm.aarch64.neon.fmlal.v4f32.v8f16(<4 x float> %a, <8 x half> %b, <8 x half> %c)
// CHECK: ret <4 x float> [[RESULT]]
return vfmlalq_low_f16(a, b, c);
}
float32x4_t test_vfmlslq_low_f16(float32x4_t a, float16x8_t b, float16x8_t c) {
// CHECK-LABEL: define <4 x float> @test_vfmlslq_low_f16(<4 x float> %a, <8 x half> %b, <8 x half> %c)
// CHECK-LABEL: define dso_local <4 x float> @test_vfmlslq_low_f16(<4 x float> %a, <8 x half> %b, <8 x half> %c)
// CHECK: [[RESULT:%.*]] = call <4 x float> @llvm.aarch64.neon.fmlsl.v4f32.v8f16(<4 x float> %a, <8 x half> %b, <8 x half> %c)
// CHECK: ret <4 x float> [[RESULT]]
return vfmlslq_low_f16(a, b, c);
}
float32x4_t test_vfmlalq_high_f16(float32x4_t a, float16x8_t b, float16x8_t c) {
// CHECK-LABEL: define <4 x float> @test_vfmlalq_high_f16(<4 x float> %a, <8 x half> %b, <8 x half> %c)
// CHECK-LABEL: define dso_local <4 x float> @test_vfmlalq_high_f16(<4 x float> %a, <8 x half> %b, <8 x half> %c)
// CHECK: [[RESULT:%.*]] = call <4 x float> @llvm.aarch64.neon.fmlal2.v4f32.v8f16(<4 x float> %a, <8 x half> %b, <8 x half> %c)
// CHECK: ret <4 x float> [[RESULT]]
return vfmlalq_high_f16(a, b, c);
}
float32x4_t test_vfmlslq_high_f16(float32x4_t a, float16x8_t b, float16x8_t c) {
// CHECK-LABEL: define <4 x float> @test_vfmlslq_high_f16(<4 x float> %a, <8 x half> %b, <8 x half> %c)
// CHECK-LABEL: define dso_local <4 x float> @test_vfmlslq_high_f16(<4 x float> %a, <8 x half> %b, <8 x half> %c)
// CHECK: [[RESULT:%.*]] = call <4 x float> @llvm.aarch64.neon.fmlsl2.v4f32.v8f16(<4 x float> %a, <8 x half> %b, <8 x half> %c)
// CHECK: ret <4 x float> [[RESULT]]
return vfmlslq_high_f16(a, b, c);
@ -68,7 +68,7 @@ float32x4_t test_vfmlslq_high_f16(float32x4_t a, float16x8_t b, float16x8_t c) {
// Indexed form
float32x2_t test_vfmlal_lane_low_f16(float32x2_t a, float16x4_t b, float16x4_t c) {
// CHECK-LABEL: define <2 x float> @test_vfmlal_lane_low_f16(<2 x float> %a, <4 x half> %b, <4 x half> %c)
// CHECK-LABEL: define dso_local <2 x float> @test_vfmlal_lane_low_f16(<2 x float> %a, <4 x half> %b, <4 x half> %c)
// CHECK: [[SHUFFLE:%.*]] = shufflevector <4 x half> %c, <4 x half> undef, <4 x i32> zeroinitializer
// CHECK: [[RESULT:%.*]] = call <2 x float> @llvm.aarch64.neon.fmlal.v2f32.v4f16(<2 x float> %a, <4 x half> %b, <4 x half> [[SHUFFLE]])
// CHECK: ret <2 x float> [[RESULT]]
@ -76,7 +76,7 @@ float32x2_t test_vfmlal_lane_low_f16(float32x2_t a, float16x4_t b, float16x4_t c
}
float32x2_t test_vfmlal_lane_high_f16(float32x2_t a, float16x4_t b, float16x4_t c) {
// CHECK-LABEL: define <2 x float> @test_vfmlal_lane_high_f16(<2 x float> %a, <4 x half> %b, <4 x half> %c)
// CHECK-LABEL: define dso_local <2 x float> @test_vfmlal_lane_high_f16(<2 x float> %a, <4 x half> %b, <4 x half> %c)
// CHECK: [[SHUFFLE:%.*]] = shufflevector <4 x half> %c, <4 x half> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
// CHECK: [[RESULT:%.*]] = call <2 x float> @llvm.aarch64.neon.fmlal2.v2f32.v4f16(<2 x float> %a, <4 x half> %b, <4 x half> [[SHUFFLE]])
// CHECK: ret <2 x float> [[RESULT]]
@ -84,7 +84,7 @@ float32x2_t test_vfmlal_lane_high_f16(float32x2_t a, float16x4_t b, float16x4_t
}
float32x4_t test_vfmlalq_lane_low_f16(float32x4_t a, float16x8_t b, float16x4_t c) {
// CHECK-LABEL: define <4 x float> @test_vfmlalq_lane_low_f16(<4 x float> %a, <8 x half> %b, <4 x half> %c)
// CHECK-LABEL: define dso_local <4 x float> @test_vfmlalq_lane_low_f16(<4 x float> %a, <8 x half> %b, <4 x half> %c)
// CHECK: [[SHUFFLE:%.*]] = shufflevector <4 x half> %c, <4 x half> undef, <8 x i32> <i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2>
// CHECK: [[RESULT:%.*]] = call <4 x float> @llvm.aarch64.neon.fmlal.v4f32.v8f16(<4 x float> %a, <8 x half> %b, <8 x half> [[SHUFFLE]])
// CHECK: ret <4 x float> [[RESULT]]
@ -92,7 +92,7 @@ float32x4_t test_vfmlalq_lane_low_f16(float32x4_t a, float16x8_t b, float16x4_t
}
float32x4_t test_vfmlalq_lane_high_f16(float32x4_t a, float16x8_t b, float16x4_t c) {
// CHECK-LABEL: define <4 x float> @test_vfmlalq_lane_high_f16(<4 x float> %a, <8 x half> %b, <4 x half> %c)
// CHECK-LABEL: define dso_local <4 x float> @test_vfmlalq_lane_high_f16(<4 x float> %a, <8 x half> %b, <4 x half> %c)
// CHECK: [[SHUFFLE:%.*]] = shufflevector <4 x half> %c, <4 x half> undef, <8 x i32> <i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3>
// CHECK: [[RESULT:%.*]] = call <4 x float> @llvm.aarch64.neon.fmlal2.v4f32.v8f16(<4 x float> %a, <8 x half> %b, <8 x half> [[SHUFFLE]])
// CHECK: ret <4 x float> [[RESULT]]
@ -100,7 +100,7 @@ float32x4_t test_vfmlalq_lane_high_f16(float32x4_t a, float16x8_t b, float16x4_t
}
float32x2_t test_vfmlal_laneq_low_f16(float32x2_t a, float16x4_t b, float16x8_t c) {
// CHECK-LABEL: define <2 x float> @test_vfmlal_laneq_low_f16(<2 x float> %a, <4 x half> %b, <8 x half> %c)
// CHECK-LABEL: define dso_local <2 x float> @test_vfmlal_laneq_low_f16(<2 x float> %a, <4 x half> %b, <8 x half> %c)
// CHECK: [[SHUFFLE:%.*]] = shufflevector <8 x half> %c, <8 x half> undef, <4 x i32> <i32 4, i32 4, i32 4, i32 4>
// CHECK: [[RESULT:%.*]] = call <2 x float> @llvm.aarch64.neon.fmlal.v2f32.v4f16(<2 x float> %a, <4 x half> %b, <4 x half> [[SHUFFLE]])
// CHECK: ret <2 x float> [[RESULT]]
@ -108,7 +108,7 @@ float32x2_t test_vfmlal_laneq_low_f16(float32x2_t a, float16x4_t b, float16x8_t
}
float32x2_t test_vfmlal_laneq_high_f16(float32x2_t a, float16x4_t b, float16x8_t c) {
// CHECK-LABEL: define <2 x float> @test_vfmlal_laneq_high_f16(<2 x float> %a, <4 x half> %b, <8 x half> %c)
// CHECK-LABEL: define dso_local <2 x float> @test_vfmlal_laneq_high_f16(<2 x float> %a, <4 x half> %b, <8 x half> %c)
// CHECK: [[SHUFFLE:%.*]] = shufflevector <8 x half> %c, <8 x half> undef, <4 x i32> <i32 5, i32 5, i32 5, i32 5>
// CHECK: [[RESULT:%.*]] = call <2 x float> @llvm.aarch64.neon.fmlal2.v2f32.v4f16(<2 x float> %a, <4 x half> %b, <4 x half> [[SHUFFLE]])
// CHECK: ret <2 x float> [[RESULT]]
@ -116,7 +116,7 @@ float32x2_t test_vfmlal_laneq_high_f16(float32x2_t a, float16x4_t b, float16x8_t
}
float32x4_t test_vfmlalq_laneq_low_f16(float32x4_t a, float16x8_t b, float16x8_t c) {
// CHECK-LABEL: define <4 x float> @test_vfmlalq_laneq_low_f16(<4 x float> %a, <8 x half> %b, <8 x half> %c)
// CHECK-LABEL: define dso_local <4 x float> @test_vfmlalq_laneq_low_f16(<4 x float> %a, <8 x half> %b, <8 x half> %c)
// CHECK: [[SHUFFLE:%.*]] = shufflevector <8 x half> %c, <8 x half> undef, <8 x i32> <i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6>
// CHECK: [[RESULT:%.*]] = call <4 x float> @llvm.aarch64.neon.fmlal.v4f32.v8f16(<4 x float> %a, <8 x half> %b, <8 x half> [[SHUFFLE]])
// CHECK: ret <4 x float> [[RESULT]]
@ -124,7 +124,7 @@ float32x4_t test_vfmlalq_laneq_low_f16(float32x4_t a, float16x8_t b, float16x8_t
}
float32x4_t test_vfmlalq_laneq_high_f16(float32x4_t a, float16x8_t b, float16x8_t c) {
// CHECK-LABEL: define <4 x float> @test_vfmlalq_laneq_high_f16(<4 x float> %a, <8 x half> %b, <8 x half> %c)
// CHECK-LABEL: define dso_local <4 x float> @test_vfmlalq_laneq_high_f16(<4 x float> %a, <8 x half> %b, <8 x half> %c)
// CHECK: [[SHUFFLE:%.*]] = shufflevector <8 x half> %c, <8 x half> undef, <8 x i32> <i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7>
// CHECK: [[RESULT:%.*]] = call <4 x float> @llvm.aarch64.neon.fmlal2.v4f32.v8f16(<4 x float> %a, <8 x half> %b, <8 x half> [[SHUFFLE]])
// CHECK: ret <4 x float> [[RESULT]]
@ -132,7 +132,7 @@ float32x4_t test_vfmlalq_laneq_high_f16(float32x4_t a, float16x8_t b, float16x8_
}
float32x2_t test_vfmlsl_lane_low_f16(float32x2_t a, float16x4_t b, float16x4_t c) {
// CHECK-LABEL: define <2 x float> @test_vfmlsl_lane_low_f16(<2 x float> %a, <4 x half> %b, <4 x half> %c)
// CHECK-LABEL: define dso_local <2 x float> @test_vfmlsl_lane_low_f16(<2 x float> %a, <4 x half> %b, <4 x half> %c)
// CHECK: [[SHUFFLE:%.*]] = shufflevector <4 x half> %c, <4 x half> undef, <4 x i32> zeroinitializer
// CHECK: [[RESULT:%.*]] = call <2 x float> @llvm.aarch64.neon.fmlsl.v2f32.v4f16(<2 x float> %a, <4 x half> %b, <4 x half> [[SHUFFLE]])
// CHECK: ret <2 x float> [[RESULT]]
@ -140,7 +140,7 @@ float32x2_t test_vfmlsl_lane_low_f16(float32x2_t a, float16x4_t b, float16x4_t c
}
float32x2_t test_vfmlsl_lane_high_f16(float32x2_t a, float16x4_t b, float16x4_t c) {
// CHECK-LABEL: define <2 x float> @test_vfmlsl_lane_high_f16(<2 x float> %a, <4 x half> %b, <4 x half> %c)
// CHECK-LABEL: define dso_local <2 x float> @test_vfmlsl_lane_high_f16(<2 x float> %a, <4 x half> %b, <4 x half> %c)
// CHECK: [[SHUFFLE:%.*]] = shufflevector <4 x half> %c, <4 x half> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
// CHECK: [[RESULT:%.*]] = call <2 x float> @llvm.aarch64.neon.fmlsl2.v2f32.v4f16(<2 x float> %a, <4 x half> %b, <4 x half> [[SHUFFLE]])
// CHECK: ret <2 x float> [[RESULT]]
@ -148,7 +148,7 @@ float32x2_t test_vfmlsl_lane_high_f16(float32x2_t a, float16x4_t b, float16x4_t
}
float32x4_t test_vfmlslq_lane_low_f16(float32x4_t a, float16x8_t b, float16x4_t c) {
// CHECK-LABEL: define <4 x float> @test_vfmlslq_lane_low_f16(<4 x float> %a, <8 x half> %b, <4 x half> %c)
// CHECK-LABEL: define dso_local <4 x float> @test_vfmlslq_lane_low_f16(<4 x float> %a, <8 x half> %b, <4 x half> %c)
// CHECK: [[SHUFFLE:%.*]] = shufflevector <4 x half> %c, <4 x half> undef, <8 x i32> <i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2>
// CHECK: [[RESULT:%.*]] = call <4 x float> @llvm.aarch64.neon.fmlsl.v4f32.v8f16(<4 x float> %a, <8 x half> %b, <8 x half> [[SHUFFLE]])
// CHECK: ret <4 x float> [[RESULT]]
@ -156,7 +156,7 @@ float32x4_t test_vfmlslq_lane_low_f16(float32x4_t a, float16x8_t b, float16x4_t
}
float32x4_t test_vfmlslq_lane_high_f16(float32x4_t a, float16x8_t b, float16x4_t c) {
// CHECK-LABEL: define <4 x float> @test_vfmlslq_lane_high_f16(<4 x float> %a, <8 x half> %b, <4 x half> %c)
// CHECK-LABEL: define dso_local <4 x float> @test_vfmlslq_lane_high_f16(<4 x float> %a, <8 x half> %b, <4 x half> %c)
// CHECK: [[SHUFFLE:%.*]] = shufflevector <4 x half> %c, <4 x half> undef, <8 x i32> <i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3>
// CHECK: [[RESULT:%.*]] = call <4 x float> @llvm.aarch64.neon.fmlsl2.v4f32.v8f16(<4 x float> %a, <8 x half> %b, <8 x half> [[SHUFFLE]])
// CHECK: ret <4 x float> [[RESULT]]
@ -164,7 +164,7 @@ float32x4_t test_vfmlslq_lane_high_f16(float32x4_t a, float16x8_t b, float16x4_t
}
float32x2_t test_vfmlsl_laneq_low_f16(float32x2_t a, float16x4_t b, float16x8_t c) {
// CHECK-LABEL: define <2 x float> @test_vfmlsl_laneq_low_f16(<2 x float> %a, <4 x half> %b, <8 x half> %c)
// CHECK-LABEL: define dso_local <2 x float> @test_vfmlsl_laneq_low_f16(<2 x float> %a, <4 x half> %b, <8 x half> %c)
// CHECK: [[SHUFFLE:%.*]] = shufflevector <8 x half> %c, <8 x half> undef, <4 x i32> <i32 4, i32 4, i32 4, i32 4>
// CHECK: [[RESULT:%.*]] = call <2 x float> @llvm.aarch64.neon.fmlsl.v2f32.v4f16(<2 x float> %a, <4 x half> %b, <4 x half> [[SHUFFLE]])
// CHECK: ret <2 x float> [[RESULT]]
@ -172,7 +172,7 @@ float32x2_t test_vfmlsl_laneq_low_f16(float32x2_t a, float16x4_t b, float16x8_t
}
float32x2_t test_vfmlsl_laneq_high_f16(float32x2_t a, float16x4_t b, float16x8_t c) {
// CHECK-LABEL: define <2 x float> @test_vfmlsl_laneq_high_f16(<2 x float> %a, <4 x half> %b, <8 x half> %c)
// CHECK-LABEL: define dso_local <2 x float> @test_vfmlsl_laneq_high_f16(<2 x float> %a, <4 x half> %b, <8 x half> %c)
// CHECK: [[SHUFFLE:%.*]] = shufflevector <8 x half> %c, <8 x half> undef, <4 x i32> <i32 5, i32 5, i32 5, i32 5>
// CHECK: [[RESULT:%.*]] = call <2 x float> @llvm.aarch64.neon.fmlsl2.v2f32.v4f16(<2 x float> %a, <4 x half> %b, <4 x half> [[SHUFFLE]])
// CHECK: ret <2 x float> [[RESULT]]
@ -180,7 +180,7 @@ float32x2_t test_vfmlsl_laneq_high_f16(float32x2_t a, float16x4_t b, float16x8_t
}
float32x4_t test_vfmlslq_laneq_low_f16(float32x4_t a, float16x8_t b, float16x8_t c) {
// CHECK-LABEL: define <4 x float> @test_vfmlslq_laneq_low_f16(<4 x float> %a, <8 x half> %b, <8 x half> %c)
// CHECK-LABEL: define dso_local <4 x float> @test_vfmlslq_laneq_low_f16(<4 x float> %a, <8 x half> %b, <8 x half> %c)
// CHECK: [[SHUFFLE:%.*]] = shufflevector <8 x half> %c, <8 x half> undef, <8 x i32> <i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6>
// CHECK: [[RESULT:%.*]] = call <4 x float> @llvm.aarch64.neon.fmlsl.v4f32.v8f16(<4 x float> %a, <8 x half> %b, <8 x half> [[SHUFFLE]])
// CHECK: ret <4 x float> [[RESULT]]
@ -188,7 +188,7 @@ float32x4_t test_vfmlslq_laneq_low_f16(float32x4_t a, float16x8_t b, float16x8_t
}
float32x4_t test_vfmlslq_laneq_high_f16(float32x4_t a, float16x8_t b, float16x8_t c) {
// CHECK-LABEL: define <4 x float> @test_vfmlslq_laneq_high_f16(<4 x float> %a, <8 x half> %b, <8 x half> %c)
// CHECK-LABEL: define dso_local <4 x float> @test_vfmlslq_laneq_high_f16(<4 x float> %a, <8 x half> %b, <8 x half> %c)
// CHECK: [[SHUFFLE:%.*]] = shufflevector <8 x half> %c, <8 x half> undef, <8 x i32> <i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7>
// CHECK: [[RESULT:%.*]] = call <4 x float> @llvm.aarch64.neon.fmlsl2.v4f32.v8f16(<4 x float> %a, <8 x half> %b, <8 x half> [[SHUFFLE]])
// CHECK: ret <4 x float> [[RESULT]]

540
clang/test/CodeGen/aarch64-neon-ldst-one.c
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48
clang/test/CodeGen/aarch64-neon-scalar-copy.c
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@ -3,7 +3,7 @@
#include <arm_neon.h>
// CHECK-LABEL: define float @test_vdups_lane_f32(<2 x float> %a) #0 {
// CHECK-LABEL: define dso_local float @test_vdups_lane_f32(<2 x float> %a) #0 {
// CHECK: [[VDUPS_LANE:%.*]] = extractelement <2 x float> %a, i32 1
// CHECK: ret float [[VDUPS_LANE]]
float32_t test_vdups_lane_f32(float32x2_t a) {
@ -11,7 +11,7 @@ float32_t test_vdups_lane_f32(float32x2_t a) {
}
// CHECK-LABEL: define double @test_vdupd_lane_f64(<1 x double> %a) #0 {
// CHECK-LABEL: define dso_local double @test_vdupd_lane_f64(<1 x double> %a) #0 {
// CHECK: [[VDUPD_LANE:%.*]] = extractelement <1 x double> %a, i32 0
// CHECK: ret double [[VDUPD_LANE]]
float64_t test_vdupd_lane_f64(float64x1_t a) {
@ -19,7 +19,7 @@ float64_t test_vdupd_lane_f64(float64x1_t a) {
}
// CHECK-LABEL: define float @test_vdups_laneq_f32(<4 x float> %a) #1 {
// CHECK-LABEL: define dso_local float @test_vdups_laneq_f32(<4 x float> %a) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x float> %a, i32 3
// CHECK: ret float [[VGETQ_LANE]]
float32_t test_vdups_laneq_f32(float32x4_t a) {
@ -27,7 +27,7 @@ float32_t test_vdups_laneq_f32(float32x4_t a) {
}
// CHECK-LABEL: define double @test_vdupd_laneq_f64(<2 x double> %a) #1 {
// CHECK-LABEL: define dso_local double @test_vdupd_laneq_f64(<2 x double> %a) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x double> %a, i32 1
// CHECK: ret double [[VGETQ_LANE]]
float64_t test_vdupd_laneq_f64(float64x2_t a) {
@ -35,7 +35,7 @@ float64_t test_vdupd_laneq_f64(float64x2_t a) {
}
// CHECK-LABEL: define i8 @test_vdupb_lane_s8(<8 x i8> %a) #0 {
// CHECK-LABEL: define dso_local i8 @test_vdupb_lane_s8(<8 x i8> %a) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <8 x i8> %a, i32 7
// CHECK: ret i8 [[VGET_LANE]]
int8_t test_vdupb_lane_s8(int8x8_t a) {
@ -43,7 +43,7 @@ int8_t test_vdupb_lane_s8(int8x8_t a) {
}
// CHECK-LABEL: define i16 @test_vduph_lane_s16(<4 x i16> %a) #0 {
// CHECK-LABEL: define dso_local i16 @test_vduph_lane_s16(<4 x i16> %a) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %a, i32 3
// CHECK: ret i16 [[VGET_LANE]]
int16_t test_vduph_lane_s16(int16x4_t a) {
@ -51,7 +51,7 @@ int16_t test_vduph_lane_s16(int16x4_t a) {
}
// CHECK-LABEL: define i32 @test_vdups_lane_s32(<2 x i32> %a) #0 {
// CHECK-LABEL: define dso_local i32 @test_vdups_lane_s32(<2 x i32> %a) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <2 x i32> %a, i32 1
// CHECK: ret i32 [[VGET_LANE]]
int32_t test_vdups_lane_s32(int32x2_t a) {
@ -59,7 +59,7 @@ int32_t test_vdups_lane_s32(int32x2_t a) {
}
// CHECK-LABEL: define i64 @test_vdupd_lane_s64(<1 x i64> %a) #0 {
// CHECK-LABEL: define dso_local i64 @test_vdupd_lane_s64(<1 x i64> %a) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <1 x i64> %a, i32 0
// CHECK: ret i64 [[VGET_LANE]]
int64_t test_vdupd_lane_s64(int64x1_t a) {
@ -67,7 +67,7 @@ int64_t test_vdupd_lane_s64(int64x1_t a) {
}
// CHECK-LABEL: define i8 @test_vdupb_lane_u8(<8 x i8> %a) #0 {
// CHECK-LABEL: define dso_local i8 @test_vdupb_lane_u8(<8 x i8> %a) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <8 x i8> %a, i32 7
// CHECK: ret i8 [[VGET_LANE]]
uint8_t test_vdupb_lane_u8(uint8x8_t a) {
@ -75,7 +75,7 @@ uint8_t test_vdupb_lane_u8(uint8x8_t a) {
}
// CHECK-LABEL: define i16 @test_vduph_lane_u16(<4 x i16> %a) #0 {
// CHECK-LABEL: define dso_local i16 @test_vduph_lane_u16(<4 x i16> %a) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %a, i32 3
// CHECK: ret i16 [[VGET_LANE]]
uint16_t test_vduph_lane_u16(uint16x4_t a) {
@ -83,7 +83,7 @@ uint16_t test_vduph_lane_u16(uint16x4_t a) {
}
// CHECK-LABEL: define i32 @test_vdups_lane_u32(<2 x i32> %a) #0 {
// CHECK-LABEL: define dso_local i32 @test_vdups_lane_u32(<2 x i32> %a) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <2 x i32> %a, i32 1
// CHECK: ret i32 [[VGET_LANE]]
uint32_t test_vdups_lane_u32(uint32x2_t a) {
@ -91,14 +91,14 @@ uint32_t test_vdups_lane_u32(uint32x2_t a) {
}
// CHECK-LABEL: define i64 @test_vdupd_lane_u64(<1 x i64> %a) #0 {
// CHECK-LABEL: define dso_local i64 @test_vdupd_lane_u64(<1 x i64> %a) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <1 x i64> %a, i32 0
// CHECK: ret i64 [[VGET_LANE]]
uint64_t test_vdupd_lane_u64(uint64x1_t a) {
return vdupd_lane_u64(a, 0);
}
// CHECK-LABEL: define i8 @test_vdupb_laneq_s8(<16 x i8> %a) #1 {
// CHECK-LABEL: define dso_local i8 @test_vdupb_laneq_s8(<16 x i8> %a) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <16 x i8> %a, i32 15
// CHECK: ret i8 [[VGETQ_LANE]]
int8_t test_vdupb_laneq_s8(int8x16_t a) {
@ -106,7 +106,7 @@ int8_t test_vdupb_laneq_s8(int8x16_t a) {
}
// CHECK-LABEL: define i16 @test_vduph_laneq_s16(<8 x i16> %a) #1 {
// CHECK-LABEL: define dso_local i16 @test_vduph_laneq_s16(<8 x i16> %a) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %a, i32 7
// CHECK: ret i16 [[VGETQ_LANE]]
int16_t test_vduph_laneq_s16(int16x8_t a) {
@ -114,7 +114,7 @@ int16_t test_vduph_laneq_s16(int16x8_t a) {
}
// CHECK-LABEL: define i32 @test_vdups_laneq_s32(<4 x i32> %a) #1 {
// CHECK-LABEL: define dso_local i32 @test_vdups_laneq_s32(<4 x i32> %a) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> %a, i32 3
// CHECK: ret i32 [[VGETQ_LANE]]
int32_t test_vdups_laneq_s32(int32x4_t a) {
@ -122,7 +122,7 @@ int32_t test_vdups_laneq_s32(int32x4_t a) {
}
// CHECK-LABEL: define i64 @test_vdupd_laneq_s64(<2 x i64> %a) #1 {
// CHECK-LABEL: define dso_local i64 @test_vdupd_laneq_s64(<2 x i64> %a) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x i64> %a, i32 1
// CHECK: ret i64 [[VGETQ_LANE]]
int64_t test_vdupd_laneq_s64(int64x2_t a) {
@ -130,7 +130,7 @@ int64_t test_vdupd_laneq_s64(int64x2_t a) {
}
// CHECK-LABEL: define i8 @test_vdupb_laneq_u8(<16 x i8> %a) #1 {
// CHECK-LABEL: define dso_local i8 @test_vdupb_laneq_u8(<16 x i8> %a) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <16 x i8> %a, i32 15
// CHECK: ret i8 [[VGETQ_LANE]]
uint8_t test_vdupb_laneq_u8(uint8x16_t a) {
@ -138,7 +138,7 @@ uint8_t test_vdupb_laneq_u8(uint8x16_t a) {
}
// CHECK-LABEL: define i16 @test_vduph_laneq_u16(<8 x i16> %a) #1 {
// CHECK-LABEL: define dso_local i16 @test_vduph_laneq_u16(<8 x i16> %a) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %a, i32 7
// CHECK: ret i16 [[VGETQ_LANE]]
uint16_t test_vduph_laneq_u16(uint16x8_t a) {
@ -146,7 +146,7 @@ uint16_t test_vduph_laneq_u16(uint16x8_t a) {
}
// CHECK-LABEL: define i32 @test_vdups_laneq_u32(<4 x i32> %a) #1 {
// CHECK-LABEL: define dso_local i32 @test_vdups_laneq_u32(<4 x i32> %a) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> %a, i32 3
// CHECK: ret i32 [[VGETQ_LANE]]
uint32_t test_vdups_laneq_u32(uint32x4_t a) {
@ -154,35 +154,35 @@ uint32_t test_vdups_laneq_u32(uint32x4_t a) {
}
// CHECK-LABEL: define i64 @test_vdupd_laneq_u64(<2 x i64> %a) #1 {
// CHECK-LABEL: define dso_local i64 @test_vdupd_laneq_u64(<2 x i64> %a) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x i64> %a, i32 1
// CHECK: ret i64 [[VGETQ_LANE]]
uint64_t test_vdupd_laneq_u64(uint64x2_t a) {
return vdupd_laneq_u64(a, 1);
}
// CHECK-LABEL: define i8 @test_vdupb_lane_p8(<8 x i8> %a) #0 {
// CHECK-LABEL: define dso_local i8 @test_vdupb_lane_p8(<8 x i8> %a) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <8 x i8> %a, i32 7
// CHECK: ret i8 [[VGET_LANE]]
poly8_t test_vdupb_lane_p8(poly8x8_t a) {
return vdupb_lane_p8(a, 7);
}
// CHECK-LABEL: define i16 @test_vduph_lane_p16(<4 x i16> %a) #0 {
// CHECK-LABEL: define dso_local i16 @test_vduph_lane_p16(<4 x i16> %a) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %a, i32 3
// CHECK: ret i16 [[VGET_LANE]]
poly16_t test_vduph_lane_p16(poly16x4_t a) {
return vduph_lane_p16(a, 3);
}
// CHECK-LABEL: define i8 @test_vdupb_laneq_p8(<16 x i8> %a) #1 {
// CHECK-LABEL: define dso_local i8 @test_vdupb_laneq_p8(<16 x i8> %a) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <16 x i8> %a, i32 15
// CHECK: ret i8 [[VGETQ_LANE]]
poly8_t test_vdupb_laneq_p8(poly8x16_t a) {
return vdupb_laneq_p8(a, 15);
}
// CHECK-LABEL: define i16 @test_vduph_laneq_p16(<8 x i16> %a) #1 {
// CHECK-LABEL: define dso_local i16 @test_vduph_laneq_p16(<8 x i16> %a) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %a, i32 7
// CHECK: ret i16 [[VGETQ_LANE]]
poly16_t test_vduph_laneq_p16(poly16x8_t a) {

84
clang/test/CodeGen/aarch64-neon-scalar-x-indexed-elem.c
View File

@ -6,7 +6,7 @@
#include <arm_neon.h>
// CHECK-LABEL: define float @test_vmuls_lane_f32(float %a, <2 x float> %b) #0 {
// CHECK-LABEL: define dso_local float @test_vmuls_lane_f32(float %a, <2 x float> %b) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <2 x float> %b, i32 1
// CHECK: [[MUL:%.*]] = fmul float %a, [[VGET_LANE]]
// CHECK: ret float [[MUL]]
@ -14,7 +14,7 @@ float32_t test_vmuls_lane_f32(float32_t a, float32x2_t b) {
return vmuls_lane_f32(a, b, 1);
}
// CHECK-LABEL: define double @test_vmuld_lane_f64(double %a, <1 x double> %b) #0 {
// CHECK-LABEL: define dso_local double @test_vmuld_lane_f64(double %a, <1 x double> %b) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <1 x double> %b, i32 0
// CHECK: [[MUL:%.*]] = fmul double %a, [[VGET_LANE]]
// CHECK: ret double [[MUL]]
@ -22,7 +22,7 @@ float64_t test_vmuld_lane_f64(float64_t a, float64x1_t b) {
return vmuld_lane_f64(a, b, 0);
}
// CHECK-LABEL: define float @test_vmuls_laneq_f32(float %a, <4 x float> %b) #1 {
// CHECK-LABEL: define dso_local float @test_vmuls_laneq_f32(float %a, <4 x float> %b) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x float> %b, i32 3
// CHECK: [[MUL:%.*]] = fmul float %a, [[VGETQ_LANE]]
// CHECK: ret float [[MUL]]
@ -30,7 +30,7 @@ float32_t test_vmuls_laneq_f32(float32_t a, float32x4_t b) {
return vmuls_laneq_f32(a, b, 3);
}
// CHECK-LABEL: define double @test_vmuld_laneq_f64(double %a, <2 x double> %b) #1 {
// CHECK-LABEL: define dso_local double @test_vmuld_laneq_f64(double %a, <2 x double> %b) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x double> %b, i32 1
// CHECK: [[MUL:%.*]] = fmul double %a, [[VGETQ_LANE]]
// CHECK: ret double [[MUL]]
@ -38,7 +38,7 @@ float64_t test_vmuld_laneq_f64(float64_t a, float64x2_t b) {
return vmuld_laneq_f64(a, b, 1);
}
// CHECK-LABEL: define <1 x double> @test_vmul_n_f64(<1 x double> %a, double %b) #0 {
// CHECK-LABEL: define dso_local <1 x double> @test_vmul_n_f64(<1 x double> %a, double %b) #0 {
// CHECK: [[TMP2:%.*]] = bitcast <1 x double> %a to double
// CHECK: [[TMP3:%.*]] = fmul double [[TMP2]], %b
// CHECK: [[TMP4:%.*]] = bitcast double [[TMP3]] to <1 x double>
@ -47,7 +47,7 @@ float64x1_t test_vmul_n_f64(float64x1_t a, float64_t b) {
return vmul_n_f64(a, b);
}
// CHECK-LABEL: define float @test_vmulxs_lane_f32(float %a, <2 x float> %b) #0 {
// CHECK-LABEL: define dso_local float @test_vmulxs_lane_f32(float %a, <2 x float> %b) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <2 x float> %b, i32 1
// CHECK: [[VMULXS_F32_I:%.*]] = call float @llvm.aarch64.neon.fmulx.f32(float %a, float [[VGET_LANE]])
// CHECK: ret float [[VMULXS_F32_I]]
@ -55,7 +55,7 @@ float32_t test_vmulxs_lane_f32(float32_t a, float32x2_t b) {
return vmulxs_lane_f32(a, b, 1);
}
// CHECK-LABEL: define float @test_vmulxs_laneq_f32(float %a, <4 x float> %b) #1 {
// CHECK-LABEL: define dso_local float @test_vmulxs_laneq_f32(float %a, <4 x float> %b) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x float> %b, i32 3
// CHECK: [[VMULXS_F32_I:%.*]] = call float @llvm.aarch64.neon.fmulx.f32(float %a, float [[VGETQ_LANE]])
// CHECK: ret float [[VMULXS_F32_I]]
@ -63,7 +63,7 @@ float32_t test_vmulxs_laneq_f32(float32_t a, float32x4_t b) {
return vmulxs_laneq_f32(a, b, 3);
}
// CHECK-LABEL: define double @test_vmulxd_lane_f64(double %a, <1 x double> %b) #0 {
// CHECK-LABEL: define dso_local double @test_vmulxd_lane_f64(double %a, <1 x double> %b) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <1 x double> %b, i32 0
// CHECK: [[VMULXD_F64_I:%.*]] = call double @llvm.aarch64.neon.fmulx.f64(double %a, double [[VGET_LANE]])
// CHECK: ret double [[VMULXD_F64_I]]
@ -71,7 +71,7 @@ float64_t test_vmulxd_lane_f64(float64_t a, float64x1_t b) {
return vmulxd_lane_f64(a, b, 0);
}
// CHECK-LABEL: define double @test_vmulxd_laneq_f64(double %a, <2 x double> %b) #1 {
// CHECK-LABEL: define dso_local double @test_vmulxd_laneq_f64(double %a, <2 x double> %b) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x double> %b, i32 1
// CHECK: [[VMULXD_F64_I:%.*]] = call double @llvm.aarch64.neon.fmulx.f64(double %a, double [[VGETQ_LANE]])
// CHECK: ret double [[VMULXD_F64_I]]
@ -79,7 +79,7 @@ float64_t test_vmulxd_laneq_f64(float64_t a, float64x2_t b) {
return vmulxd_laneq_f64(a, b, 1);
}
// CHECK-LABEL: define <1 x double> @test_vmulx_lane_f64(<1 x double> %a, <1 x double> %b) #0 {
// CHECK-LABEL: define dso_local <1 x double> @test_vmulx_lane_f64(<1 x double> %a, <1 x double> %b) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <1 x double> %a, i32 0
// CHECK: [[VGET_LANE6:%.*]] = extractelement <1 x double> %b, i32 0
// CHECK: [[VMULXD_F64_I:%.*]] = call double @llvm.aarch64.neon.fmulx.f64(double [[VGET_LANE]], double [[VGET_LANE6]])
@ -90,7 +90,7 @@ float64x1_t test_vmulx_lane_f64(float64x1_t a, float64x1_t b) {
}
// CHECK-LABEL: define <1 x double> @test_vmulx_laneq_f64_0(<1 x double> %a, <2 x double> %b) #1 {
// CHECK-LABEL: define dso_local <1 x double> @test_vmulx_laneq_f64_0(<1 x double> %a, <2 x double> %b) #1 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <1 x double> %a, i32 0
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x double> %b, i32 0
// CHECK: [[VMULXD_F64_I:%.*]] = call double @llvm.aarch64.neon.fmulx.f64(double [[VGET_LANE]], double [[VGETQ_LANE]])
@ -100,7 +100,7 @@ float64x1_t test_vmulx_laneq_f64_0(float64x1_t a, float64x2_t b) {
return vmulx_laneq_f64(a, b, 0);
}
// CHECK-LABEL: define <1 x double> @test_vmulx_laneq_f64_1(<1 x double> %a, <2 x double> %b) #1 {
// CHECK-LABEL: define dso_local <1 x double> @test_vmulx_laneq_f64_1(<1 x double> %a, <2 x double> %b) #1 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <1 x double> %a, i32 0
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x double> %b, i32 1
// CHECK: [[VMULXD_F64_I:%.*]] = call double @llvm.aarch64.neon.fmulx.f64(double [[VGET_LANE]], double [[VGETQ_LANE]])
@ -111,7 +111,7 @@ float64x1_t test_vmulx_laneq_f64_1(float64x1_t a, float64x2_t b) {
}
// CHECK-LABEL: define float @test_vfmas_lane_f32(float %a, float %b, <2 x float> %c) #0 {
// CHECK-LABEL: define dso_local float @test_vfmas_lane_f32(float %a, float %b, <2 x float> %c) #0 {
// CHECK: [[EXTRACT:%.*]] = extractelement <2 x float> %c, i32 1
// CHECK: [[TMP2:%.*]] = call float @llvm.fma.f32(float %b, float [[EXTRACT]], float %a)
// CHECK: ret float [[TMP2]]
@ -119,7 +119,7 @@ float32_t test_vfmas_lane_f32(float32_t a, float32_t b, float32x2_t c) {
return vfmas_lane_f32(a, b, c, 1);
}
// CHECK-LABEL: define double @test_vfmad_lane_f64(double %a, double %b, <1 x double> %c) #0 {
// CHECK-LABEL: define dso_local double @test_vfmad_lane_f64(double %a, double %b, <1 x double> %c) #0 {
// CHECK: [[EXTRACT:%.*]] = extractelement <1 x double> %c, i32 0
// CHECK: [[TMP2:%.*]] = call double @llvm.fma.f64(double %b, double [[EXTRACT]], double %a)
// CHECK: ret double [[TMP2]]
@ -127,7 +127,7 @@ float64_t test_vfmad_lane_f64(float64_t a, float64_t b, float64x1_t c) {
return vfmad_lane_f64(a, b, c, 0);
}
// CHECK-LABEL: define double @test_vfmad_laneq_f64(double %a, double %b, <2 x double> %c) #1 {
// CHECK-LABEL: define dso_local double @test_vfmad_laneq_f64(double %a, double %b, <2 x double> %c) #1 {
// CHECK: [[EXTRACT:%.*]] = extractelement <2 x double> %c, i32 1
// CHECK: [[TMP2:%.*]] = call double @llvm.fma.f64(double %b, double [[EXTRACT]], double %a)
// CHECK: ret double [[TMP2]]
@ -135,7 +135,7 @@ float64_t test_vfmad_laneq_f64(float64_t a, float64_t b, float64x2_t c) {
return vfmad_laneq_f64(a, b, c, 1);
}
// CHECK-LABEL: define float @test_vfmss_lane_f32(float %a, float %b, <2 x float> %c) #0 {
// CHECK-LABEL: define dso_local float @test_vfmss_lane_f32(float %a, float %b, <2 x float> %c) #0 {
// CHECK: [[SUB:%.*]] = fneg float %b
// CHECK: [[EXTRACT:%.*]] = extractelement <2 x float> %c, i32 1
// CHECK: [[TMP2:%.*]] = call float @llvm.fma.f32(float [[SUB]], float [[EXTRACT]], float %a)
@ -144,7 +144,7 @@ float32_t test_vfmss_lane_f32(float32_t a, float32_t b, float32x2_t c) {
return vfmss_lane_f32(a, b, c, 1);
}
// CHECK-LABEL: define <1 x double> @test_vfma_lane_f64(<1 x double> %a, <1 x double> %b, <1 x double> %v) #0 {
// CHECK-LABEL: define dso_local <1 x double> @test_vfma_lane_f64(<1 x double> %a, <1 x double> %b, <1 x double> %v) #0 {
// CHECK: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <1 x double> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <1 x double> %v to <8 x i8>
@ -158,7 +158,7 @@ float64x1_t test_vfma_lane_f64(float64x1_t a, float64x1_t b, float64x1_t v) {
return vfma_lane_f64(a, b, v, 0);
}
// CHECK-LABEL: define <1 x double> @test_vfms_lane_f64(<1 x double> %a, <1 x double> %b, <1 x double> %v) #0 {
// CHECK-LABEL: define dso_local <1 x double> @test_vfms_lane_f64(<1 x double> %a, <1 x double> %b, <1 x double> %v) #0 {
// CHECK: [[SUB:%.*]] = fneg <1 x double> %b
// CHECK: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <1 x double> [[SUB]] to <8 x i8>
@ -173,7 +173,7 @@ float64x1_t test_vfms_lane_f64(float64x1_t a, float64x1_t b, float64x1_t v) {
return vfms_lane_f64(a, b, v, 0);
}
// CHECK-LABEL: define <1 x double> @test_vfma_laneq_f64(<1 x double> %a, <1 x double> %b, <2 x double> %v) #1 {
// CHECK-LABEL: define dso_local <1 x double> @test_vfma_laneq_f64(<1 x double> %a, <1 x double> %b, <2 x double> %v) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <1 x double> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <2 x double> %v to <16 x i8>
@ -188,7 +188,7 @@ float64x1_t test_vfma_laneq_f64(float64x1_t a, float64x1_t b, float64x2_t v) {
return vfma_laneq_f64(a, b, v, 0);
}
// CHECK-LABEL: define <1 x double> @test_vfms_laneq_f64(<1 x double> %a, <1 x double> %b, <2 x double> %v) #1 {
// CHECK-LABEL: define dso_local <1 x double> @test_vfms_laneq_f64(<1 x double> %a, <1 x double> %b, <2 x double> %v) #1 {
// CHECK: [[SUB:%.*]] = fneg <1 x double> %b
// CHECK: [[TMP0:%.*]] = bitcast <1 x double> %a to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <1 x double> [[SUB]] to <8 x i8>
@ -204,7 +204,7 @@ float64x1_t test_vfms_laneq_f64(float64x1_t a, float64x1_t b, float64x2_t v) {
return vfms_laneq_f64(a, b, v, 0);
}
// CHECK-LABEL: define i32 @test_vqdmullh_lane_s16(i16 %a, <4 x i16> %b) #0 {
// CHECK-LABEL: define dso_local i32 @test_vqdmullh_lane_s16(i16 %a, <4 x i16> %b) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %b, i32 3
// CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0
// CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGET_LANE]], i64 0
@ -215,7 +215,7 @@ int32_t test_vqdmullh_lane_s16(int16_t a, int16x4_t b) {
return vqdmullh_lane_s16(a, b, 3);
}
// CHECK-LABEL: define i64 @test_vqdmulls_lane_s32(i32 %a, <2 x i32> %b) #0 {
// CHECK-LABEL: define dso_local i64 @test_vqdmulls_lane_s32(i32 %a, <2 x i32> %b) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <2 x i32> %b, i32 1
// CHECK: [[VQDMULLS_S32_I:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 %a, i32 [[VGET_LANE]])
// CHECK: ret i64 [[VQDMULLS_S32_I]]
@ -223,7 +223,7 @@ int64_t test_vqdmulls_lane_s32(int32_t a, int32x2_t b) {
return vqdmulls_lane_s32(a, b, 1);
}
// CHECK-LABEL: define i32 @test_vqdmullh_laneq_s16(i16 %a, <8 x i16> %b) #1 {
// CHECK-LABEL: define dso_local i32 @test_vqdmullh_laneq_s16(i16 %a, <8 x i16> %b) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %b, i32 7
// CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0
// CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGETQ_LANE]], i64 0
@ -234,7 +234,7 @@ int32_t test_vqdmullh_laneq_s16(int16_t a, int16x8_t b) {
return vqdmullh_laneq_s16(a, b, 7);
}
// CHECK-LABEL: define i64 @test_vqdmulls_laneq_s32(i32 %a, <4 x i32> %b) #1 {
// CHECK-LABEL: define dso_local i64 @test_vqdmulls_laneq_s32(i32 %a, <4 x i32> %b) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> %b, i32 3
// CHECK: [[VQDMULLS_S32_I:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 %a, i32 [[VGETQ_LANE]])
// CHECK: ret i64 [[VQDMULLS_S32_I]]
@ -242,7 +242,7 @@ int64_t test_vqdmulls_laneq_s32(int32_t a, int32x4_t b) {
return vqdmulls_laneq_s32(a, b, 3);
}
// CHECK-LABEL: define i16 @test_vqdmulhh_lane_s16(i16 %a, <4 x i16> %b) #0 {
// CHECK-LABEL: define dso_local i16 @test_vqdmulhh_lane_s16(i16 %a, <4 x i16> %b) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %b, i32 3
// CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0
// CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGET_LANE]], i64 0
@ -253,7 +253,7 @@ int16_t test_vqdmulhh_lane_s16(int16_t a, int16x4_t b) {
return vqdmulhh_lane_s16(a, b, 3);
}
// CHECK-LABEL: define i32 @test_vqdmulhs_lane_s32(i32 %a, <2 x i32> %b) #0 {
// CHECK-LABEL: define dso_local i32 @test_vqdmulhs_lane_s32(i32 %a, <2 x i32> %b) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <2 x i32> %b, i32 1
// CHECK: [[VQDMULHS_S32_I:%.*]] = call i32 @llvm.aarch64.neon.sqdmulh.i32(i32 %a, i32 [[VGET_LANE]])
// CHECK: ret i32 [[VQDMULHS_S32_I]]
@ -262,7 +262,7 @@ int32_t test_vqdmulhs_lane_s32(int32_t a, int32x2_t b) {
}
// CHECK-LABEL: define i16 @test_vqdmulhh_laneq_s16(i16 %a, <8 x i16> %b) #1 {
// CHECK-LABEL: define dso_local i16 @test_vqdmulhh_laneq_s16(i16 %a, <8 x i16> %b) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %b, i32 7
// CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0
// CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGETQ_LANE]], i64 0
@ -274,7 +274,7 @@ int16_t test_vqdmulhh_laneq_s16(int16_t a, int16x8_t b) {
}
// CHECK-LABEL: define i32 @test_vqdmulhs_laneq_s32(i32 %a, <4 x i32> %b) #1 {
// CHECK-LABEL: define dso_local i32 @test_vqdmulhs_laneq_s32(i32 %a, <4 x i32> %b) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> %b, i32 3
// CHECK: [[VQDMULHS_S32_I:%.*]] = call i32 @llvm.aarch64.neon.sqdmulh.i32(i32 %a, i32 [[VGETQ_LANE]])
// CHECK: ret i32 [[VQDMULHS_S32_I]]
@ -282,7 +282,7 @@ int32_t test_vqdmulhs_laneq_s32(int32_t a, int32x4_t b) {
return vqdmulhs_laneq_s32(a, b, 3);
}
// CHECK-LABEL: define i16 @test_vqrdmulhh_lane_s16(i16 %a, <4 x i16> %b) #0 {
// CHECK-LABEL: define dso_local i16 @test_vqrdmulhh_lane_s16(i16 %a, <4 x i16> %b) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <4 x i16> %b, i32 3
// CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0
// CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGET_LANE]], i64 0
@ -293,7 +293,7 @@ int16_t test_vqrdmulhh_lane_s16(int16_t a, int16x4_t b) {
return vqrdmulhh_lane_s16(a, b, 3);
}
// CHECK-LABEL: define i32 @test_vqrdmulhs_lane_s32(i32 %a, <2 x i32> %b) #0 {
// CHECK-LABEL: define dso_local i32 @test_vqrdmulhs_lane_s32(i32 %a, <2 x i32> %b) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <2 x i32> %b, i32 1
// CHECK: [[VQRDMULHS_S32_I:%.*]] = call i32 @llvm.aarch64.neon.sqrdmulh.i32(i32 %a, i32 [[VGET_LANE]])
// CHECK: ret i32 [[VQRDMULHS_S32_I]]
@ -302,7 +302,7 @@ int32_t test_vqrdmulhs_lane_s32(int32_t a, int32x2_t b) {
}
// CHECK-LABEL: define i16 @test_vqrdmulhh_laneq_s16(i16 %a, <8 x i16> %b) #1 {
// CHECK-LABEL: define dso_local i16 @test_vqrdmulhh_laneq_s16(i16 %a, <8 x i16> %b) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <8 x i16> %b, i32 7
// CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %a, i64 0
// CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[VGETQ_LANE]], i64 0
@ -314,7 +314,7 @@ int16_t test_vqrdmulhh_laneq_s16(int16_t a, int16x8_t b) {
}
// CHECK-LABEL: define i32 @test_vqrdmulhs_laneq_s32(i32 %a, <4 x i32> %b) #1 {
// CHECK-LABEL: define dso_local i32 @test_vqrdmulhs_laneq_s32(i32 %a, <4 x i32> %b) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <4 x i32> %b, i32 3
// CHECK: [[VQRDMULHS_S32_I:%.*]] = call i32 @llvm.aarch64.neon.sqrdmulh.i32(i32 %a, i32 [[VGETQ_LANE]])
// CHECK: ret i32 [[VQRDMULHS_S32_I]]
@ -322,7 +322,7 @@ int32_t test_vqrdmulhs_laneq_s32(int32_t a, int32x4_t b) {
return vqrdmulhs_laneq_s32(a, b, 3);
}
// CHECK-LABEL: define i32 @test_vqdmlalh_lane_s16(i32 %a, i16 %b, <4 x i16> %c) #0 {
// CHECK-LABEL: define dso_local i32 @test_vqdmlalh_lane_s16(i32 %a, i16 %b, <4 x i16> %c) #0 {
// CHECK: [[LANE:%.*]] = extractelement <4 x i16> %c, i32 3
// CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %b, i64 0
// CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[LANE]], i64 0
@ -334,7 +334,7 @@ int32_t test_vqdmlalh_lane_s16(int32_t a, int16_t b, int16x4_t c) {
return vqdmlalh_lane_s16(a, b, c, 3);
}
// CHECK-LABEL: define i64 @test_vqdmlals_lane_s32(i64 %a, i32 %b, <2 x i32> %c) #0 {
// CHECK-LABEL: define dso_local i64 @test_vqdmlals_lane_s32(i64 %a, i32 %b, <2 x i32> %c) #0 {
// CHECK: [[LANE:%.*]] = extractelement <2 x i32> %c, i32 1
// CHECK: [[VQDMLXL:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 %b, i32 [[LANE]])
// CHECK: [[VQDMLXL1:%.*]] = call i64 @llvm.aarch64.neon.sqadd.i64(i64 %a, i64 [[VQDMLXL]])
@ -343,7 +343,7 @@ int64_t test_vqdmlals_lane_s32(int64_t a, int32_t b, int32x2_t c) {
return vqdmlals_lane_s32(a, b, c, 1);
}
// CHECK-LABEL: define i32 @test_vqdmlalh_laneq_s16(i32 %a, i16 %b, <8 x i16> %c) #1 {
// CHECK-LABEL: define dso_local i32 @test_vqdmlalh_laneq_s16(i32 %a, i16 %b, <8 x i16> %c) #1 {
// CHECK: [[LANE:%.*]] = extractelement <8 x i16> %c, i32 7
// CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %b, i64 0
// CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[LANE]], i64 0
@ -355,7 +355,7 @@ int32_t test_vqdmlalh_laneq_s16(int32_t a, int16_t b, int16x8_t c) {
return vqdmlalh_laneq_s16(a, b, c, 7);
}
// CHECK-LABEL: define i64 @test_vqdmlals_laneq_s32(i64 %a, i32 %b, <4 x i32> %c) #1 {
// CHECK-LABEL: define dso_local i64 @test_vqdmlals_laneq_s32(i64 %a, i32 %b, <4 x i32> %c) #1 {
// CHECK: [[LANE:%.*]] = extractelement <4 x i32> %c, i32 3
// CHECK: [[VQDMLXL:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 %b, i32 [[LANE]])
// CHECK: [[VQDMLXL1:%.*]] = call i64 @llvm.aarch64.neon.sqadd.i64(i64 %a, i64 [[VQDMLXL]])
@ -364,7 +364,7 @@ int64_t test_vqdmlals_laneq_s32(int64_t a, int32_t b, int32x4_t c) {
return vqdmlals_laneq_s32(a, b, c, 3);
}
// CHECK-LABEL: define i32 @test_vqdmlslh_lane_s16(i32 %a, i16 %b, <4 x i16> %c) #0 {
// CHECK-LABEL: define dso_local i32 @test_vqdmlslh_lane_s16(i32 %a, i16 %b, <4 x i16> %c) #0 {
// CHECK: [[LANE:%.*]] = extractelement <4 x i16> %c, i32 3
// CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %b, i64 0
// CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[LANE]], i64 0
@ -376,7 +376,7 @@ int32_t test_vqdmlslh_lane_s16(int32_t a, int16_t b, int16x4_t c) {
return vqdmlslh_lane_s16(a, b, c, 3);
}
// CHECK-LABEL: define i64 @test_vqdmlsls_lane_s32(i64 %a, i32 %b, <2 x i32> %c) #0 {
// CHECK-LABEL: define dso_local i64 @test_vqdmlsls_lane_s32(i64 %a, i32 %b, <2 x i32> %c) #0 {
// CHECK: [[LANE:%.*]] = extractelement <2 x i32> %c, i32 1
// CHECK: [[VQDMLXL:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 %b, i32 [[LANE]])
// CHECK: [[VQDMLXL1:%.*]] = call i64 @llvm.aarch64.neon.sqsub.i64(i64 %a, i64 [[VQDMLXL]])
@ -385,7 +385,7 @@ int64_t test_vqdmlsls_lane_s32(int64_t a, int32_t b, int32x2_t c) {
return vqdmlsls_lane_s32(a, b, c, 1);
}
// CHECK-LABEL: define i32 @test_vqdmlslh_laneq_s16(i32 %a, i16 %b, <8 x i16> %c) #1 {
// CHECK-LABEL: define dso_local i32 @test_vqdmlslh_laneq_s16(i32 %a, i16 %b, <8 x i16> %c) #1 {
// CHECK: [[LANE:%.*]] = extractelement <8 x i16> %c, i32 7
// CHECK: [[TMP2:%.*]] = insertelement <4 x i16> undef, i16 %b, i64 0
// CHECK: [[TMP3:%.*]] = insertelement <4 x i16> undef, i16 [[LANE]], i64 0
@ -397,7 +397,7 @@ int32_t test_vqdmlslh_laneq_s16(int32_t a, int16_t b, int16x8_t c) {
return vqdmlslh_laneq_s16(a, b, c, 7);
}
// CHECK-LABEL: define i64 @test_vqdmlsls_laneq_s32(i64 %a, i32 %b, <4 x i32> %c) #1 {
// CHECK-LABEL: define dso_local i64 @test_vqdmlsls_laneq_s32(i64 %a, i32 %b, <4 x i32> %c) #1 {
// CHECK: [[LANE:%.*]] = extractelement <4 x i32> %c, i32 3
// CHECK: [[VQDMLXL:%.*]] = call i64 @llvm.aarch64.neon.sqdmulls.scalar(i32 %b, i32 [[LANE]])
// CHECK: [[VQDMLXL1:%.*]] = call i64 @llvm.aarch64.neon.sqsub.i64(i64 %a, i64 [[VQDMLXL]])
@ -406,7 +406,7 @@ int64_t test_vqdmlsls_laneq_s32(int64_t a, int32_t b, int32x4_t c) {
return vqdmlsls_laneq_s32(a, b, c, 3);
}
// CHECK-LABEL: define <1 x double> @test_vmulx_lane_f64_0() #0 {
// CHECK-LABEL: define dso_local <1 x double> @test_vmulx_lane_f64_0() #0 {
// CHECK: [[TMP0:%.*]] = bitcast i64 4599917171378402754 to <1 x double>
// CHECK: [[TMP1:%.*]] = bitcast i64 4606655882138939123 to <1 x double>
// CHECK: [[VGET_LANE:%.*]] = extractelement <1 x double> [[TMP0]], i32 0
@ -425,7 +425,7 @@ float64x1_t test_vmulx_lane_f64_0() {
return result;
}
// CHECK-LABEL: define <1 x double> @test_vmulx_laneq_f64_2() #1 {
// CHECK-LABEL: define dso_local <1 x double> @test_vmulx_laneq_f64_2() #1 {
// CHECK: [[TMP0:%.*]] = bitcast i64 4599917171378402754 to <1 x double>
// CHECK: [[TMP1:%.*]] = bitcast i64 4606655882138939123 to <1 x double>
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <1 x double> [[TMP0]], <1 x double> [[TMP1]], <2 x i32> <i32 0, i32 1>

144
clang/test/CodeGen/aarch64-neon-tbl.c
View File

@ -5,7 +5,7 @@
#include <arm_neon.h>
// CHECK-LABEL: define <8 x i8> @test_vtbl1_s8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vtbl1_s8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK: [[VTBL1_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> zeroinitializer, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
// CHECK: [[VTBL11_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> [[VTBL1_I]], <8 x i8> %b) #3
// CHECK: ret <8 x i8> [[VTBL11_I]]
@ -13,14 +13,14 @@ int8x8_t test_vtbl1_s8(int8x8_t a, int8x8_t b) {
return vtbl1_s8(a, b);
}
// CHECK-LABEL: define <8 x i8> @test_vqtbl1_s8(<16 x i8> %a, <8 x i8> %b) #1 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbl1_s8(<16 x i8> %a, <8 x i8> %b) #1 {
// CHECK: [[VTBL1_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> %a, <8 x i8> %b) #3
// CHECK: ret <8 x i8> [[VTBL1_I]]
int8x8_t test_vqtbl1_s8(int8x16_t a, uint8x8_t b) {
return vqtbl1_s8(a, b);
}
// CHECK-LABEL: define <8 x i8> @test_vtbl2_s8([2 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vtbl2_s8([2 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.int8x8x2_t, align 8
// CHECK: [[A:%.*]] = alloca %struct.int8x8x2_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x2_t, %struct.int8x8x2_t* [[A]], i32 0, i32 0
@ -42,7 +42,7 @@ int8x8_t test_vtbl2_s8(int8x8x2_t a, int8x8_t b) {
return vtbl2_s8(a, b);
}
// CHECK-LABEL: define <8 x i8> @test_vqtbl2_s8([2 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbl2_s8([2 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.int8x16x2_t, align 16
// CHECK: [[A:%.*]] = alloca %struct.int8x16x2_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x2_t, %struct.int8x16x2_t* [[A]], i32 0, i32 0
@ -63,7 +63,7 @@ int8x8_t test_vqtbl2_s8(int8x16x2_t a, uint8x8_t b) {
return vqtbl2_s8(a, b);
}
// CHECK-LABEL: define <8 x i8> @test_vtbl3_s8([3 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vtbl3_s8([3 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.int8x8x3_t, align 8
// CHECK: [[A:%.*]] = alloca %struct.int8x8x3_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x3_t, %struct.int8x8x3_t* [[A]], i32 0, i32 0
@ -89,7 +89,7 @@ int8x8_t test_vtbl3_s8(int8x8x3_t a, int8x8_t b) {
return vtbl3_s8(a, b);
}
// CHECK-LABEL: define <8 x i8> @test_vqtbl3_s8([3 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbl3_s8([3 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.int8x16x3_t, align 16
// CHECK: [[A:%.*]] = alloca %struct.int8x16x3_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x3_t, %struct.int8x16x3_t* [[A]], i32 0, i32 0
@ -113,7 +113,7 @@ int8x8_t test_vqtbl3_s8(int8x16x3_t a, uint8x8_t b) {
return vqtbl3_s8(a, b);
}
// CHECK-LABEL: define <8 x i8> @test_vtbl4_s8([4 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vtbl4_s8([4 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.int8x8x4_t, align 8
// CHECK: [[A:%.*]] = alloca %struct.int8x8x4_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x4_t, %struct.int8x8x4_t* [[A]], i32 0, i32 0
@ -142,7 +142,7 @@ int8x8_t test_vtbl4_s8(int8x8x4_t a, int8x8_t b) {
return vtbl4_s8(a, b);
}
// CHECK-LABEL: define <8 x i8> @test_vqtbl4_s8([4 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbl4_s8([4 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.int8x16x4_t, align 16
// CHECK: [[A:%.*]] = alloca %struct.int8x16x4_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x4_t, %struct.int8x16x4_t* [[A]], i32 0, i32 0
@ -169,14 +169,14 @@ int8x8_t test_vqtbl4_s8(int8x16x4_t a, uint8x8_t b) {
return vqtbl4_s8(a, b);
}
// CHECK-LABEL: define <16 x i8> @test_vqtbl1q_s8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbl1q_s8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK: [[VTBL1_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.tbl1.v16i8(<16 x i8> %a, <16 x i8> %b) #3
// CHECK: ret <16 x i8> [[VTBL1_I]]
int8x16_t test_vqtbl1q_s8(int8x16_t a, int8x16_t b) {
return vqtbl1q_s8(a, b);
}
// CHECK-LABEL: define <16 x i8> @test_vqtbl2q_s8([2 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbl2q_s8([2 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.int8x16x2_t, align 16
// CHECK: [[A:%.*]] = alloca %struct.int8x16x2_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x2_t, %struct.int8x16x2_t* [[A]], i32 0, i32 0
@ -197,7 +197,7 @@ int8x16_t test_vqtbl2q_s8(int8x16x2_t a, int8x16_t b) {
return vqtbl2q_s8(a, b);
}
// CHECK-LABEL: define <16 x i8> @test_vqtbl3q_s8([3 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbl3q_s8([3 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.int8x16x3_t, align 16
// CHECK: [[A:%.*]] = alloca %struct.int8x16x3_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x3_t, %struct.int8x16x3_t* [[A]], i32 0, i32 0
@ -221,7 +221,7 @@ int8x16_t test_vqtbl3q_s8(int8x16x3_t a, int8x16_t b) {
return vqtbl3q_s8(a, b);
}
// CHECK-LABEL: define <16 x i8> @test_vqtbl4q_s8([4 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbl4q_s8([4 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.int8x16x4_t, align 16
// CHECK: [[A:%.*]] = alloca %struct.int8x16x4_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x4_t, %struct.int8x16x4_t* [[A]], i32 0, i32 0
@ -248,7 +248,7 @@ int8x16_t test_vqtbl4q_s8(int8x16x4_t a, int8x16_t b) {
return vqtbl4q_s8(a, b);
}
// CHECK-LABEL: define <8 x i8> @test_vtbx1_s8(<8 x i8> %a, <8 x i8> %b, <8 x i8> %c) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vtbx1_s8(<8 x i8> %a, <8 x i8> %b, <8 x i8> %c) #0 {
// CHECK: [[VTBL1_I:%.*]] = shufflevector <8 x i8> %b, <8 x i8> zeroinitializer, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
// CHECK: [[VTBL11_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> [[VTBL1_I]], <8 x i8> %c) #3
// CHECK: [[TMP0:%.*]] = icmp uge <8 x i8> %c, <i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8>
@ -262,7 +262,7 @@ int8x8_t test_vtbx1_s8(int8x8_t a, int8x8_t b, int8x8_t c) {
return vtbx1_s8(a, b, c);
}
// CHECK-LABEL: define <8 x i8> @test_vtbx2_s8(<8 x i8> %a, [2 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vtbx2_s8(<8 x i8> %a, [2 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.int8x8x2_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.int8x8x2_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x2_t, %struct.int8x8x2_t* [[B]], i32 0, i32 0
@ -284,7 +284,7 @@ int8x8_t test_vtbx2_s8(int8x8_t a, int8x8x2_t b, int8x8_t c) {
return vtbx2_s8(a, b, c);
}
// CHECK-LABEL: define <8 x i8> @test_vtbx3_s8(<8 x i8> %a, [3 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vtbx3_s8(<8 x i8> %a, [3 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.int8x8x3_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.int8x8x3_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x3_t, %struct.int8x8x3_t* [[B]], i32 0, i32 0
@ -316,7 +316,7 @@ int8x8_t test_vtbx3_s8(int8x8_t a, int8x8x3_t b, int8x8_t c) {
return vtbx3_s8(a, b, c);
}
// CHECK-LABEL: define <8 x i8> @test_vtbx4_s8(<8 x i8> %a, [4 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vtbx4_s8(<8 x i8> %a, [4 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.int8x8x4_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.int8x8x4_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x4_t, %struct.int8x8x4_t* [[B]], i32 0, i32 0
@ -345,14 +345,14 @@ int8x8_t test_vtbx4_s8(int8x8_t a, int8x8x4_t b, int8x8_t c) {
return vtbx4_s8(a, b, c);
}
// CHECK-LABEL: define <8 x i8> @test_vqtbx1_s8(<8 x i8> %a, <16 x i8> %b, <8 x i8> %c) #1 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbx1_s8(<8 x i8> %a, <16 x i8> %b, <8 x i8> %c) #1 {
// CHECK: [[VTBX1_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbx1.v8i8(<8 x i8> %a, <16 x i8> %b, <8 x i8> %c) #3
// CHECK: ret <8 x i8> [[VTBX1_I]]
int8x8_t test_vqtbx1_s8(int8x8_t a, int8x16_t b, uint8x8_t c) {
return vqtbx1_s8(a, b, c);
}
// CHECK-LABEL: define <8 x i8> @test_vqtbx2_s8(<8 x i8> %a, [2 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbx2_s8(<8 x i8> %a, [2 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.int8x16x2_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.int8x16x2_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x2_t, %struct.int8x16x2_t* [[B]], i32 0, i32 0
@ -373,7 +373,7 @@ int8x8_t test_vqtbx2_s8(int8x8_t a, int8x16x2_t b, uint8x8_t c) {
return vqtbx2_s8(a, b, c);
}
// CHECK-LABEL: define <8 x i8> @test_vqtbx3_s8(<8 x i8> %a, [3 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbx3_s8(<8 x i8> %a, [3 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.int8x16x3_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.int8x16x3_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x3_t, %struct.int8x16x3_t* [[B]], i32 0, i32 0
@ -397,7 +397,7 @@ int8x8_t test_vqtbx3_s8(int8x8_t a, int8x16x3_t b, uint8x8_t c) {
return vqtbx3_s8(a, b, c);
}
// CHECK-LABEL: define <8 x i8> @test_vqtbx4_s8(<8 x i8> %a, [4 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbx4_s8(<8 x i8> %a, [4 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.int8x16x4_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.int8x16x4_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x4_t, %struct.int8x16x4_t* [[B]], i32 0, i32 0
@ -424,14 +424,14 @@ int8x8_t test_vqtbx4_s8(int8x8_t a, int8x16x4_t b, uint8x8_t c) {
return vqtbx4_s8(a, b, c);
}
// CHECK-LABEL: define <16 x i8> @test_vqtbx1q_s8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) #1 {
// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbx1q_s8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) #1 {
// CHECK: [[VTBX1_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.tbx1.v16i8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) #3
// CHECK: ret <16 x i8> [[VTBX1_I]]
int8x16_t test_vqtbx1q_s8(int8x16_t a, int8x16_t b, uint8x16_t c) {
return vqtbx1q_s8(a, b, c);
}
// CHECK-LABEL: define <16 x i8> @test_vqtbx2q_s8(<16 x i8> %a, [2 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbx2q_s8(<16 x i8> %a, [2 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.int8x16x2_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.int8x16x2_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x2_t, %struct.int8x16x2_t* [[B]], i32 0, i32 0
@ -452,7 +452,7 @@ int8x16_t test_vqtbx2q_s8(int8x16_t a, int8x16x2_t b, int8x16_t c) {
return vqtbx2q_s8(a, b, c);
}
// CHECK-LABEL: define <16 x i8> @test_vqtbx3q_s8(<16 x i8> %a, [3 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbx3q_s8(<16 x i8> %a, [3 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.int8x16x3_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.int8x16x3_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x3_t, %struct.int8x16x3_t* [[B]], i32 0, i32 0
@ -476,7 +476,7 @@ int8x16_t test_vqtbx3q_s8(int8x16_t a, int8x16x3_t b, int8x16_t c) {
return vqtbx3q_s8(a, b, c);
}
// CHECK-LABEL: define <16 x i8> @test_vqtbx4q_s8(<16 x i8> %a, [4 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbx4q_s8(<16 x i8> %a, [4 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.int8x16x4_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.int8x16x4_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x4_t, %struct.int8x16x4_t* [[B]], i32 0, i32 0
@ -503,7 +503,7 @@ int8x16_t test_vqtbx4q_s8(int8x16_t a, int8x16x4_t b, int8x16_t c) {
return vqtbx4q_s8(a, b, c);
}
// CHECK-LABEL: define <8 x i8> @test_vtbl1_u8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vtbl1_u8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK: [[VTBL1_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> zeroinitializer, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
// CHECK: [[VTBL11_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> [[VTBL1_I]], <8 x i8> %b) #3
// CHECK: ret <8 x i8> [[VTBL11_I]]
@ -511,14 +511,14 @@ uint8x8_t test_vtbl1_u8(uint8x8_t a, uint8x8_t b) {
return vtbl1_u8(a, b);
}
// CHECK-LABEL: define <8 x i8> @test_vqtbl1_u8(<16 x i8> %a, <8 x i8> %b) #1 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbl1_u8(<16 x i8> %a, <8 x i8> %b) #1 {
// CHECK: [[VTBL1_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> %a, <8 x i8> %b) #3
// CHECK: ret <8 x i8> [[VTBL1_I]]
uint8x8_t test_vqtbl1_u8(uint8x16_t a, uint8x8_t b) {
return vqtbl1_u8(a, b);
}
// CHECK-LABEL: define <8 x i8> @test_vtbl2_u8([2 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vtbl2_u8([2 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.uint8x8x2_t, align 8
// CHECK: [[A:%.*]] = alloca %struct.uint8x8x2_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x2_t, %struct.uint8x8x2_t* [[A]], i32 0, i32 0
@ -540,7 +540,7 @@ uint8x8_t test_vtbl2_u8(uint8x8x2_t a, uint8x8_t b) {
return vtbl2_u8(a, b);
}
// CHECK-LABEL: define <8 x i8> @test_vqtbl2_u8([2 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbl2_u8([2 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.uint8x16x2_t, align 16
// CHECK: [[A:%.*]] = alloca %struct.uint8x16x2_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x2_t, %struct.uint8x16x2_t* [[A]], i32 0, i32 0
@ -561,7 +561,7 @@ uint8x8_t test_vqtbl2_u8(uint8x16x2_t a, uint8x8_t b) {
return vqtbl2_u8(a, b);
}
// CHECK-LABEL: define <8 x i8> @test_vtbl3_u8([3 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vtbl3_u8([3 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.uint8x8x3_t, align 8
// CHECK: [[A:%.*]] = alloca %struct.uint8x8x3_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x3_t, %struct.uint8x8x3_t* [[A]], i32 0, i32 0
@ -587,7 +587,7 @@ uint8x8_t test_vtbl3_u8(uint8x8x3_t a, uint8x8_t b) {
return vtbl3_u8(a, b);
}
// CHECK-LABEL: define <8 x i8> @test_vqtbl3_u8([3 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbl3_u8([3 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.uint8x16x3_t, align 16
// CHECK: [[A:%.*]] = alloca %struct.uint8x16x3_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x3_t, %struct.uint8x16x3_t* [[A]], i32 0, i32 0
@ -611,7 +611,7 @@ uint8x8_t test_vqtbl3_u8(uint8x16x3_t a, uint8x8_t b) {
return vqtbl3_u8(a, b);
}
// CHECK-LABEL: define <8 x i8> @test_vtbl4_u8([4 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vtbl4_u8([4 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.uint8x8x4_t, align 8
// CHECK: [[A:%.*]] = alloca %struct.uint8x8x4_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x4_t, %struct.uint8x8x4_t* [[A]], i32 0, i32 0
@ -640,7 +640,7 @@ uint8x8_t test_vtbl4_u8(uint8x8x4_t a, uint8x8_t b) {
return vtbl4_u8(a, b);
}
// CHECK-LABEL: define <8 x i8> @test_vqtbl4_u8([4 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbl4_u8([4 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.uint8x16x4_t, align 16
// CHECK: [[A:%.*]] = alloca %struct.uint8x16x4_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x4_t, %struct.uint8x16x4_t* [[A]], i32 0, i32 0
@ -667,14 +667,14 @@ uint8x8_t test_vqtbl4_u8(uint8x16x4_t a, uint8x8_t b) {
return vqtbl4_u8(a, b);
}
// CHECK-LABEL: define <16 x i8> @test_vqtbl1q_u8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbl1q_u8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK: [[VTBL1_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.tbl1.v16i8(<16 x i8> %a, <16 x i8> %b) #3
// CHECK: ret <16 x i8> [[VTBL1_I]]
uint8x16_t test_vqtbl1q_u8(uint8x16_t a, uint8x16_t b) {
return vqtbl1q_u8(a, b);
}
// CHECK-LABEL: define <16 x i8> @test_vqtbl2q_u8([2 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbl2q_u8([2 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.uint8x16x2_t, align 16
// CHECK: [[A:%.*]] = alloca %struct.uint8x16x2_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x2_t, %struct.uint8x16x2_t* [[A]], i32 0, i32 0
@ -695,7 +695,7 @@ uint8x16_t test_vqtbl2q_u8(uint8x16x2_t a, uint8x16_t b) {
return vqtbl2q_u8(a, b);
}
// CHECK-LABEL: define <16 x i8> @test_vqtbl3q_u8([3 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbl3q_u8([3 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.uint8x16x3_t, align 16
// CHECK: [[A:%.*]] = alloca %struct.uint8x16x3_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x3_t, %struct.uint8x16x3_t* [[A]], i32 0, i32 0
@ -719,7 +719,7 @@ uint8x16_t test_vqtbl3q_u8(uint8x16x3_t a, uint8x16_t b) {
return vqtbl3q_u8(a, b);
}
// CHECK-LABEL: define <16 x i8> @test_vqtbl4q_u8([4 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbl4q_u8([4 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.uint8x16x4_t, align 16
// CHECK: [[A:%.*]] = alloca %struct.uint8x16x4_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x4_t, %struct.uint8x16x4_t* [[A]], i32 0, i32 0
@ -746,7 +746,7 @@ uint8x16_t test_vqtbl4q_u8(uint8x16x4_t a, uint8x16_t b) {
return vqtbl4q_u8(a, b);
}
// CHECK-LABEL: define <8 x i8> @test_vtbx1_u8(<8 x i8> %a, <8 x i8> %b, <8 x i8> %c) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vtbx1_u8(<8 x i8> %a, <8 x i8> %b, <8 x i8> %c) #0 {
// CHECK: [[VTBL1_I:%.*]] = shufflevector <8 x i8> %b, <8 x i8> zeroinitializer, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
// CHECK: [[VTBL11_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> [[VTBL1_I]], <8 x i8> %c) #3
// CHECK: [[TMP0:%.*]] = icmp uge <8 x i8> %c, <i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8>
@ -760,7 +760,7 @@ uint8x8_t test_vtbx1_u8(uint8x8_t a, uint8x8_t b, uint8x8_t c) {
return vtbx1_u8(a, b, c);
}
// CHECK-LABEL: define <8 x i8> @test_vtbx2_u8(<8 x i8> %a, [2 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vtbx2_u8(<8 x i8> %a, [2 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.uint8x8x2_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.uint8x8x2_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x2_t, %struct.uint8x8x2_t* [[B]], i32 0, i32 0
@ -782,7 +782,7 @@ uint8x8_t test_vtbx2_u8(uint8x8_t a, uint8x8x2_t b, uint8x8_t c) {
return vtbx2_u8(a, b, c);
}
// CHECK-LABEL: define <8 x i8> @test_vtbx3_u8(<8 x i8> %a, [3 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vtbx3_u8(<8 x i8> %a, [3 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.uint8x8x3_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.uint8x8x3_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x3_t, %struct.uint8x8x3_t* [[B]], i32 0, i32 0
@ -814,7 +814,7 @@ uint8x8_t test_vtbx3_u8(uint8x8_t a, uint8x8x3_t b, uint8x8_t c) {
return vtbx3_u8(a, b, c);
}
// CHECK-LABEL: define <8 x i8> @test_vtbx4_u8(<8 x i8> %a, [4 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vtbx4_u8(<8 x i8> %a, [4 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.uint8x8x4_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.uint8x8x4_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x4_t, %struct.uint8x8x4_t* [[B]], i32 0, i32 0
@ -843,14 +843,14 @@ uint8x8_t test_vtbx4_u8(uint8x8_t a, uint8x8x4_t b, uint8x8_t c) {
return vtbx4_u8(a, b, c);
}
// CHECK-LABEL: define <8 x i8> @test_vqtbx1_u8(<8 x i8> %a, <16 x i8> %b, <8 x i8> %c) #1 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbx1_u8(<8 x i8> %a, <16 x i8> %b, <8 x i8> %c) #1 {
// CHECK: [[VTBX1_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbx1.v8i8(<8 x i8> %a, <16 x i8> %b, <8 x i8> %c) #3
// CHECK: ret <8 x i8> [[VTBX1_I]]
uint8x8_t test_vqtbx1_u8(uint8x8_t a, uint8x16_t b, uint8x8_t c) {
return vqtbx1_u8(a, b, c);
}
// CHECK-LABEL: define <8 x i8> @test_vqtbx2_u8(<8 x i8> %a, [2 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbx2_u8(<8 x i8> %a, [2 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.uint8x16x2_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.uint8x16x2_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x2_t, %struct.uint8x16x2_t* [[B]], i32 0, i32 0
@ -871,7 +871,7 @@ uint8x8_t test_vqtbx2_u8(uint8x8_t a, uint8x16x2_t b, uint8x8_t c) {
return vqtbx2_u8(a, b, c);
}
// CHECK-LABEL: define <8 x i8> @test_vqtbx3_u8(<8 x i8> %a, [3 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbx3_u8(<8 x i8> %a, [3 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.uint8x16x3_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.uint8x16x3_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x3_t, %struct.uint8x16x3_t* [[B]], i32 0, i32 0
@ -895,7 +895,7 @@ uint8x8_t test_vqtbx3_u8(uint8x8_t a, uint8x16x3_t b, uint8x8_t c) {
return vqtbx3_u8(a, b, c);
}
// CHECK-LABEL: define <8 x i8> @test_vqtbx4_u8(<8 x i8> %a, [4 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbx4_u8(<8 x i8> %a, [4 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.uint8x16x4_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.uint8x16x4_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x4_t, %struct.uint8x16x4_t* [[B]], i32 0, i32 0
@ -922,14 +922,14 @@ uint8x8_t test_vqtbx4_u8(uint8x8_t a, uint8x16x4_t b, uint8x8_t c) {
return vqtbx4_u8(a, b, c);
}
// CHECK-LABEL: define <16 x i8> @test_vqtbx1q_u8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) #1 {
// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbx1q_u8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) #1 {
// CHECK: [[VTBX1_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.tbx1.v16i8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) #3
// CHECK: ret <16 x i8> [[VTBX1_I]]
uint8x16_t test_vqtbx1q_u8(uint8x16_t a, uint8x16_t b, uint8x16_t c) {
return vqtbx1q_u8(a, b, c);
}
// CHECK-LABEL: define <16 x i8> @test_vqtbx2q_u8(<16 x i8> %a, [2 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbx2q_u8(<16 x i8> %a, [2 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.uint8x16x2_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.uint8x16x2_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x2_t, %struct.uint8x16x2_t* [[B]], i32 0, i32 0
@ -950,7 +950,7 @@ uint8x16_t test_vqtbx2q_u8(uint8x16_t a, uint8x16x2_t b, uint8x16_t c) {
return vqtbx2q_u8(a, b, c);
}
// CHECK-LABEL: define <16 x i8> @test_vqtbx3q_u8(<16 x i8> %a, [3 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbx3q_u8(<16 x i8> %a, [3 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.uint8x16x3_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.uint8x16x3_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x3_t, %struct.uint8x16x3_t* [[B]], i32 0, i32 0
@ -974,7 +974,7 @@ uint8x16_t test_vqtbx3q_u8(uint8x16_t a, uint8x16x3_t b, uint8x16_t c) {
return vqtbx3q_u8(a, b, c);
}
// CHECK-LABEL: define <16 x i8> @test_vqtbx4q_u8(<16 x i8> %a, [4 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbx4q_u8(<16 x i8> %a, [4 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.uint8x16x4_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.uint8x16x4_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x4_t, %struct.uint8x16x4_t* [[B]], i32 0, i32 0
@ -1001,7 +1001,7 @@ uint8x16_t test_vqtbx4q_u8(uint8x16_t a, uint8x16x4_t b, uint8x16_t c) {
return vqtbx4q_u8(a, b, c);
}
// CHECK-LABEL: define <8 x i8> @test_vtbl1_p8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vtbl1_p8(<8 x i8> %a, <8 x i8> %b) #0 {
// CHECK: [[VTBL1_I:%.*]] = shufflevector <8 x i8> %a, <8 x i8> zeroinitializer, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
// CHECK: [[VTBL11_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> [[VTBL1_I]], <8 x i8> %b) #3
// CHECK: ret <8 x i8> [[VTBL11_I]]
@ -1009,14 +1009,14 @@ poly8x8_t test_vtbl1_p8(poly8x8_t a, uint8x8_t b) {
return vtbl1_p8(a, b);
}
// CHECK-LABEL: define <8 x i8> @test_vqtbl1_p8(<16 x i8> %a, <8 x i8> %b) #1 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbl1_p8(<16 x i8> %a, <8 x i8> %b) #1 {
// CHECK: [[VTBL1_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> %a, <8 x i8> %b) #3
// CHECK: ret <8 x i8> [[VTBL1_I]]
poly8x8_t test_vqtbl1_p8(poly8x16_t a, uint8x8_t b) {
return vqtbl1_p8(a, b);
}
// CHECK-LABEL: define <8 x i8> @test_vtbl2_p8([2 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vtbl2_p8([2 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.poly8x8x2_t, align 8
// CHECK: [[A:%.*]] = alloca %struct.poly8x8x2_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x2_t, %struct.poly8x8x2_t* [[A]], i32 0, i32 0
@ -1038,7 +1038,7 @@ poly8x8_t test_vtbl2_p8(poly8x8x2_t a, uint8x8_t b) {
return vtbl2_p8(a, b);
}
// CHECK-LABEL: define <8 x i8> @test_vqtbl2_p8([2 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbl2_p8([2 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.poly8x16x2_t, align 16
// CHECK: [[A:%.*]] = alloca %struct.poly8x16x2_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x2_t, %struct.poly8x16x2_t* [[A]], i32 0, i32 0
@ -1059,7 +1059,7 @@ poly8x8_t test_vqtbl2_p8(poly8x16x2_t a, uint8x8_t b) {
return vqtbl2_p8(a, b);
}
// CHECK-LABEL: define <8 x i8> @test_vtbl3_p8([3 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vtbl3_p8([3 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.poly8x8x3_t, align 8
// CHECK: [[A:%.*]] = alloca %struct.poly8x8x3_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x3_t, %struct.poly8x8x3_t* [[A]], i32 0, i32 0
@ -1085,7 +1085,7 @@ poly8x8_t test_vtbl3_p8(poly8x8x3_t a, uint8x8_t b) {
return vtbl3_p8(a, b);
}
// CHECK-LABEL: define <8 x i8> @test_vqtbl3_p8([3 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbl3_p8([3 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.poly8x16x3_t, align 16
// CHECK: [[A:%.*]] = alloca %struct.poly8x16x3_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x3_t, %struct.poly8x16x3_t* [[A]], i32 0, i32 0
@ -1109,7 +1109,7 @@ poly8x8_t test_vqtbl3_p8(poly8x16x3_t a, uint8x8_t b) {
return vqtbl3_p8(a, b);
}
// CHECK-LABEL: define <8 x i8> @test_vtbl4_p8([4 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vtbl4_p8([4 x <8 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.poly8x8x4_t, align 8
// CHECK: [[A:%.*]] = alloca %struct.poly8x8x4_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x4_t, %struct.poly8x8x4_t* [[A]], i32 0, i32 0
@ -1138,7 +1138,7 @@ poly8x8_t test_vtbl4_p8(poly8x8x4_t a, uint8x8_t b) {
return vtbl4_p8(a, b);
}
// CHECK-LABEL: define <8 x i8> @test_vqtbl4_p8([4 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbl4_p8([4 x <16 x i8>] %a.coerce, <8 x i8> %b) #0 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.poly8x16x4_t, align 16
// CHECK: [[A:%.*]] = alloca %struct.poly8x16x4_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x4_t, %struct.poly8x16x4_t* [[A]], i32 0, i32 0
@ -1165,14 +1165,14 @@ poly8x8_t test_vqtbl4_p8(poly8x16x4_t a, uint8x8_t b) {
return vqtbl4_p8(a, b);
}
// CHECK-LABEL: define <16 x i8> @test_vqtbl1q_p8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbl1q_p8(<16 x i8> %a, <16 x i8> %b) #1 {
// CHECK: [[VTBL1_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.tbl1.v16i8(<16 x i8> %a, <16 x i8> %b) #3
// CHECK: ret <16 x i8> [[VTBL1_I]]
poly8x16_t test_vqtbl1q_p8(poly8x16_t a, uint8x16_t b) {
return vqtbl1q_p8(a, b);
}
// CHECK-LABEL: define <16 x i8> @test_vqtbl2q_p8([2 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbl2q_p8([2 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.poly8x16x2_t, align 16
// CHECK: [[A:%.*]] = alloca %struct.poly8x16x2_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x2_t, %struct.poly8x16x2_t* [[A]], i32 0, i32 0
@ -1193,7 +1193,7 @@ poly8x16_t test_vqtbl2q_p8(poly8x16x2_t a, uint8x16_t b) {
return vqtbl2q_p8(a, b);
}
// CHECK-LABEL: define <16 x i8> @test_vqtbl3q_p8([3 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbl3q_p8([3 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.poly8x16x3_t, align 16
// CHECK: [[A:%.*]] = alloca %struct.poly8x16x3_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x3_t, %struct.poly8x16x3_t* [[A]], i32 0, i32 0
@ -1217,7 +1217,7 @@ poly8x16_t test_vqtbl3q_p8(poly8x16x3_t a, uint8x16_t b) {
return vqtbl3q_p8(a, b);
}
// CHECK-LABEL: define <16 x i8> @test_vqtbl4q_p8([4 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbl4q_p8([4 x <16 x i8>] %a.coerce, <16 x i8> %b) #1 {
// CHECK: [[__P0_I:%.*]] = alloca %struct.poly8x16x4_t, align 16
// CHECK: [[A:%.*]] = alloca %struct.poly8x16x4_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x4_t, %struct.poly8x16x4_t* [[A]], i32 0, i32 0
@ -1244,7 +1244,7 @@ poly8x16_t test_vqtbl4q_p8(poly8x16x4_t a, uint8x16_t b) {
return vqtbl4q_p8(a, b);
}
// CHECK-LABEL: define <8 x i8> @test_vtbx1_p8(<8 x i8> %a, <8 x i8> %b, <8 x i8> %c) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vtbx1_p8(<8 x i8> %a, <8 x i8> %b, <8 x i8> %c) #0 {
// CHECK: [[VTBL1_I:%.*]] = shufflevector <8 x i8> %b, <8 x i8> zeroinitializer, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
// CHECK: [[VTBL11_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> [[VTBL1_I]], <8 x i8> %c) #3
// CHECK: [[TMP0:%.*]] = icmp uge <8 x i8> %c, <i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8>
@ -1258,7 +1258,7 @@ poly8x8_t test_vtbx1_p8(poly8x8_t a, poly8x8_t b, uint8x8_t c) {
return vtbx1_p8(a, b, c);
}
// CHECK-LABEL: define <8 x i8> @test_vtbx2_p8(<8 x i8> %a, [2 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vtbx2_p8(<8 x i8> %a, [2 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.poly8x8x2_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.poly8x8x2_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x2_t, %struct.poly8x8x2_t* [[B]], i32 0, i32 0
@ -1280,7 +1280,7 @@ poly8x8_t test_vtbx2_p8(poly8x8_t a, poly8x8x2_t b, uint8x8_t c) {
return vtbx2_p8(a, b, c);
}
// CHECK-LABEL: define <8 x i8> @test_vtbx3_p8(<8 x i8> %a, [3 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vtbx3_p8(<8 x i8> %a, [3 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.poly8x8x3_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.poly8x8x3_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x3_t, %struct.poly8x8x3_t* [[B]], i32 0, i32 0
@ -1312,7 +1312,7 @@ poly8x8_t test_vtbx3_p8(poly8x8_t a, poly8x8x3_t b, uint8x8_t c) {
return vtbx3_p8(a, b, c);
}
// CHECK-LABEL: define <8 x i8> @test_vtbx4_p8(<8 x i8> %a, [4 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vtbx4_p8(<8 x i8> %a, [4 x <8 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.poly8x8x4_t, align 8
// CHECK: [[B:%.*]] = alloca %struct.poly8x8x4_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x4_t, %struct.poly8x8x4_t* [[B]], i32 0, i32 0
@ -1341,14 +1341,14 @@ poly8x8_t test_vtbx4_p8(poly8x8_t a, poly8x8x4_t b, uint8x8_t c) {
return vtbx4_p8(a, b, c);
}
// CHECK-LABEL: define <8 x i8> @test_vqtbx1_p8(<8 x i8> %a, <16 x i8> %b, <8 x i8> %c) #1 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbx1_p8(<8 x i8> %a, <16 x i8> %b, <8 x i8> %c) #1 {
// CHECK: [[VTBX1_I:%.*]] = call <8 x i8> @llvm.aarch64.neon.tbx1.v8i8(<8 x i8> %a, <16 x i8> %b, <8 x i8> %c) #3
// CHECK: ret <8 x i8> [[VTBX1_I]]
poly8x8_t test_vqtbx1_p8(poly8x8_t a, uint8x16_t b, uint8x8_t c) {
return vqtbx1_p8(a, b, c);
}
// CHECK-LABEL: define <8 x i8> @test_vqtbx2_p8(<8 x i8> %a, [2 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbx2_p8(<8 x i8> %a, [2 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.poly8x16x2_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.poly8x16x2_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x2_t, %struct.poly8x16x2_t* [[B]], i32 0, i32 0
@ -1369,7 +1369,7 @@ poly8x8_t test_vqtbx2_p8(poly8x8_t a, poly8x16x2_t b, uint8x8_t c) {
return vqtbx2_p8(a, b, c);
}
// CHECK-LABEL: define <8 x i8> @test_vqtbx3_p8(<8 x i8> %a, [3 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbx3_p8(<8 x i8> %a, [3 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.poly8x16x3_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.poly8x16x3_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x3_t, %struct.poly8x16x3_t* [[B]], i32 0, i32 0
@ -1393,7 +1393,7 @@ poly8x8_t test_vqtbx3_p8(poly8x8_t a, poly8x16x3_t b, uint8x8_t c) {
return vqtbx3_p8(a, b, c);
}
// CHECK-LABEL: define <8 x i8> @test_vqtbx4_p8(<8 x i8> %a, [4 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vqtbx4_p8(<8 x i8> %a, [4 x <16 x i8>] %b.coerce, <8 x i8> %c) #0 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.poly8x16x4_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.poly8x16x4_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x4_t, %struct.poly8x16x4_t* [[B]], i32 0, i32 0
@ -1420,14 +1420,14 @@ poly8x8_t test_vqtbx4_p8(poly8x8_t a, poly8x16x4_t b, uint8x8_t c) {
return vqtbx4_p8(a, b, c);
}
// CHECK-LABEL: define <16 x i8> @test_vqtbx1q_p8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) #1 {
// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbx1q_p8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) #1 {
// CHECK: [[VTBX1_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.tbx1.v16i8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) #3
// CHECK: ret <16 x i8> [[VTBX1_I]]
poly8x16_t test_vqtbx1q_p8(poly8x16_t a, uint8x16_t b, uint8x16_t c) {
return vqtbx1q_p8(a, b, c);
}
// CHECK-LABEL: define <16 x i8> @test_vqtbx2q_p8(<16 x i8> %a, [2 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbx2q_p8(<16 x i8> %a, [2 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.poly8x16x2_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.poly8x16x2_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x2_t, %struct.poly8x16x2_t* [[B]], i32 0, i32 0
@ -1448,7 +1448,7 @@ poly8x16_t test_vqtbx2q_p8(poly8x16_t a, poly8x16x2_t b, uint8x16_t c) {
return vqtbx2q_p8(a, b, c);
}
// CHECK-LABEL: define <16 x i8> @test_vqtbx3q_p8(<16 x i8> %a, [3 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbx3q_p8(<16 x i8> %a, [3 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.poly8x16x3_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.poly8x16x3_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x3_t, %struct.poly8x16x3_t* [[B]], i32 0, i32 0
@ -1472,7 +1472,7 @@ poly8x16_t test_vqtbx3q_p8(poly8x16_t a, poly8x16x3_t b, uint8x16_t c) {
return vqtbx3q_p8(a, b, c);
}
// CHECK-LABEL: define <16 x i8> @test_vqtbx4q_p8(<16 x i8> %a, [4 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
// CHECK-LABEL: define dso_local <16 x i8> @test_vqtbx4q_p8(<16 x i8> %a, [4 x <16 x i8>] %b.coerce, <16 x i8> %c) #1 {
// CHECK: [[__P1_I:%.*]] = alloca %struct.poly8x16x4_t, align 16
// CHECK: [[B:%.*]] = alloca %struct.poly8x16x4_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x4_t, %struct.poly8x16x4_t* [[B]], i32 0, i32 0

28
clang/test/CodeGen/aarch64-neon-vcombine.c
View File

@ -4,98 +4,98 @@
#include <arm_neon.h>
// CHECK-LABEL: define <16 x i8> @test_vcombine_s8(<8 x i8> %low, <8 x i8> %high) #0 {
// CHECK-LABEL: define dso_local <16 x i8> @test_vcombine_s8(<8 x i8> %low, <8 x i8> %high) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> %low, <8 x i8> %high, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
// CHECK: ret <16 x i8> [[SHUFFLE_I]]
int8x16_t test_vcombine_s8(int8x8_t low, int8x8_t high) {
return vcombine_s8(low, high);
}
// CHECK-LABEL: define <8 x i16> @test_vcombine_s16(<4 x i16> %low, <4 x i16> %high) #0 {
// CHECK-LABEL: define dso_local <8 x i16> @test_vcombine_s16(<4 x i16> %low, <4 x i16> %high) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x i16> %low, <4 x i16> %high, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
// CHECK: ret <8 x i16> [[SHUFFLE_I]]
int16x8_t test_vcombine_s16(int16x4_t low, int16x4_t high) {
return vcombine_s16(low, high);
}
// CHECK-LABEL: define <4 x i32> @test_vcombine_s32(<2 x i32> %low, <2 x i32> %high) #0 {
// CHECK-LABEL: define dso_local <4 x i32> @test_vcombine_s32(<2 x i32> %low, <2 x i32> %high) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i32> %low, <2 x i32> %high, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
// CHECK: ret <4 x i32> [[SHUFFLE_I]]
int32x4_t test_vcombine_s32(int32x2_t low, int32x2_t high) {
return vcombine_s32(low, high);
}
// CHECK-LABEL: define <2 x i64> @test_vcombine_s64(<1 x i64> %low, <1 x i64> %high) #0 {
// CHECK-LABEL: define dso_local <2 x i64> @test_vcombine_s64(<1 x i64> %low, <1 x i64> %high) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <1 x i64> %low, <1 x i64> %high, <2 x i32> <i32 0, i32 1>
// CHECK: ret <2 x i64> [[SHUFFLE_I]]
int64x2_t test_vcombine_s64(int64x1_t low, int64x1_t high) {
return vcombine_s64(low, high);
}
// CHECK-LABEL: define <16 x i8> @test_vcombine_u8(<8 x i8> %low, <8 x i8> %high) #0 {
// CHECK-LABEL: define dso_local <16 x i8> @test_vcombine_u8(<8 x i8> %low, <8 x i8> %high) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> %low, <8 x i8> %high, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
// CHECK: ret <16 x i8> [[SHUFFLE_I]]
uint8x16_t test_vcombine_u8(uint8x8_t low, uint8x8_t high) {
return vcombine_u8(low, high);
}
// CHECK-LABEL: define <8 x i16> @test_vcombine_u16(<4 x i16> %low, <4 x i16> %high) #0 {
// CHECK-LABEL: define dso_local <8 x i16> @test_vcombine_u16(<4 x i16> %low, <4 x i16> %high) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x i16> %low, <4 x i16> %high, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
// CHECK: ret <8 x i16> [[SHUFFLE_I]]
uint16x8_t test_vcombine_u16(uint16x4_t low, uint16x4_t high) {
return vcombine_u16(low, high);
}
// CHECK-LABEL: define <4 x i32> @test_vcombine_u32(<2 x i32> %low, <2 x i32> %high) #0 {
// CHECK-LABEL: define dso_local <4 x i32> @test_vcombine_u32(<2 x i32> %low, <2 x i32> %high) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i32> %low, <2 x i32> %high, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
// CHECK: ret <4 x i32> [[SHUFFLE_I]]
uint32x4_t test_vcombine_u32(uint32x2_t low, uint32x2_t high) {
return vcombine_u32(low, high);
}
// CHECK-LABEL: define <2 x i64> @test_vcombine_u64(<1 x i64> %low, <1 x i64> %high) #0 {
// CHECK-LABEL: define dso_local <2 x i64> @test_vcombine_u64(<1 x i64> %low, <1 x i64> %high) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <1 x i64> %low, <1 x i64> %high, <2 x i32> <i32 0, i32 1>
// CHECK: ret <2 x i64> [[SHUFFLE_I]]
uint64x2_t test_vcombine_u64(uint64x1_t low, uint64x1_t high) {
return vcombine_u64(low, high);
}
// CHECK-LABEL: define <2 x i64> @test_vcombine_p64(<1 x i64> %low, <1 x i64> %high) #0 {
// CHECK-LABEL: define dso_local <2 x i64> @test_vcombine_p64(<1 x i64> %low, <1 x i64> %high) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <1 x i64> %low, <1 x i64> %high, <2 x i32> <i32 0, i32 1>
// CHECK: ret <2 x i64> [[SHUFFLE_I]]
poly64x2_t test_vcombine_p64(poly64x1_t low, poly64x1_t high) {
return vcombine_p64(low, high);
}
// CHECK-LABEL: define <8 x half> @test_vcombine_f16(<4 x half> %low, <4 x half> %high) #0 {
// CHECK-LABEL: define dso_local <8 x half> @test_vcombine_f16(<4 x half> %low, <4 x half> %high) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x half> %low, <4 x half> %high, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
// CHECK: ret <8 x half> [[SHUFFLE_I]]
float16x8_t test_vcombine_f16(float16x4_t low, float16x4_t high) {
return vcombine_f16(low, high);
}
// CHECK-LABEL: define <4 x float> @test_vcombine_f32(<2 x float> %low, <2 x float> %high) #0 {
// CHECK-LABEL: define dso_local <4 x float> @test_vcombine_f32(<2 x float> %low, <2 x float> %high) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x float> %low, <2 x float> %high, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
// CHECK: ret <4 x float> [[SHUFFLE_I]]
float32x4_t test_vcombine_f32(float32x2_t low, float32x2_t high) {
return vcombine_f32(low, high);
}
// CHECK-LABEL: define <16 x i8> @test_vcombine_p8(<8 x i8> %low, <8 x i8> %high) #0 {
// CHECK-LABEL: define dso_local <16 x i8> @test_vcombine_p8(<8 x i8> %low, <8 x i8> %high) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i8> %low, <8 x i8> %high, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
// CHECK: ret <16 x i8> [[SHUFFLE_I]]
poly8x16_t test_vcombine_p8(poly8x8_t low, poly8x8_t high) {
return vcombine_p8(low, high);
}
// CHECK-LABEL: define <8 x i16> @test_vcombine_p16(<4 x i16> %low, <4 x i16> %high) #0 {
// CHECK-LABEL: define dso_local <8 x i16> @test_vcombine_p16(<4 x i16> %low, <4 x i16> %high) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x i16> %low, <4 x i16> %high, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
// CHECK: ret <8 x i16> [[SHUFFLE_I]]
poly16x8_t test_vcombine_p16(poly16x4_t low, poly16x4_t high) {
return vcombine_p16(low, high);
}
// CHECK-LABEL: define <2 x double> @test_vcombine_f64(<1 x double> %low, <1 x double> %high) #0 {
// CHECK-LABEL: define dso_local <2 x double> @test_vcombine_f64(<1 x double> %low, <1 x double> %high) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <1 x double> %low, <1 x double> %high, <2 x i32> <i32 0, i32 1>
// CHECK: ret <2 x double> [[SHUFFLE_I]]
float64x2_t test_vcombine_f64(float64x1_t low, float64x1_t high) {

56
clang/test/CodeGen/aarch64-neon-vget-hilo.c
View File

@ -5,196 +5,196 @@
#include <arm_neon.h>
// CHECK-LABEL: define <8 x i8> @test_vget_high_s8(<16 x i8> %a) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vget_high_s8(<16 x i8> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %a, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
// CHECK: ret <8 x i8> [[SHUFFLE_I]]
int8x8_t test_vget_high_s8(int8x16_t a) {
return vget_high_s8(a);
}
// CHECK-LABEL: define <4 x i16> @test_vget_high_s16(<8 x i16> %a) #0 {
// CHECK-LABEL: define dso_local <4 x i16> @test_vget_high_s16(<8 x i16> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %a, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
// CHECK: ret <4 x i16> [[SHUFFLE_I]]
int16x4_t test_vget_high_s16(int16x8_t a) {
return vget_high_s16(a);
}
// CHECK-LABEL: define <2 x i32> @test_vget_high_s32(<4 x i32> %a) #0 {
// CHECK-LABEL: define dso_local <2 x i32> @test_vget_high_s32(<4 x i32> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x i32> %a, <4 x i32> %a, <2 x i32> <i32 2, i32 3>
// CHECK: ret <2 x i32> [[SHUFFLE_I]]
int32x2_t test_vget_high_s32(int32x4_t a) {
return vget_high_s32(a);
}
// CHECK-LABEL: define <1 x i64> @test_vget_high_s64(<2 x i64> %a) #0 {
// CHECK-LABEL: define dso_local <1 x i64> @test_vget_high_s64(<2 x i64> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %a, <1 x i32> <i32 1>
// CHECK: ret <1 x i64> [[SHUFFLE_I]]
int64x1_t test_vget_high_s64(int64x2_t a) {
return vget_high_s64(a);
}
// CHECK-LABEL: define <8 x i8> @test_vget_high_u8(<16 x i8> %a) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vget_high_u8(<16 x i8> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %a, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
// CHECK: ret <8 x i8> [[SHUFFLE_I]]
uint8x8_t test_vget_high_u8(uint8x16_t a) {
return vget_high_u8(a);
}
// CHECK-LABEL: define <4 x i16> @test_vget_high_u16(<8 x i16> %a) #0 {
// CHECK-LABEL: define dso_local <4 x i16> @test_vget_high_u16(<8 x i16> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %a, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
// CHECK: ret <4 x i16> [[SHUFFLE_I]]
uint16x4_t test_vget_high_u16(uint16x8_t a) {
return vget_high_u16(a);
}
// CHECK-LABEL: define <2 x i32> @test_vget_high_u32(<4 x i32> %a) #0 {
// CHECK-LABEL: define dso_local <2 x i32> @test_vget_high_u32(<4 x i32> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x i32> %a, <4 x i32> %a, <2 x i32> <i32 2, i32 3>
// CHECK: ret <2 x i32> [[SHUFFLE_I]]
uint32x2_t test_vget_high_u32(uint32x4_t a) {
return vget_high_u32(a);
}
// CHECK-LABEL: define <1 x i64> @test_vget_high_u64(<2 x i64> %a) #0 {
// CHECK-LABEL: define dso_local <1 x i64> @test_vget_high_u64(<2 x i64> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %a, <1 x i32> <i32 1>
// CHECK: ret <1 x i64> [[SHUFFLE_I]]
uint64x1_t test_vget_high_u64(uint64x2_t a) {
return vget_high_u64(a);
}
// CHECK-LABEL: define <1 x i64> @test_vget_high_p64(<2 x i64> %a) #0 {
// CHECK-LABEL: define dso_local <1 x i64> @test_vget_high_p64(<2 x i64> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %a, <1 x i32> <i32 1>
// CHECK: ret <1 x i64> [[SHUFFLE_I]]
poly64x1_t test_vget_high_p64(poly64x2_t a) {
return vget_high_p64(a);
}
// CHECK-LABEL: define <4 x half> @test_vget_high_f16(<8 x half> %a) #0 {
// CHECK-LABEL: define dso_local <4 x half> @test_vget_high_f16(<8 x half> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x half> %a, <8 x half> %a, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
// CHECK: ret <4 x half> [[SHUFFLE_I]]
float16x4_t test_vget_high_f16(float16x8_t a) {
return vget_high_f16(a);
}
// CHECK-LABEL: define <2 x float> @test_vget_high_f32(<4 x float> %a) #0 {
// CHECK-LABEL: define dso_local <2 x float> @test_vget_high_f32(<4 x float> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x float> %a, <4 x float> %a, <2 x i32> <i32 2, i32 3>
// CHECK: ret <2 x float> [[SHUFFLE_I]]
float32x2_t test_vget_high_f32(float32x4_t a) {
return vget_high_f32(a);
}
// CHECK-LABEL: define <8 x i8> @test_vget_high_p8(<16 x i8> %a) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vget_high_p8(<16 x i8> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %a, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
// CHECK: ret <8 x i8> [[SHUFFLE_I]]
poly8x8_t test_vget_high_p8(poly8x16_t a) {
return vget_high_p8(a);
}
// CHECK-LABEL: define <4 x i16> @test_vget_high_p16(<8 x i16> %a) #0 {
// CHECK-LABEL: define dso_local <4 x i16> @test_vget_high_p16(<8 x i16> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %a, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
// CHECK: ret <4 x i16> [[SHUFFLE_I]]
poly16x4_t test_vget_high_p16(poly16x8_t a) {
return vget_high_p16(a);
}
// CHECK-LABEL: define <1 x double> @test_vget_high_f64(<2 x double> %a) #0 {
// CHECK-LABEL: define dso_local <1 x double> @test_vget_high_f64(<2 x double> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x double> %a, <2 x double> %a, <1 x i32> <i32 1>
// CHECK: ret <1 x double> [[SHUFFLE_I]]
float64x1_t test_vget_high_f64(float64x2_t a) {
return vget_high_f64(a);
}
// CHECK-LABEL: define <8 x i8> @test_vget_low_s8(<16 x i8> %a) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vget_low_s8(<16 x i8> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %a, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
// CHECK: ret <8 x i8> [[SHUFFLE_I]]
int8x8_t test_vget_low_s8(int8x16_t a) {
return vget_low_s8(a);
}
// CHECK-LABEL: define <4 x i16> @test_vget_low_s16(<8 x i16> %a) #0 {
// CHECK-LABEL: define dso_local <4 x i16> @test_vget_low_s16(<8 x i16> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %a, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
// CHECK: ret <4 x i16> [[SHUFFLE_I]]
int16x4_t test_vget_low_s16(int16x8_t a) {
return vget_low_s16(a);
}
// CHECK-LABEL: define <2 x i32> @test_vget_low_s32(<4 x i32> %a) #0 {
// CHECK-LABEL: define dso_local <2 x i32> @test_vget_low_s32(<4 x i32> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x i32> %a, <4 x i32> %a, <2 x i32> <i32 0, i32 1>
// CHECK: ret <2 x i32> [[SHUFFLE_I]]
int32x2_t test_vget_low_s32(int32x4_t a) {
return vget_low_s32(a);
}
// CHECK-LABEL: define <1 x i64> @test_vget_low_s64(<2 x i64> %a) #0 {
// CHECK-LABEL: define dso_local <1 x i64> @test_vget_low_s64(<2 x i64> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %a, <1 x i32> zeroinitializer
// CHECK: ret <1 x i64> [[SHUFFLE_I]]
int64x1_t test_vget_low_s64(int64x2_t a) {
return vget_low_s64(a);
}
// CHECK-LABEL: define <8 x i8> @test_vget_low_u8(<16 x i8> %a) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vget_low_u8(<16 x i8> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %a, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
// CHECK: ret <8 x i8> [[SHUFFLE_I]]
uint8x8_t test_vget_low_u8(uint8x16_t a) {
return vget_low_u8(a);
}
// CHECK-LABEL: define <4 x i16> @test_vget_low_u16(<8 x i16> %a) #0 {
// CHECK-LABEL: define dso_local <4 x i16> @test_vget_low_u16(<8 x i16> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %a, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
// CHECK: ret <4 x i16> [[SHUFFLE_I]]
uint16x4_t test_vget_low_u16(uint16x8_t a) {
return vget_low_u16(a);
}
// CHECK-LABEL: define <2 x i32> @test_vget_low_u32(<4 x i32> %a) #0 {
// CHECK-LABEL: define dso_local <2 x i32> @test_vget_low_u32(<4 x i32> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x i32> %a, <4 x i32> %a, <2 x i32> <i32 0, i32 1>
// CHECK: ret <2 x i32> [[SHUFFLE_I]]
uint32x2_t test_vget_low_u32(uint32x4_t a) {
return vget_low_u32(a);
}
// CHECK-LABEL: define <1 x i64> @test_vget_low_u64(<2 x i64> %a) #0 {
// CHECK-LABEL: define dso_local <1 x i64> @test_vget_low_u64(<2 x i64> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %a, <1 x i32> zeroinitializer
// CHECK: ret <1 x i64> [[SHUFFLE_I]]
uint64x1_t test_vget_low_u64(uint64x2_t a) {
return vget_low_u64(a);
}
// CHECK-LABEL: define <1 x i64> @test_vget_low_p64(<2 x i64> %a) #0 {
// CHECK-LABEL: define dso_local <1 x i64> @test_vget_low_p64(<2 x i64> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %a, <1 x i32> zeroinitializer
// CHECK: ret <1 x i64> [[SHUFFLE_I]]
poly64x1_t test_vget_low_p64(poly64x2_t a) {
return vget_low_p64(a);
}
// CHECK-LABEL: define <4 x half> @test_vget_low_f16(<8 x half> %a) #0 {
// CHECK-LABEL: define dso_local <4 x half> @test_vget_low_f16(<8 x half> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x half> %a, <8 x half> %a, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
// CHECK: ret <4 x half> [[SHUFFLE_I]]
float16x4_t test_vget_low_f16(float16x8_t a) {
return vget_low_f16(a);
}
// CHECK-LABEL: define <2 x float> @test_vget_low_f32(<4 x float> %a) #0 {
// CHECK-LABEL: define dso_local <2 x float> @test_vget_low_f32(<4 x float> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <4 x float> %a, <4 x float> %a, <2 x i32> <i32 0, i32 1>
// CHECK: ret <2 x float> [[SHUFFLE_I]]
float32x2_t test_vget_low_f32(float32x4_t a) {
return vget_low_f32(a);
}
// CHECK-LABEL: define <8 x i8> @test_vget_low_p8(<16 x i8> %a) #0 {
// CHECK-LABEL: define dso_local <8 x i8> @test_vget_low_p8(<16 x i8> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <16 x i8> %a, <16 x i8> %a, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
// CHECK: ret <8 x i8> [[SHUFFLE_I]]
poly8x8_t test_vget_low_p8(poly8x16_t a) {
return vget_low_p8(a);
}
// CHECK-LABEL: define <4 x i16> @test_vget_low_p16(<8 x i16> %a) #0 {
// CHECK-LABEL: define dso_local <4 x i16> @test_vget_low_p16(<8 x i16> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <8 x i16> %a, <8 x i16> %a, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
// CHECK: ret <4 x i16> [[SHUFFLE_I]]
poly16x4_t test_vget_low_p16(poly16x8_t a) {
return vget_low_p16(a);
}
// CHECK-LABEL: define <1 x double> @test_vget_low_f64(<2 x double> %a) #0 {
// CHECK-LABEL: define dso_local <1 x double> @test_vget_low_f64(<2 x double> %a) #0 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x double> %a, <2 x double> %a, <1 x i32> zeroinitializer
// CHECK: ret <1 x double> [[SHUFFLE_I]]
float64x1_t test_vget_low_f64(float64x2_t a) {

62
clang/test/CodeGen/aarch64-poly128.c
View File

@ -12,7 +12,7 @@
#include <arm_neon.h>
// CHECK-LABEL: define void @test_vstrq_p128(i128* %ptr, i128 %val) #0 {
// CHECK-LABEL: define dso_local void @test_vstrq_p128(i128* %ptr, i128 %val) #0 {
// CHECK: [[TMP0:%.*]] = bitcast i128* %ptr to i8*
// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i128*
// CHECK: store i128 %val, i128* [[TMP1]]
@ -22,7 +22,7 @@ void test_vstrq_p128(poly128_t * ptr, poly128_t val) {
}
// CHECK-LABEL: define i128 @test_vldrq_p128(i128* %ptr) #0 {
// CHECK-LABEL: define dso_local i128 @test_vldrq_p128(i128* %ptr) #0 {
// CHECK: [[TMP0:%.*]] = bitcast i128* %ptr to i8*
// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i128*
// CHECK: [[TMP2:%.*]] = load i128, i128* [[TMP1]]
@ -32,7 +32,7 @@ poly128_t test_vldrq_p128(poly128_t * ptr) {
}
// CHECK-LABEL: define void @test_ld_st_p128(i128* %ptr) #0 {
// CHECK-LABEL: define dso_local void @test_ld_st_p128(i128* %ptr) #0 {
// CHECK: [[TMP0:%.*]] = bitcast i128* %ptr to i8*
// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i128*
// CHECK: [[TMP2:%.*]] = load i128, i128* [[TMP1]]
@ -46,7 +46,7 @@ void test_ld_st_p128(poly128_t * ptr) {
}
// CHECK-LABEL: define i128 @test_vmull_p64(i64 %a, i64 %b) #0 {
// CHECK-LABEL: define dso_local i128 @test_vmull_p64(i64 %a, i64 %b) #0 {
// CHECK: [[VMULL_P64_I:%.*]] = call <16 x i8> @llvm.aarch64.neon.pmull64(i64 %a, i64 %b) #3
// CHECK: [[VMULL_P641_I:%.*]] = bitcast <16 x i8> [[VMULL_P64_I]] to i128
// CHECK: ret i128 [[VMULL_P641_I]]
@ -54,7 +54,7 @@ poly128_t test_vmull_p64(poly64_t a, poly64_t b) {
return vmull_p64(a, b);
}
// CHECK-LABEL: define i128 @test_vmull_high_p64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK-LABEL: define dso_local i128 @test_vmull_high_p64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[SHUFFLE_I_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %a, <1 x i32> <i32 1>
// CHECK: [[TMP0:%.*]] = bitcast <1 x i64> [[SHUFFLE_I_I]] to i64
// CHECK: [[SHUFFLE_I7_I:%.*]] = shufflevector <2 x i64> %b, <2 x i64> %b, <1 x i32> <i32 1>
@ -66,182 +66,182 @@ poly128_t test_vmull_high_p64(poly64x2_t a, poly64x2_t b) {
return vmull_high_p64(a, b);
}
// CHECK-LABEL: define i128 @test_vreinterpretq_p128_s8(<16 x i8> %a) #1 {
// CHECK-LABEL: define dso_local i128 @test_vreinterpretq_p128_s8(<16 x i8> %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <16 x i8> %a to i128
// CHECK: ret i128 [[TMP0]]
poly128_t test_vreinterpretq_p128_s8(int8x16_t a) {
return vreinterpretq_p128_s8(a);
}
// CHECK-LABEL: define i128 @test_vreinterpretq_p128_s16(<8 x i16> %a) #1 {
// CHECK-LABEL: define dso_local i128 @test_vreinterpretq_p128_s16(<8 x i16> %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <8 x i16> %a to i128
// CHECK: ret i128 [[TMP0]]
poly128_t test_vreinterpretq_p128_s16(int16x8_t a) {
return vreinterpretq_p128_s16(a);
}
// CHECK-LABEL: define i128 @test_vreinterpretq_p128_s32(<4 x i32> %a) #1 {
// CHECK-LABEL: define dso_local i128 @test_vreinterpretq_p128_s32(<4 x i32> %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <4 x i32> %a to i128
// CHECK: ret i128 [[TMP0]]
poly128_t test_vreinterpretq_p128_s32(int32x4_t a) {
return vreinterpretq_p128_s32(a);
}
// CHECK-LABEL: define i128 @test_vreinterpretq_p128_s64(<2 x i64> %a) #1 {
// CHECK-LABEL: define dso_local i128 @test_vreinterpretq_p128_s64(<2 x i64> %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <2 x i64> %a to i128
// CHECK: ret i128 [[TMP0]]
poly128_t test_vreinterpretq_p128_s64(int64x2_t a) {
return vreinterpretq_p128_s64(a);
}
// CHECK-LABEL: define i128 @test_vreinterpretq_p128_u8(<16 x i8> %a) #1 {
// CHECK-LABEL: define dso_local i128 @test_vreinterpretq_p128_u8(<16 x i8> %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <16 x i8> %a to i128
// CHECK: ret i128 [[TMP0]]
poly128_t test_vreinterpretq_p128_u8(uint8x16_t a) {
return vreinterpretq_p128_u8(a);
}
// CHECK-LABEL: define i128 @test_vreinterpretq_p128_u16(<8 x i16> %a) #1 {
// CHECK-LABEL: define dso_local i128 @test_vreinterpretq_p128_u16(<8 x i16> %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <8 x i16> %a to i128
// CHECK: ret i128 [[TMP0]]
poly128_t test_vreinterpretq_p128_u16(uint16x8_t a) {
return vreinterpretq_p128_u16(a);
}
// CHECK-LABEL: define i128 @test_vreinterpretq_p128_u32(<4 x i32> %a) #1 {
// CHECK-LABEL: define dso_local i128 @test_vreinterpretq_p128_u32(<4 x i32> %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <4 x i32> %a to i128
// CHECK: ret i128 [[TMP0]]
poly128_t test_vreinterpretq_p128_u32(uint32x4_t a) {
return vreinterpretq_p128_u32(a);
}
// CHECK-LABEL: define i128 @test_vreinterpretq_p128_u64(<2 x i64> %a) #1 {
// CHECK-LABEL: define dso_local i128 @test_vreinterpretq_p128_u64(<2 x i64> %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <2 x i64> %a to i128
// CHECK: ret i128 [[TMP0]]
poly128_t test_vreinterpretq_p128_u64(uint64x2_t a) {
return vreinterpretq_p128_u64(a);
}
// CHECK-LABEL: define i128 @test_vreinterpretq_p128_f32(<4 x float> %a) #1 {
// CHECK-LABEL: define dso_local i128 @test_vreinterpretq_p128_f32(<4 x float> %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <4 x float> %a to i128
// CHECK: ret i128 [[TMP0]]
poly128_t test_vreinterpretq_p128_f32(float32x4_t a) {
return vreinterpretq_p128_f32(a);
}
// CHECK-LABEL: define i128 @test_vreinterpretq_p128_f64(<2 x double> %a) #1 {
// CHECK-LABEL: define dso_local i128 @test_vreinterpretq_p128_f64(<2 x double> %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <2 x double> %a to i128
// CHECK: ret i128 [[TMP0]]
poly128_t test_vreinterpretq_p128_f64(float64x2_t a) {
return vreinterpretq_p128_f64(a);
}
// CHECK-LABEL: define i128 @test_vreinterpretq_p128_p8(<16 x i8> %a) #1 {
// CHECK-LABEL: define dso_local i128 @test_vreinterpretq_p128_p8(<16 x i8> %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <16 x i8> %a to i128
// CHECK: ret i128 [[TMP0]]
poly128_t test_vreinterpretq_p128_p8(poly8x16_t a) {
return vreinterpretq_p128_p8(a);
}
// CHECK-LABEL: define i128 @test_vreinterpretq_p128_p16(<8 x i16> %a) #1 {
// CHECK-LABEL: define dso_local i128 @test_vreinterpretq_p128_p16(<8 x i16> %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <8 x i16> %a to i128
// CHECK: ret i128 [[TMP0]]
poly128_t test_vreinterpretq_p128_p16(poly16x8_t a) {
return vreinterpretq_p128_p16(a);
}
// CHECK-LABEL: define i128 @test_vreinterpretq_p128_p64(<2 x i64> %a) #1 {
// CHECK-LABEL: define dso_local i128 @test_vreinterpretq_p128_p64(<2 x i64> %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <2 x i64> %a to i128
// CHECK: ret i128 [[TMP0]]
poly128_t test_vreinterpretq_p128_p64(poly64x2_t a) {
return vreinterpretq_p128_p64(a);
}
// CHECK-LABEL: define <16 x i8> @test_vreinterpretq_s8_p128(i128 %a) #1 {
// CHECK-LABEL: define dso_local <16 x i8> @test_vreinterpretq_s8_p128(i128 %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i128 %a to <16 x i8>
// CHECK: ret <16 x i8> [[TMP0]]
int8x16_t test_vreinterpretq_s8_p128(poly128_t a) {
return vreinterpretq_s8_p128(a);
}
// CHECK-LABEL: define <8 x i16> @test_vreinterpretq_s16_p128(i128 %a) #1 {
// CHECK-LABEL: define dso_local <8 x i16> @test_vreinterpretq_s16_p128(i128 %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i128 %a to <8 x i16>
// CHECK: ret <8 x i16> [[TMP0]]
int16x8_t test_vreinterpretq_s16_p128(poly128_t a) {
return vreinterpretq_s16_p128(a);
}
// CHECK-LABEL: define <4 x i32> @test_vreinterpretq_s32_p128(i128 %a) #1 {
// CHECK-LABEL: define dso_local <4 x i32> @test_vreinterpretq_s32_p128(i128 %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i128 %a to <4 x i32>
// CHECK: ret <4 x i32> [[TMP0]]
int32x4_t test_vreinterpretq_s32_p128(poly128_t a) {
return vreinterpretq_s32_p128(a);
}
// CHECK-LABEL: define <2 x i64> @test_vreinterpretq_s64_p128(i128 %a) #1 {
// CHECK-LABEL: define dso_local <2 x i64> @test_vreinterpretq_s64_p128(i128 %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i128 %a to <2 x i64>
// CHECK: ret <2 x i64> [[TMP0]]
int64x2_t test_vreinterpretq_s64_p128(poly128_t a) {
return vreinterpretq_s64_p128(a);
}
// CHECK-LABEL: define <16 x i8> @test_vreinterpretq_u8_p128(i128 %a) #1 {
// CHECK-LABEL: define dso_local <16 x i8> @test_vreinterpretq_u8_p128(i128 %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i128 %a to <16 x i8>
// CHECK: ret <16 x i8> [[TMP0]]
uint8x16_t test_vreinterpretq_u8_p128(poly128_t a) {
return vreinterpretq_u8_p128(a);
}
// CHECK-LABEL: define <8 x i16> @test_vreinterpretq_u16_p128(i128 %a) #1 {
// CHECK-LABEL: define dso_local <8 x i16> @test_vreinterpretq_u16_p128(i128 %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i128 %a to <8 x i16>
// CHECK: ret <8 x i16> [[TMP0]]
uint16x8_t test_vreinterpretq_u16_p128(poly128_t a) {
return vreinterpretq_u16_p128(a);
}
// CHECK-LABEL: define <4 x i32> @test_vreinterpretq_u32_p128(i128 %a) #1 {
// CHECK-LABEL: define dso_local <4 x i32> @test_vreinterpretq_u32_p128(i128 %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i128 %a to <4 x i32>
// CHECK: ret <4 x i32> [[TMP0]]
uint32x4_t test_vreinterpretq_u32_p128(poly128_t a) {
return vreinterpretq_u32_p128(a);
}
// CHECK-LABEL: define <2 x i64> @test_vreinterpretq_u64_p128(i128 %a) #1 {
// CHECK-LABEL: define dso_local <2 x i64> @test_vreinterpretq_u64_p128(i128 %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i128 %a to <2 x i64>
// CHECK: ret <2 x i64> [[TMP0]]
uint64x2_t test_vreinterpretq_u64_p128(poly128_t a) {
return vreinterpretq_u64_p128(a);
}
// CHECK-LABEL: define <4 x float> @test_vreinterpretq_f32_p128(i128 %a) #1 {
// CHECK-LABEL: define dso_local <4 x float> @test_vreinterpretq_f32_p128(i128 %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i128 %a to <4 x float>
// CHECK: ret <4 x float> [[TMP0]]
float32x4_t test_vreinterpretq_f32_p128(poly128_t a) {
return vreinterpretq_f32_p128(a);
}
// CHECK-LABEL: define <2 x double> @test_vreinterpretq_f64_p128(i128 %a) #1 {
// CHECK-LABEL: define dso_local <2 x double> @test_vreinterpretq_f64_p128(i128 %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i128 %a to <2 x double>
// CHECK: ret <2 x double> [[TMP0]]
float64x2_t test_vreinterpretq_f64_p128(poly128_t a) {
return vreinterpretq_f64_p128(a);
}
// CHECK-LABEL: define <16 x i8> @test_vreinterpretq_p8_p128(i128 %a) #1 {
// CHECK-LABEL: define dso_local <16 x i8> @test_vreinterpretq_p8_p128(i128 %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i128 %a to <16 x i8>
// CHECK: ret <16 x i8> [[TMP0]]
poly8x16_t test_vreinterpretq_p8_p128(poly128_t a) {
return vreinterpretq_p8_p128(a);
}
// CHECK-LABEL: define <8 x i16> @test_vreinterpretq_p16_p128(i128 %a) #1 {
// CHECK-LABEL: define dso_local <8 x i16> @test_vreinterpretq_p16_p128(i128 %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i128 %a to <8 x i16>
// CHECK: ret <8 x i16> [[TMP0]]
poly16x8_t test_vreinterpretq_p16_p128(poly128_t a) {
return vreinterpretq_p16_p128(a);
}
// CHECK-LABEL: define <2 x i64> @test_vreinterpretq_p64_p128(i128 %a) #1 {
// CHECK-LABEL: define dso_local <2 x i64> @test_vreinterpretq_p64_p128(i128 %a) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i128 %a to <2 x i64>
// CHECK: ret <2 x i64> [[TMP0]]
poly64x2_t test_vreinterpretq_p64_p128(poly128_t a) {

96
clang/test/CodeGen/aarch64-poly64.c
View File

@ -6,7 +6,7 @@
#include <arm_neon.h>
// CHECK-LABEL: define <1 x i64> @test_vceq_p64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK-LABEL: define dso_local <1 x i64> @test_vceq_p64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK: [[CMP_I:%.*]] = icmp eq <1 x i64> %a, %b
// CHECK: [[SEXT_I:%.*]] = sext <1 x i1> [[CMP_I]] to <1 x i64>
// CHECK: ret <1 x i64> [[SEXT_I]]
@ -14,7 +14,7 @@ uint64x1_t test_vceq_p64(poly64x1_t a, poly64x1_t b) {
return vceq_p64(a, b);
}
// CHECK-LABEL: define <2 x i64> @test_vceqq_p64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK-LABEL: define dso_local <2 x i64> @test_vceqq_p64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[CMP_I:%.*]] = icmp eq <2 x i64> %a, %b
// CHECK: [[SEXT_I:%.*]] = sext <2 x i1> [[CMP_I]] to <2 x i64>
// CHECK: ret <2 x i64> [[SEXT_I]]
@ -22,7 +22,7 @@ uint64x2_t test_vceqq_p64(poly64x2_t a, poly64x2_t b) {
return vceqq_p64(a, b);
}
// CHECK-LABEL: define <1 x i64> @test_vtst_p64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK-LABEL: define dso_local <1 x i64> @test_vtst_p64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK: [[TMP4:%.*]] = and <1 x i64> %a, %b
// CHECK: [[TMP5:%.*]] = icmp ne <1 x i64> [[TMP4]], zeroinitializer
// CHECK: [[VTST_I:%.*]] = sext <1 x i1> [[TMP5]] to <1 x i64>
@ -31,7 +31,7 @@ uint64x1_t test_vtst_p64(poly64x1_t a, poly64x1_t b) {
return vtst_p64(a, b);
}
// CHECK-LABEL: define <2 x i64> @test_vtstq_p64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK-LABEL: define dso_local <2 x i64> @test_vtstq_p64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[TMP4:%.*]] = and <2 x i64> %a, %b
// CHECK: [[TMP5:%.*]] = icmp ne <2 x i64> [[TMP4]], zeroinitializer
// CHECK: [[VTST_I:%.*]] = sext <2 x i1> [[TMP5]] to <2 x i64>
@ -40,7 +40,7 @@ uint64x2_t test_vtstq_p64(poly64x2_t a, poly64x2_t b) {
return vtstq_p64(a, b);
}
// CHECK-LABEL: define <1 x i64> @test_vbsl_p64(<1 x i64> %a, <1 x i64> %b, <1 x i64> %c) #0 {
// CHECK-LABEL: define dso_local <1 x i64> @test_vbsl_p64(<1 x i64> %a, <1 x i64> %b, <1 x i64> %c) #0 {
// CHECK: [[VBSL3_I:%.*]] = and <1 x i64> %a, %b
// CHECK: [[TMP3:%.*]] = xor <1 x i64> %a, <i64 -1>
// CHECK: [[VBSL4_I:%.*]] = and <1 x i64> [[TMP3]], %c
@ -50,7 +50,7 @@ poly64x1_t test_vbsl_p64(poly64x1_t a, poly64x1_t b, poly64x1_t c) {
return vbsl_p64(a, b, c);
}
// CHECK-LABEL: define <2 x i64> @test_vbslq_p64(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c) #1 {
// CHECK-LABEL: define dso_local <2 x i64> @test_vbslq_p64(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c) #1 {
// CHECK: [[VBSL3_I:%.*]] = and <2 x i64> %a, %b
// CHECK: [[TMP3:%.*]] = xor <2 x i64> %a, <i64 -1, i64 -1>
// CHECK: [[VBSL4_I:%.*]] = and <2 x i64> [[TMP3]], %c
@ -60,35 +60,35 @@ poly64x2_t test_vbslq_p64(poly64x2_t a, poly64x2_t b, poly64x2_t c) {
return vbslq_p64(a, b, c);
}
// CHECK-LABEL: define i64 @test_vget_lane_p64(<1 x i64> %v) #0 {
// CHECK-LABEL: define dso_local i64 @test_vget_lane_p64(<1 x i64> %v) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <1 x i64> %v, i32 0
// CHECK: ret i64 [[VGET_LANE]]
poly64_t test_vget_lane_p64(poly64x1_t v) {
return vget_lane_p64(v, 0);
}
// CHECK-LABEL: define i64 @test_vgetq_lane_p64(<2 x i64> %v) #1 {
// CHECK-LABEL: define dso_local i64 @test_vgetq_lane_p64(<2 x i64> %v) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x i64> %v, i32 1
// CHECK: ret i64 [[VGETQ_LANE]]
poly64_t test_vgetq_lane_p64(poly64x2_t v) {
return vgetq_lane_p64(v, 1);
}
// CHECK-LABEL: define <1 x i64> @test_vset_lane_p64(i64 %a, <1 x i64> %v) #0 {
// CHECK-LABEL: define dso_local <1 x i64> @test_vset_lane_p64(i64 %a, <1 x i64> %v) #0 {
// CHECK: [[VSET_LANE:%.*]] = insertelement <1 x i64> %v, i64 %a, i32 0
// CHECK: ret <1 x i64> [[VSET_LANE]]
poly64x1_t test_vset_lane_p64(poly64_t a, poly64x1_t v) {
return vset_lane_p64(a, v, 0);
}
// CHECK-LABEL: define <2 x i64> @test_vsetq_lane_p64(i64 %a, <2 x i64> %v) #1 {
// CHECK-LABEL: define dso_local <2 x i64> @test_vsetq_lane_p64(i64 %a, <2 x i64> %v) #1 {
// CHECK: [[VSET_LANE:%.*]] = insertelement <2 x i64> %v, i64 %a, i32 1
// CHECK: ret <2 x i64> [[VSET_LANE]]
poly64x2_t test_vsetq_lane_p64(poly64_t a, poly64x2_t v) {
return vsetq_lane_p64(a, v, 1);
}
// CHECK-LABEL: define <1 x i64> @test_vcopy_lane_p64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK-LABEL: define dso_local <1 x i64> @test_vcopy_lane_p64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <1 x i64> %b, i32 0
// CHECK: [[VSET_LANE:%.*]] = insertelement <1 x i64> %a, i64 [[VGET_LANE]], i32 0
// CHECK: ret <1 x i64> [[VSET_LANE]]
@ -97,7 +97,7 @@ poly64x1_t test_vcopy_lane_p64(poly64x1_t a, poly64x1_t b) {
}
// CHECK-LABEL: define <2 x i64> @test_vcopyq_lane_p64(<2 x i64> %a, <1 x i64> %b) #1 {
// CHECK-LABEL: define dso_local <2 x i64> @test_vcopyq_lane_p64(<2 x i64> %a, <1 x i64> %b) #1 {
// CHECK: [[VGET_LANE:%.*]] = extractelement <1 x i64> %b, i32 0
// CHECK: [[VSET_LANE:%.*]] = insertelement <2 x i64> %a, i64 [[VGET_LANE]], i32 1
// CHECK: ret <2 x i64> [[VSET_LANE]]
@ -105,7 +105,7 @@ poly64x2_t test_vcopyq_lane_p64(poly64x2_t a, poly64x1_t b) {
return vcopyq_lane_p64(a, 1, b, 0);
}
// CHECK-LABEL: define <2 x i64> @test_vcopyq_laneq_p64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK-LABEL: define dso_local <2 x i64> @test_vcopyq_laneq_p64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[VGETQ_LANE:%.*]] = extractelement <2 x i64> %b, i32 1
// CHECK: [[VSET_LANE:%.*]] = insertelement <2 x i64> %a, i64 [[VGETQ_LANE]], i32 1
// CHECK: ret <2 x i64> [[VSET_LANE]]
@ -113,20 +113,20 @@ poly64x2_t test_vcopyq_laneq_p64(poly64x2_t a, poly64x2_t b) {
return vcopyq_laneq_p64(a, 1, b, 1);
}
// CHECK-LABEL: define <1 x i64> @test_vcreate_p64(i64 %a) #0 {
// CHECK-LABEL: define dso_local <1 x i64> @test_vcreate_p64(i64 %a) #0 {
// CHECK: [[TMP0:%.*]] = bitcast i64 %a to <1 x i64>
// CHECK: ret <1 x i64> [[TMP0]]
poly64x1_t test_vcreate_p64(uint64_t a) {
return vcreate_p64(a);
}
// CHECK-LABEL: define <1 x i64> @test_vdup_n_p64(i64 %a) #0 {
// CHECK-LABEL: define dso_local <1 x i64> @test_vdup_n_p64(i64 %a) #0 {
// CHECK: [[VECINIT_I:%.*]] = insertelement <1 x i64> undef, i64 %a, i32 0
// CHECK: ret <1 x i64> [[VECINIT_I]]
poly64x1_t test_vdup_n_p64(poly64_t a) {
return vdup_n_p64(a);
}
// CHECK-LABEL: define <2 x i64> @test_vdupq_n_p64(i64 %a) #1 {
// CHECK-LABEL: define dso_local <2 x i64> @test_vdupq_n_p64(i64 %a) #1 {
// CHECK: [[VECINIT_I:%.*]] = insertelement <2 x i64> undef, i64 %a, i32 0
// CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x i64> [[VECINIT_I]], i64 %a, i32 1
// CHECK: ret <2 x i64> [[VECINIT1_I]]
@ -134,14 +134,14 @@ poly64x2_t test_vdupq_n_p64(poly64_t a) {
return vdupq_n_p64(a);
}
// CHECK-LABEL: define <1 x i64> @test_vmov_n_p64(i64 %a) #0 {
// CHECK-LABEL: define dso_local <1 x i64> @test_vmov_n_p64(i64 %a) #0 {
// CHECK: [[VECINIT_I:%.*]] = insertelement <1 x i64> undef, i64 %a, i32 0
// CHECK: ret <1 x i64> [[VECINIT_I]]
poly64x1_t test_vmov_n_p64(poly64_t a) {
return vmov_n_p64(a);
}
// CHECK-LABEL: define <2 x i64> @test_vmovq_n_p64(i64 %a) #1 {
// CHECK-LABEL: define dso_local <2 x i64> @test_vmovq_n_p64(i64 %a) #1 {
// CHECK: [[VECINIT_I:%.*]] = insertelement <2 x i64> undef, i64 %a, i32 0
// CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x i64> [[VECINIT_I]], i64 %a, i32 1
// CHECK: ret <2 x i64> [[VECINIT1_I]]
@ -149,35 +149,35 @@ poly64x2_t test_vmovq_n_p64(poly64_t a) {
return vmovq_n_p64(a);
}
// CHECK-LABEL: define <1 x i64> @test_vdup_lane_p64(<1 x i64> %vec) #0 {
// CHECK-LABEL: define dso_local <1 x i64> @test_vdup_lane_p64(<1 x i64> %vec) #0 {
// CHECK: [[SHUFFLE:%.*]] = shufflevector <1 x i64> %vec, <1 x i64> %vec, <1 x i32> zeroinitializer
// CHECK: ret <1 x i64> [[SHUFFLE]]
poly64x1_t test_vdup_lane_p64(poly64x1_t vec) {
return vdup_lane_p64(vec, 0);
}
// CHECK-LABEL: define <2 x i64> @test_vdupq_lane_p64(<1 x i64> %vec) #1 {
// CHECK-LABEL: define dso_local <2 x i64> @test_vdupq_lane_p64(<1 x i64> %vec) #1 {
// CHECK: [[SHUFFLE:%.*]] = shufflevector <1 x i64> %vec, <1 x i64> %vec, <2 x i32> zeroinitializer
// CHECK: ret <2 x i64> [[SHUFFLE]]
poly64x2_t test_vdupq_lane_p64(poly64x1_t vec) {
return vdupq_lane_p64(vec, 0);
}
// CHECK-LABEL: define <2 x i64> @test_vdupq_laneq_p64(<2 x i64> %vec) #1 {
// CHECK-LABEL: define dso_local <2 x i64> @test_vdupq_laneq_p64(<2 x i64> %vec) #1 {
// CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i64> %vec, <2 x i64> %vec, <2 x i32> <i32 1, i32 1>
// CHECK: ret <2 x i64> [[SHUFFLE]]
poly64x2_t test_vdupq_laneq_p64(poly64x2_t vec) {
return vdupq_laneq_p64(vec, 1);
}
// CHECK-LABEL: define <2 x i64> @test_vcombine_p64(<1 x i64> %low, <1 x i64> %high) #1 {
// CHECK-LABEL: define dso_local <2 x i64> @test_vcombine_p64(<1 x i64> %low, <1 x i64> %high) #1 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <1 x i64> %low, <1 x i64> %high, <2 x i32> <i32 0, i32 1>
// CHECK: ret <2 x i64> [[SHUFFLE_I]]
poly64x2_t test_vcombine_p64(poly64x1_t low, poly64x1_t high) {
return vcombine_p64(low, high);
}
// CHECK-LABEL: define <1 x i64> @test_vld1_p64(i64* %ptr) #0 {
// CHECK-LABEL: define dso_local <1 x i64> @test_vld1_p64(i64* %ptr) #0 {
// CHECK: [[TMP0:%.*]] = bitcast i64* %ptr to i8*
// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to <1 x i64>*
// CHECK: [[TMP2:%.*]] = load <1 x i64>, <1 x i64>* [[TMP1]]
@ -186,7 +186,7 @@ poly64x1_t test_vld1_p64(poly64_t const * ptr) {
return vld1_p64(ptr);
}
// CHECK-LABEL: define <2 x i64> @test_vld1q_p64(i64* %ptr) #1 {
// CHECK-LABEL: define dso_local <2 x i64> @test_vld1q_p64(i64* %ptr) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i64* %ptr to i8*
// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to <2 x i64>*
// CHECK: [[TMP2:%.*]] = load <2 x i64>, <2 x i64>* [[TMP1]]
@ -195,7 +195,7 @@ poly64x2_t test_vld1q_p64(poly64_t const * ptr) {
return vld1q_p64(ptr);
}
// CHECK-LABEL: define void @test_vst1_p64(i64* %ptr, <1 x i64> %val) #0 {
// CHECK-LABEL: define dso_local void @test_vst1_p64(i64* %ptr, <1 x i64> %val) #0 {
// CHECK: [[TMP0:%.*]] = bitcast i64* %ptr to i8*
// CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %val to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast i8* [[TMP0]] to <1 x i64>*
@ -206,7 +206,7 @@ void test_vst1_p64(poly64_t * ptr, poly64x1_t val) {
return vst1_p64(ptr, val);
}
// CHECK-LABEL: define void @test_vst1q_p64(i64* %ptr, <2 x i64> %val) #1 {
// CHECK-LABEL: define dso_local void @test_vst1q_p64(i64* %ptr, <2 x i64> %val) #1 {
// CHECK: [[TMP0:%.*]] = bitcast i64* %ptr to i8*
// CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %val to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast i8* [[TMP0]] to <2 x i64>*
@ -217,7 +217,7 @@ void test_vst1q_p64(poly64_t * ptr, poly64x2_t val) {
return vst1q_p64(ptr, val);
}
// CHECK-LABEL: define %struct.poly64x1x2_t @test_vld2_p64(i64* %ptr) #2 {
// CHECK-LABEL: define dso_local %struct.poly64x1x2_t @test_vld2_p64(i64* %ptr) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x1x2_t, align 8
// CHECK: [[__RET:%.*]] = alloca %struct.poly64x1x2_t, align 8
// CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x1x2_t* [[__RET]] to i8*
@ -235,7 +235,7 @@ poly64x1x2_t test_vld2_p64(poly64_t const * ptr) {
return vld2_p64(ptr);
}
// CHECK-LABEL: define %struct.poly64x2x2_t @test_vld2q_p64(i64* %ptr) #2 {
// CHECK-LABEL: define dso_local %struct.poly64x2x2_t @test_vld2q_p64(i64* %ptr) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x2x2_t, align 16
// CHECK: [[__RET:%.*]] = alloca %struct.poly64x2x2_t, align 16
// CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x2x2_t* [[__RET]] to i8*
@ -253,7 +253,7 @@ poly64x2x2_t test_vld2q_p64(poly64_t const * ptr) {
return vld2q_p64(ptr);
}
// CHECK-LABEL: define %struct.poly64x1x3_t @test_vld3_p64(i64* %ptr) #2 {
// CHECK-LABEL: define dso_local %struct.poly64x1x3_t @test_vld3_p64(i64* %ptr) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x1x3_t, align 8
// CHECK: [[__RET:%.*]] = alloca %struct.poly64x1x3_t, align 8
// CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x1x3_t* [[__RET]] to i8*
@ -271,7 +271,7 @@ poly64x1x3_t test_vld3_p64(poly64_t const * ptr) {
return vld3_p64(ptr);
}
// CHECK-LABEL: define %struct.poly64x2x3_t @test_vld3q_p64(i64* %ptr) #2 {
// CHECK-LABEL: define dso_local %struct.poly64x2x3_t @test_vld3q_p64(i64* %ptr) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x2x3_t, align 16
// CHECK: [[__RET:%.*]] = alloca %struct.poly64x2x3_t, align 16
// CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x2x3_t* [[__RET]] to i8*
@ -289,7 +289,7 @@ poly64x2x3_t test_vld3q_p64(poly64_t const * ptr) {
return vld3q_p64(ptr);
}
// CHECK-LABEL: define %struct.poly64x1x4_t @test_vld4_p64(i64* %ptr) #2 {
// CHECK-LABEL: define dso_local %struct.poly64x1x4_t @test_vld4_p64(i64* %ptr) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x1x4_t, align 8
// CHECK: [[__RET:%.*]] = alloca %struct.poly64x1x4_t, align 8
// CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x1x4_t* [[__RET]] to i8*
@ -307,7 +307,7 @@ poly64x1x4_t test_vld4_p64(poly64_t const * ptr) {
return vld4_p64(ptr);
}
// CHECK-LABEL: define %struct.poly64x2x4_t @test_vld4q_p64(i64* %ptr) #2 {
// CHECK-LABEL: define dso_local %struct.poly64x2x4_t @test_vld4q_p64(i64* %ptr) #2 {
// CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x2x4_t, align 16
// CHECK: [[__RET:%.*]] = alloca %struct.poly64x2x4_t, align 16
// CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x2x4_t* [[__RET]] to i8*
@ -325,7 +325,7 @@ poly64x2x4_t test_vld4q_p64(poly64_t const * ptr) {
return vld4q_p64(ptr);
}
// CHECK-LABEL: define void @test_vst2_p64(i64* %ptr, [2 x <1 x i64>] %val.coerce) #2 {
// CHECK-LABEL: define dso_local void @test_vst2_p64(i64* %ptr, [2 x <1 x i64>] %val.coerce) #2 {
// CHECK: [[VAL:%.*]] = alloca %struct.poly64x1x2_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.poly64x1x2_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x1x2_t, %struct.poly64x1x2_t* [[VAL]], i32 0, i32 0
@ -350,7 +350,7 @@ void test_vst2_p64(poly64_t * ptr, poly64x1x2_t val) {
return vst2_p64(ptr, val);
}
// CHECK-LABEL: define void @test_vst2q_p64(i64* %ptr, [2 x <2 x i64>] %val.coerce) #2 {
// CHECK-LABEL: define dso_local void @test_vst2q_p64(i64* %ptr, [2 x <2 x i64>] %val.coerce) #2 {
// CHECK: [[VAL:%.*]] = alloca %struct.poly64x2x2_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.poly64x2x2_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x2x2_t, %struct.poly64x2x2_t* [[VAL]], i32 0, i32 0
@ -375,7 +375,7 @@ void test_vst2q_p64(poly64_t * ptr, poly64x2x2_t val) {
return vst2q_p64(ptr, val);
}
// CHECK-LABEL: define void @test_vst3_p64(i64* %ptr, [3 x <1 x i64>] %val.coerce) #2 {
// CHECK-LABEL: define dso_local void @test_vst3_p64(i64* %ptr, [3 x <1 x i64>] %val.coerce) #2 {
// CHECK: [[VAL:%.*]] = alloca %struct.poly64x1x3_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.poly64x1x3_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x1x3_t, %struct.poly64x1x3_t* [[VAL]], i32 0, i32 0
@ -405,7 +405,7 @@ void test_vst3_p64(poly64_t * ptr, poly64x1x3_t val) {
return vst3_p64(ptr, val);
}
// CHECK-LABEL: define void @test_vst3q_p64(i64* %ptr, [3 x <2 x i64>] %val.coerce) #2 {
// CHECK-LABEL: define dso_local void @test_vst3q_p64(i64* %ptr, [3 x <2 x i64>] %val.coerce) #2 {
// CHECK: [[VAL:%.*]] = alloca %struct.poly64x2x3_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.poly64x2x3_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x2x3_t, %struct.poly64x2x3_t* [[VAL]], i32 0, i32 0
@ -435,7 +435,7 @@ void test_vst3q_p64(poly64_t * ptr, poly64x2x3_t val) {
return vst3q_p64(ptr, val);
}
// CHECK-LABEL: define void @test_vst4_p64(i64* %ptr, [4 x <1 x i64>] %val.coerce) #2 {
// CHECK-LABEL: define dso_local void @test_vst4_p64(i64* %ptr, [4 x <1 x i64>] %val.coerce) #2 {
// CHECK: [[VAL:%.*]] = alloca %struct.poly64x1x4_t, align 8
// CHECK: [[__S1:%.*]] = alloca %struct.poly64x1x4_t, align 8
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x1x4_t, %struct.poly64x1x4_t* [[VAL]], i32 0, i32 0
@ -470,7 +470,7 @@ void test_vst4_p64(poly64_t * ptr, poly64x1x4_t val) {
return vst4_p64(ptr, val);
}
// CHECK-LABEL: define void @test_vst4q_p64(i64* %ptr, [4 x <2 x i64>] %val.coerce) #2 {
// CHECK-LABEL: define dso_local void @test_vst4q_p64(i64* %ptr, [4 x <2 x i64>] %val.coerce) #2 {
// CHECK: [[VAL:%.*]] = alloca %struct.poly64x2x4_t, align 16
// CHECK: [[__S1:%.*]] = alloca %struct.poly64x2x4_t, align 16
// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x2x4_t, %struct.poly64x2x4_t* [[VAL]], i32 0, i32 0
@ -505,7 +505,7 @@ void test_vst4q_p64(poly64_t * ptr, poly64x2x4_t val) {
return vst4q_p64(ptr, val);
}
// CHECK-LABEL: define <1 x i64> @test_vext_p64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK-LABEL: define dso_local <1 x i64> @test_vext_p64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast <1 x i64> %a to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>
@ -517,7 +517,7 @@ poly64x1_t test_vext_p64(poly64x1_t a, poly64x1_t b) {
}
// CHECK-LABEL: define <2 x i64> @test_vextq_p64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK-LABEL: define dso_local <2 x i64> @test_vextq_p64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <2 x i64> %a to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8>
// CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>
@ -528,49 +528,49 @@ poly64x2_t test_vextq_p64(poly64x2_t a, poly64x2_t b) {
return vextq_p64(a, b, 1);
}
// CHECK-LABEL: define <2 x i64> @test_vzip1q_p64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK-LABEL: define dso_local <2 x i64> @test_vzip1q_p64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2>
// CHECK: ret <2 x i64> [[SHUFFLE_I]]
poly64x2_t test_vzip1q_p64(poly64x2_t a, poly64x2_t b) {
return vzip1q_p64(a, b);
}
// CHECK-LABEL: define <2 x i64> @test_vzip2q_p64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK-LABEL: define dso_local <2 x i64> @test_vzip2q_p64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3>
// CHECK: ret <2 x i64> [[SHUFFLE_I]]
poly64x2_t test_vzip2q_p64(poly64x2_t a, poly64x2_t b) {
return vzip2q_u64(a, b);
}
// CHECK-LABEL: define <2 x i64> @test_vuzp1q_p64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK-LABEL: define dso_local <2 x i64> @test_vuzp1q_p64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2>
// CHECK: ret <2 x i64> [[SHUFFLE_I]]
poly64x2_t test_vuzp1q_p64(poly64x2_t a, poly64x2_t b) {
return vuzp1q_p64(a, b);
}
// CHECK-LABEL: define <2 x i64> @test_vuzp2q_p64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK-LABEL: define dso_local <2 x i64> @test_vuzp2q_p64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3>
// CHECK: ret <2 x i64> [[SHUFFLE_I]]
poly64x2_t test_vuzp2q_p64(poly64x2_t a, poly64x2_t b) {
return vuzp2q_u64(a, b);
}
// CHECK-LABEL: define <2 x i64> @test_vtrn1q_p64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK-LABEL: define dso_local <2 x i64> @test_vtrn1q_p64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2>
// CHECK: ret <2 x i64> [[SHUFFLE_I]]
poly64x2_t test_vtrn1q_p64(poly64x2_t a, poly64x2_t b) {
return vtrn1q_p64(a, b);
}
// CHECK-LABEL: define <2 x i64> @test_vtrn2q_p64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK-LABEL: define dso_local <2 x i64> @test_vtrn2q_p64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[SHUFFLE_I:%.*]] = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3>
// CHECK: ret <2 x i64> [[SHUFFLE_I]]
poly64x2_t test_vtrn2q_p64(poly64x2_t a, poly64x2_t b) {
return vtrn2q_u64(a, b);
}
// CHECK-LABEL: define <1 x i64> @test_vsri_n_p64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK-LABEL: define dso_local <1 x i64> @test_vsri_n_p64(<1 x i64> %a, <1 x i64> %b) #0 {
// CHECK: [[TMP0:%.*]] = bitcast <1 x i64> %a to <8 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8>
// CHECK: [[VSRI_N:%.*]] = bitcast <8 x i8> [[TMP0]] to <1 x i64>
@ -581,7 +581,7 @@ poly64x1_t test_vsri_n_p64(poly64x1_t a, poly64x1_t b) {
return vsri_n_p64(a, b, 33);
}
// CHECK-LABEL: define <2 x i64> @test_vsriq_n_p64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK-LABEL: define dso_local <2 x i64> @test_vsriq_n_p64(<2 x i64> %a, <2 x i64> %b) #1 {
// CHECK: [[TMP0:%.*]] = bitcast <2 x i64> %a to <16 x i8>
// CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8>
// CHECK: [[VSRI_N:%.*]] = bitcast <16 x i8> [[TMP0]] to <2 x i64>

2
clang/test/CodeGen/aarch64-tme.cpp
View File

@ -36,7 +36,7 @@ void test_tme_funcs() {
#ifdef __ARM_FEATURE_TME
extern "C" void arm_feature_tme_defined() {}
#endif
// CHECK: define void @arm_feature_tme_defined()
// CHECK: define dso_local void @arm_feature_tme_defined()
// CHECK: attributes #1 = { nounwind }

50
clang/test/CodeGen/aarch64-varargs.c
View File

@ -9,7 +9,7 @@
va_list the_list;
int simple_int(void) {
// CHECK-LABEL: define i32 @simple_int
// CHECK-LABEL: define dso_local i32 @simple_int
return va_arg(the_list, int);
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
@ -45,7 +45,7 @@ int simple_int(void) {
}
__int128 aligned_int(void) {
// CHECK-LABEL: define i128 @aligned_int
// CHECK-LABEL: define dso_local i128 @aligned_int
return va_arg(the_list, __int128);
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
@ -87,7 +87,7 @@ struct bigstruct {
};
struct bigstruct simple_indirect(void) {
// CHECK-LABEL: define void @simple_indirect
// CHECK-LABEL: define dso_local void @simple_indirect
return va_arg(the_list, struct bigstruct);
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
@ -125,7 +125,7 @@ struct aligned_bigstruct {
};
struct aligned_bigstruct simple_aligned_indirect(void) {
// CHECK-LABEL: define void @simple_aligned_indirect
// CHECK-LABEL: define dso_local void @simple_aligned_indirect
return va_arg(the_list, struct aligned_bigstruct);
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
@ -156,7 +156,7 @@ struct aligned_bigstruct simple_aligned_indirect(void) {
}
double simple_double(void) {
// CHECK-LABEL: define double @simple_double
// CHECK-LABEL: define dso_local double @simple_double
return va_arg(the_list, double);
// CHECK: [[VR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 4)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[VR_OFFS]], 0
@ -194,7 +194,7 @@ struct hfa {
};
struct hfa simple_hfa(void) {
// CHECK-LABEL: define %struct.hfa @simple_hfa
// CHECK-LABEL: define dso_local %struct.hfa @simple_hfa
return va_arg(the_list, struct hfa);
// CHECK: [[VR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 4)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[VR_OFFS]], 0
@ -241,7 +241,7 @@ struct hfa simple_hfa(void) {
typedef int underaligned_int __attribute__((packed,aligned(2)));
underaligned_int underaligned_int_test() {
// CHECK-LABEL: define i32 @underaligned_int_test()
// CHECK-LABEL: define dso_local i32 @underaligned_int_test()
return va_arg(the_list, underaligned_int);
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
@ -278,7 +278,7 @@ underaligned_int underaligned_int_test() {
typedef int overaligned_int __attribute__((aligned(32)));
overaligned_int overaligned_int_test() {
// CHECK-LABEL: define i32 @overaligned_int_test()
// CHECK-LABEL: define dso_local i32 @overaligned_int_test()
return va_arg(the_list, overaligned_int);
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
@ -315,7 +315,7 @@ overaligned_int overaligned_int_test() {
typedef long long underaligned_long_long __attribute__((packed,aligned(2)));
underaligned_long_long underaligned_long_long_test() {
// CHECK-LABEL: define i64 @underaligned_long_long_test()
// CHECK-LABEL: define dso_local i64 @underaligned_long_long_test()
return va_arg(the_list, underaligned_long_long);
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
@ -348,7 +348,7 @@ underaligned_long_long underaligned_long_long_test() {
typedef long long overaligned_long_long __attribute__((aligned(32)));
overaligned_long_long overaligned_long_long_test() {
// CHECK-LABEL: define i64 @overaligned_long_long_test()
// CHECK-LABEL: define dso_local i64 @overaligned_long_long_test()
return va_arg(the_list, overaligned_long_long);
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
@ -381,7 +381,7 @@ overaligned_long_long overaligned_long_long_test() {
typedef __int128 underaligned_int128 __attribute__((packed,aligned(2)));
underaligned_int128 underaligned_int128_test() {
// CHECK-LABEL: define i128 @underaligned_int128_test()
// CHECK-LABEL: define dso_local i128 @underaligned_int128_test()
return va_arg(the_list, underaligned_int128);
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
@ -420,7 +420,7 @@ underaligned_int128 underaligned_int128_test() {
typedef __int128 overaligned_int128 __attribute__((aligned(32)));
overaligned_int128 overaligned_int128_test() {
// CHECK-LABEL: define i128 @overaligned_int128_test()
// CHECK-LABEL: define dso_local i128 @overaligned_int128_test()
return va_arg(the_list, overaligned_int128);
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
@ -473,7 +473,7 @@ typedef struct __attribute__((packed,aligned(2))) {
int val;
} underaligned_int_struct;
underaligned_int_struct underaligned_int_struct_test() {
// CHECK-LABEL: define i64 @underaligned_int_struct_test()
// CHECK-LABEL: define dso_local i64 @underaligned_int_struct_test()
return va_arg(the_list, underaligned_int_struct);
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
@ -506,7 +506,7 @@ typedef struct __attribute__((aligned(16))) {
int val;
} overaligned_int_struct;
overaligned_int_struct overaligned_int_struct_test() {
// CHECK-LABEL: define i128 @overaligned_int_struct_test()
// CHECK-LABEL: define dso_local i128 @overaligned_int_struct_test()
return va_arg(the_list, overaligned_int_struct);
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
@ -539,7 +539,7 @@ typedef struct __attribute__((packed,aligned(2))) {
long long val;
} underaligned_long_long_struct;
underaligned_long_long_struct underaligned_long_long_struct_test() {
// CHECK-LABEL: define i64 @underaligned_long_long_struct_test()
// CHECK-LABEL: define dso_local i64 @underaligned_long_long_struct_test()
return va_arg(the_list, underaligned_long_long_struct);
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
@ -572,7 +572,7 @@ typedef struct __attribute__((aligned(16))) {
long long val;
} overaligned_long_long_struct;
overaligned_long_long_struct overaligned_long_long_struct_test() {
// CHECK-LABEL: define i128 @overaligned_long_long_struct_test()
// CHECK-LABEL: define dso_local i128 @overaligned_long_long_struct_test()
return va_arg(the_list, overaligned_long_long_struct);
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
@ -605,7 +605,7 @@ typedef struct __attribute__((packed,aligned(2))) {
__int128 val;
} underaligned_int128_struct;
underaligned_int128_struct underaligned_int128_struct_test() {
// CHECK-LABEL: define [2 x i64] @underaligned_int128_struct_test()
// CHECK-LABEL: define dso_local [2 x i64] @underaligned_int128_struct_test()
return va_arg(the_list, underaligned_int128_struct);
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
@ -639,7 +639,7 @@ typedef struct __attribute__((aligned(32))) {
__int128 val;
} overaligned_int128_struct;
overaligned_int128_struct overaligned_int128_struct_test() {
// CHECK-LABEL: define void @overaligned_int128_struct_test(%struct.overaligned_int128_struct* noalias sret %agg.result)
// CHECK-LABEL: define dso_local void @overaligned_int128_struct_test(%struct.overaligned_int128_struct* noalias sret %agg.result)
return va_arg(the_list, overaligned_int128_struct);
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
@ -675,7 +675,7 @@ typedef struct {
int val __attribute__((packed,aligned(2)));
} underaligned_int_struct_member;
underaligned_int_struct_member underaligned_int_struct_member_test() {
// CHECK-LABEL: define i64 @underaligned_int_struct_member_test()
// CHECK-LABEL: define dso_local i64 @underaligned_int_struct_member_test()
return va_arg(the_list, underaligned_int_struct_member);
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
@ -708,7 +708,7 @@ typedef struct {
int val __attribute__((aligned(16)));
} overaligned_int_struct_member;
overaligned_int_struct_member overaligned_int_struct_member_test() {
// CHECK-LABEL: define i128 @overaligned_int_struct_member_test()
// CHECK-LABEL: define dso_local i128 @overaligned_int_struct_member_test()
return va_arg(the_list, overaligned_int_struct_member);
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
@ -747,7 +747,7 @@ typedef struct {
long long val __attribute__((packed,aligned(2)));
} underaligned_long_long_struct_member;
underaligned_long_long_struct_member underaligned_long_long_struct_member_test() {
// CHECK-LABEL: define i64 @underaligned_long_long_struct_member_test()
// CHECK-LABEL: define dso_local i64 @underaligned_long_long_struct_member_test()
return va_arg(the_list, underaligned_long_long_struct_member);
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
@ -780,7 +780,7 @@ typedef struct {
long long val __attribute__((aligned(16)));
} overaligned_long_long_struct_member;
overaligned_long_long_struct_member overaligned_long_long_struct_member_test() {
// CHECK-LABEL: define i128 @overaligned_long_long_struct_member_test()
// CHECK-LABEL: define dso_local i128 @overaligned_long_long_struct_member_test()
return va_arg(the_list, overaligned_long_long_struct_member);
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
@ -819,7 +819,7 @@ typedef struct {
__int128 val __attribute__((packed,aligned(2)));
} underaligned_int128_struct_member;
underaligned_int128_struct_member underaligned_int128_struct_member_test() {
// CHECK-LABEL: define [2 x i64] @underaligned_int128_struct_member_test()
// CHECK-LABEL: define dso_local [2 x i64] @underaligned_int128_struct_member_test()
return va_arg(the_list, underaligned_int128_struct_member);
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
@ -853,7 +853,7 @@ typedef struct {
__int128 val __attribute__((aligned(32)));
} overaligned_int128_struct_member;
overaligned_int128_struct_member overaligned_int128_struct_member_test() {
// CHECK-LABEL: define void @overaligned_int128_struct_member_test(%struct.overaligned_int128_struct_member* noalias sret %agg.result)
// CHECK-LABEL: define dso_local void @overaligned_int128_struct_member_test(%struct.overaligned_int128_struct_member* noalias sret %agg.result)
return va_arg(the_list, overaligned_int128_struct_member);
// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load i32, i32* getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 3)
// CHECK: [[EARLY_ONSTACK:%[a-z_0-9]+]] = icmp sge i32 [[GR_OFFS]], 0
@ -883,7 +883,7 @@ overaligned_int128_struct_member overaligned_int128_struct_member_test() {
}
void check_start(int n, ...) {
// CHECK-LABEL: define void @check_start(i32 %n, ...)
// CHECK-LABEL: define dso_local void @check_start(i32 %n, ...)
va_list the_list;
va_start(the_list, n);

8
clang/test/CodeGen/aarch64-vpcs.c
View File

@ -4,8 +4,8 @@
void __attribute__((aarch64_vector_pcs)) f(int *); // expected-warning {{'aarch64_vector_pcs' calling convention is not supported for this target}}
// CHECKC: define void @g(
// CHECKCXX: define void @_Z1gPi(
// CHECKC: define dso_local void @g(
// CHECKCXX: define dso_local void @_Z1gPi(
void g(int *a) {
// CHECKC: call aarch64_vector_pcs void @f(
@ -17,7 +17,7 @@ void g(int *a) {
// CHECKCXX: declare aarch64_vector_pcs void @_Z1fPi
void __attribute__((aarch64_vector_pcs)) h(int *a){ // expected-warning {{'aarch64_vector_pcs' calling convention is not supported for this target}}
// CHECKC: define aarch64_vector_pcs void @h(
// CHECKCXX: define aarch64_vector_pcs void @_Z1hPi(
// CHECKC: define dso_local aarch64_vector_pcs void @h(
// CHECKCXX: define dso_local aarch64_vector_pcs void @_Z1hPi(
f(a);
}

14
clang/test/CodeGen/address-space.c
View File

@ -1,20 +1,20 @@
// RUN: %clang_cc1 -triple x86_64-apple-darwin -emit-llvm < %s | FileCheck -enable-var-scope -check-prefixes=CHECK,X86 %s
// RUN: %clang_cc1 -triple amdgcn -emit-llvm < %s | FileCheck -enable-var-scope -check-prefixes=CHECK,AMDGCN %s
// CHECK: @foo = common addrspace(1) global
// CHECK: @foo = common {{(dso_local )?}}addrspace(1) global
int foo __attribute__((address_space(1)));
// CHECK: @ban = common addrspace(1) global
// CHECK: @ban = common {{(dso_local )?}}addrspace(1) global
int ban[10] __attribute__((address_space(1)));
// CHECK: @a = common global
// CHECK: @a = common {{(dso_local )?}}global
int a __attribute__((address_space(0)));
// CHECK-LABEL: define i32 @test1()
// CHECK-LABEL: define {{(dso_local )?}}i32 @test1()
// CHECK: load i32, i32 addrspace(1)* @foo
int test1() { return foo; }
// CHECK-LABEL: define i32 @test2(i32 %i)
// CHECK-LABEL: define {{(dso_local )?}}i32 @test2(i32 %i)
// CHECK: load i32, i32 addrspace(1)*
// CHECK-NEXT: ret i32
int test2(int i) { return ban[i]; }
@ -22,7 +22,7 @@ int test2(int i) { return ban[i]; }
// Both A and B point into addrspace(2).
__attribute__((address_space(2))) int *A, *B;
// CHECK-LABEL: define void @test3()
// CHECK-LABEL: define {{(dso_local )?}}void @test3()
// X86: load i32 addrspace(2)*, i32 addrspace(2)** @B
// AMDGCN: load i32 addrspace(2)*, i32 addrspace(2)** addrspacecast (i32 addrspace(2)* addrspace(1)* @B to i32 addrspace(2)**)
// CHECK: load i32, i32 addrspace(2)*
@ -38,7 +38,7 @@ typedef struct {
float aData[1];
} MyStruct;
// CHECK-LABEL: define void @test4(
// CHECK-LABEL: define {{(dso_local )?}}void @test4(
// CHECK: call void @llvm.memcpy.p0i8.p2i8
// CHECK: call void @llvm.memcpy.p2i8.p0i8
void test4(MyStruct __attribute__((address_space(2))) *pPtr) {

30
clang/test/CodeGen/alias.c
View File

@ -5,10 +5,10 @@
// RUN: %clang_cc1 -triple aarch64-linux-gnu -emit-llvm -o - %s | FileCheck -check-prefix=CHECKGLOBALS %s
int g0;
// CHECKBASIC-DAG: @g0 = common global i32 0
// CHECKBASIC-DAG: @g0 = common dso_local global i32 0
// CHECKASM-DAG: .comm g0,4,4
__thread int TL_WITH_ALIAS;
// CHECKBASIC-DAG: @TL_WITH_ALIAS = thread_local global i32 0, align 4
// CHECKBASIC-DAG: @TL_WITH_ALIAS = dso_local thread_local global i32 0, align 4
// CHECKASM-DAG: .globl TL_WITH_ALIAS
// CHECKASM-DAG: .size TL_WITH_ALIAS, 4
static int bar1 = 42;
@ -18,24 +18,24 @@ static int bar1 = 42;
// PR24379: alias variable expected to have same size as aliasee even when types differ
const int wacom_usb_ids[] = {1, 1, 2, 3, 5, 8, 13, 0};
// CHECKBASIC-DAG: @wacom_usb_ids = constant [8 x i32] [i32 1, i32 1, i32 2, i32 3, i32 5, i32 8, i32 13, i32 0], align 4
// CHECKBASIC-DAG: @wacom_usb_ids = dso_local constant [8 x i32] [i32 1, i32 1, i32 2, i32 3, i32 5, i32 8, i32 13, i32 0], align 4
// CHECKASM-DAG: .globl wacom_usb_ids
// CHECKASM-DAG: .size wacom_usb_ids, 32
extern const int __mod_usb_device_table __attribute__ ((alias("wacom_usb_ids")));
// CHECKBASIC-DAG: @__mod_usb_device_table = alias i32, getelementptr inbounds ([8 x i32], [8 x i32]* @wacom_usb_ids, i32 0, i32 0)
// CHECKBASIC-DAG: @__mod_usb_device_table = dso_local alias i32, getelementptr inbounds ([8 x i32], [8 x i32]* @wacom_usb_ids, i32 0, i32 0)
// CHECKASM-DAG: .globl __mod_usb_device_table
// CHECKASM-DAG: .set __mod_usb_device_table, wacom_usb_ids
// CHECKASM-NOT: .size __mod_usb_device_table
extern int g1;
extern int g1 __attribute((alias("g0")));
// CHECKBASIC-DAG: @g1 = alias i32, i32* @g0
// CHECKBASIC-DAG: @g1 = dso_local alias i32, i32* @g0
// CHECKASM-DAG: .globl g1
// CHECKASM-DAG: .set g1, g0
// CHECKASM-NOT: .size g1
extern __thread int __libc_errno __attribute__ ((alias ("TL_WITH_ALIAS")));
// CHECKBASIC-DAG: @__libc_errno = thread_local alias i32, i32* @TL_WITH_ALIAS
// CHECKBASIC-DAG: @__libc_errno = dso_local thread_local alias i32, i32* @TL_WITH_ALIAS
// CHECKASM-DAG: .globl __libc_errno
// CHECKASM-DAG: .set __libc_errno, TL_WITH_ALIAS
// CHECKASM-NOT: .size __libc_errno
@ -43,11 +43,11 @@ extern __thread int __libc_errno __attribute__ ((alias ("TL_WITH_ALIAS")));
void f0(void) { }
extern void f1(void);
extern void f1(void) __attribute((alias("f0")));
// CHECKBASIC-DAG: @f1 = alias void (), void ()* @f0
// CHECKBASIC-DAG: @test8_foo = weak alias void (...), bitcast (void ()* @test8_bar to void (...)*)
// CHECKBASIC-DAG: @test8_zed = alias void (...), bitcast (void ()* @test8_bar to void (...)*)
// CHECKBASIC-DAG: @test9_zed = alias void (), void ()* @test9_bar
// CHECKBASIC: define void @f0() [[NUW:#[0-9]+]] {
// CHECKBASIC-DAG: @f1 = dso_local alias void (), void ()* @f0
// CHECKBASIC-DAG: @test8_foo = weak dso_local alias void (...), bitcast (void ()* @test8_bar to void (...)*)
// CHECKBASIC-DAG: @test8_zed = dso_local alias void (...), bitcast (void ()* @test8_bar to void (...)*)
// CHECKBASIC-DAG: @test9_zed = dso_local alias void (), void ()* @test9_bar
// CHECKBASIC: define dso_local void @f0() [[NUW:#[0-9]+]] {
// Make sure that aliases cause referenced values to be emitted.
// PR3200
@ -66,15 +66,15 @@ static int inner(int a) { return 0; }
static int inner_weak(int a) { return 0; }
extern __typeof(inner) inner_a __attribute__((alias("inner")));
static __typeof(inner_weak) inner_weak_a __attribute__((weakref, alias("inner_weak")));
// CHECKCC: @inner_a = alias i32 (i32), i32 (i32)* @inner
// CHECKCC: @inner_a = dso_local alias i32 (i32), i32 (i32)* @inner
// CHECKCC: define internal arm_aapcs_vfpcc i32 @inner(i32 %a) [[NUW:#[0-9]+]] {
int outer(int a) { return inner(a); }
// CHECKCC: define arm_aapcs_vfpcc i32 @outer(i32 %a) [[NUW]] {
// CHECKCC: define dso_local arm_aapcs_vfpcc i32 @outer(i32 %a) [[NUW]] {
// CHECKCC: call arm_aapcs_vfpcc i32 @inner(i32 %{{.*}})
int outer_weak(int a) { return inner_weak_a(a); }
// CHECKCC: define arm_aapcs_vfpcc i32 @outer_weak(i32 %a) [[NUW]] {
// CHECKCC: define dso_local arm_aapcs_vfpcc i32 @outer_weak(i32 %a) [[NUW]] {
// CHECKCC: call arm_aapcs_vfpcc i32 @inner_weak(i32 %{{.*}})
// CHECKCC: define internal arm_aapcs_vfpcc i32 @inner_weak(i32 %a) [[NUW]] {
@ -101,6 +101,6 @@ void test11(void) {}
static void test11_foo(void) __attribute__((alias("test11")));
// Test that gnu_inline+alias work.
// CHECKGLOBALS: @test12_alias = alias void (), void ()* @test12
// CHECKGLOBALS: @test12_alias = dso_local alias void (), void ()* @test12
void test12(void) {}
inline void test12_alias(void) __attribute__((gnu_inline, alias("test12")));

4
clang/test/CodeGen/align-systemz.c
View File

@ -7,10 +7,10 @@ struct test {
};
char c;
// CHECK-DAG: @c = common global i8 0, align 2
// CHECK-DAG: @c = common dso_local global i8 0, align 2
struct test s;
// CHECK-DAG: @s = common global %struct.test zeroinitializer, align 2
// CHECK-DAG: @s = common dso_local global %struct.test zeroinitializer, align 2
extern char ec;
// CHECK-DAG: @ec = external global i8, align 2

2
clang/test/CodeGen/align_value.cpp
View File

@ -4,7 +4,7 @@ typedef double * __attribute__((align_value(64))) aligned_double;
void foo(aligned_double x, double * y __attribute__((align_value(32))),
double & z __attribute__((align_value(128)))) { };
// CHECK: define void @_Z3fooPdS_Rd(double* align 64 %x, double* align 32 %y, double* align 128 dereferenceable(8) %z)
// CHECK: define dso_local void @_Z3fooPdS_Rd(double* align 64 %x, double* align 32 %y, double* align 128 dereferenceable(8) %z)
struct ad_struct {
aligned_double a;

2
clang/test/CodeGen/alignment.c
View File

@ -7,7 +7,7 @@ union {int a[4]; __attribute((aligned(16))) float b[4];} b;
// CHECK: @b = {{.*}}zeroinitializer, align 16
long long int test5[1024];
// CHECK-DAG: @test5 = common global [1024 x i64] zeroinitializer, align 8
// CHECK-DAG: @test5 = common dso_local global [1024 x i64] zeroinitializer, align 8
// PR5279 - Reduced alignment on typedef.
typedef int myint __attribute__((aligned(1)));

12
clang/test/CodeGen/alloc-align-attr.c
View File

@ -4,7 +4,7 @@ __INT32_TYPE__*m1(__INT32_TYPE__ i) __attribute__((alloc_align(1)));
// Condition where parameter to m1 is not size_t.
__INT32_TYPE__ test1(__INT32_TYPE__ a) {
// CHECK: define i32 @test1
// CHECK: define dso_local i32 @test1
return *m1(a);
// CHECK: call i32* @m1(i32 [[PARAM1:%[^\)]+]])
// CHECK: [[ALIGNCAST1:%.+]] = zext i32 [[PARAM1]] to i64
@ -16,7 +16,7 @@ __INT32_TYPE__ test1(__INT32_TYPE__ a) {
}
// Condition where test2 param needs casting.
__INT32_TYPE__ test2(__SIZE_TYPE__ a) {
// CHECK: define i32 @test2
// CHECK: define dso_local i32 @test2
return *m1(a);
// CHECK: [[CONV2:%.+]] = trunc i64 %{{.+}} to i32
// CHECK: call i32* @m1(i32 [[CONV2]])
@ -31,7 +31,7 @@ __INT32_TYPE__ *m2(__SIZE_TYPE__ i) __attribute__((alloc_align(1)));
// test3 param needs casting, but 'm2' is correct.
__INT32_TYPE__ test3(__INT32_TYPE__ a) {
// CHECK: define i32 @test3
// CHECK: define dso_local i32 @test3
return *m2(a);
// CHECK: [[CONV3:%.+]] = sext i32 %{{.+}} to i64
// CHECK: call i32* @m2(i64 [[CONV3]])
@ -44,7 +44,7 @@ __INT32_TYPE__ test3(__INT32_TYPE__ a) {
// Every type matches, canonical example.
__INT32_TYPE__ test4(__SIZE_TYPE__ a) {
// CHECK: define i32 @test4
// CHECK: define dso_local i32 @test4
return *m2(a);
// CHECK: call i32* @m2(i64 [[PARAM4:%[^\)]+]])
// CHECK: [[MASK4:%.+]] = sub i64 [[PARAM4]], 1
@ -61,7 +61,7 @@ struct MultiArgs { __INT64_TYPE__ a, b;};
// Truncation to i64 is permissible, since alignments of greater than 2^64 are insane.
__INT32_TYPE__ *m3(struct Empty s, __int128_t i) __attribute__((alloc_align(2)));
__INT32_TYPE__ test5(__int128_t a) {
// CHECK: define i32 @test5
// CHECK: define dso_local i32 @test5
struct Empty e;
return *m3(e, a);
// CHECK: call i32* @m3(i64 %{{.*}}, i64 %{{.*}})
@ -75,7 +75,7 @@ __INT32_TYPE__ test5(__int128_t a) {
// Struct parameter takes up 2 parameters, 'i' takes up 2.
__INT32_TYPE__ *m4(struct MultiArgs s, __int128_t i) __attribute__((alloc_align(2)));
__INT32_TYPE__ test6(__int128_t a) {
// CHECK: define i32 @test6
// CHECK: define dso_local i32 @test6
struct MultiArgs e;
return *m4(e, a);
// CHECK: call i32* @m4(i64 %{{.*}}, i64 %{{.*}}, i64 %{{.*}})

12
clang/test/CodeGen/altivec.c
View File

@ -2,16 +2,16 @@
// Check initialization
vector int test0 = (vector int)(1); // CHECK: @test0 = global <4 x i32> <i32 1, i32 1, i32 1, i32 1>
vector float test1 = (vector float)(1.0); // CHECK: @test1 = global <4 x float> <float 1.000000e+{{0+}}, float 1.000000e+{{0+}}, float 1.000000e+{{0+}}, float 1.000000e+{{0+}}>
vector int test0 = (vector int)(1); // CHECK: @test0 = dso_local global <4 x i32> <i32 1, i32 1, i32 1, i32 1>
vector float test1 = (vector float)(1.0); // CHECK: @test1 = dso_local global <4 x float> <float 1.000000e+{{0+}}, float 1.000000e+{{0+}}, float 1.000000e+{{0+}}, float 1.000000e+{{0+}}>
// CHECK: @v1 = global <16 x i8> <i8 0, i8 0, i8 0, i8 1, i8 0, i8 0, i8 0, i8 2, i8 0, i8 0, i8 0, i8 3, i8 0, i8 0, i8 0, i8 4>
// CHECK: @v1 = dso_local global <16 x i8> <i8 0, i8 0, i8 0, i8 1, i8 0, i8 0, i8 0, i8 2, i8 0, i8 0, i8 0, i8 3, i8 0, i8 0, i8 0, i8 4>
vector char v1 = (vector char)((vector int)(1, 2, 3, 4));
// CHECK: @v2 = global <16 x i8> <i8 63, i8 -128, i8 0, i8 0, i8 64, i8 0, i8 0, i8 0, i8 64, i8 64, i8 0, i8 0, i8 64, i8 -128, i8 0, i8 0>
// CHECK: @v2 = dso_local global <16 x i8> <i8 63, i8 -128, i8 0, i8 0, i8 64, i8 0, i8 0, i8 0, i8 64, i8 64, i8 0, i8 0, i8 64, i8 -128, i8 0, i8 0>
vector char v2 = (vector char)((vector float)(1.0f, 2.0f, 3.0f, 4.0f));
// CHECK: @v3 = global <16 x i8> <i8 0, i8 0, i8 0, i8 97, i8 0, i8 0, i8 0, i8 98, i8 0, i8 0, i8 0, i8 99, i8 0, i8 0, i8 0, i8 100>
// CHECK: @v3 = dso_local global <16 x i8> <i8 0, i8 0, i8 0, i8 97, i8 0, i8 0, i8 0, i8 98, i8 0, i8 0, i8 0, i8 99, i8 0, i8 0, i8 0, i8 100>
vector char v3 = (vector char)((vector int)('a', 'b', 'c', 'd'));
// CHECK: @v4 = global <4 x i32> <i32 16909060, i32 0, i32 0, i32 0>
// CHECK: @v4 = dso_local global <4 x i32> <i32 16909060, i32 0, i32 0, i32 0>
vector int v4 = (vector char){1, 2, 3, 4};
void test2()

44
clang/test/CodeGen/arc/arguments.c
View File

@ -3,26 +3,26 @@
// Basic argument tests for ARC.
// CHECK: define void @f0(i32 inreg %i, i32 inreg %j, i64 inreg %k)
// CHECK: define dso_local void @f0(i32 inreg %i, i32 inreg %j, i64 inreg %k)
void f0(int i, long j, long long k) {}
typedef struct {
int aa;
int bb;
} s1;
// CHECK: define void @f1(i32 inreg %i.coerce0, i32 inreg %i.coerce1)
// CHECK: define dso_local void @f1(i32 inreg %i.coerce0, i32 inreg %i.coerce1)
void f1(s1 i) {}
typedef struct {
char aa; char bb; char cc; char dd;
} cs1;
// CHECK: define void @cf1(i32 inreg %i.coerce)
// CHECK: define dso_local void @cf1(i32 inreg %i.coerce)
void cf1(cs1 i) {}
typedef struct {
int cc;
} s2;
// CHECK: define void @f2(%struct.s2* noalias sret %agg.result)
// CHECK: define dso_local void @f2(%struct.s2* noalias sret %agg.result)
s2 f2() {
s2 foo;
return foo;
@ -32,19 +32,19 @@ typedef struct {
int cc;
int dd;
} s3;
// CHECK: define void @f3(%struct.s3* noalias sret %agg.result)
// CHECK: define dso_local void @f3(%struct.s3* noalias sret %agg.result)
s3 f3() {
s3 foo;
return foo;
}
// CHECK: define void @f4(i64 inreg %i)
// CHECK: define dso_local void @f4(i64 inreg %i)
void f4(long long i) {}
// CHECK: define void @f5(i8 inreg signext %a, i16 inreg signext %b)
// CHECK: define dso_local void @f5(i8 inreg signext %a, i16 inreg signext %b)
void f5(signed char a, short b) {}
// CHECK: define void @f6(i8 inreg zeroext %a, i16 inreg zeroext %b)
// CHECK: define dso_local void @f6(i8 inreg zeroext %a, i16 inreg zeroext %b)
void f6(unsigned char a, unsigned short b) {}
enum my_enum {
@ -53,14 +53,14 @@ enum my_enum {
ENUM3,
};
// Enums should be treated as the underlying i32.
// CHECK: define void @f7(i32 inreg %a)
// CHECK: define dso_local void @f7(i32 inreg %a)
void f7(enum my_enum a) {}
enum my_big_enum {
ENUM4 = 0xFFFFFFFFFFFFFFFF,
};
// Big enums should be treated as the underlying i64.
// CHECK: define void @f8(i64 inreg %a)
// CHECK: define dso_local void @f8(i64 inreg %a)
void f8(enum my_big_enum a) {}
union simple_union {
@ -68,7 +68,7 @@ union simple_union {
char b;
};
// Unions should be passed inreg.
// CHECK: define void @f9(i32 inreg %s.coerce)
// CHECK: define dso_local void @f9(i32 inreg %s.coerce)
void f9(union simple_union s) {}
typedef struct {
@ -77,35 +77,35 @@ typedef struct {
int b8 : 8;
} bitfield1;
// Bitfields should be passed inreg.
// CHECK: define void @f10(i32 inreg %bf1.coerce)
// CHECK: define dso_local void @f10(i32 inreg %bf1.coerce)
void f10(bitfield1 bf1) {}
// CHECK: define inreg { float, float } @cplx1(float inreg %r)
// CHECK: define dso_local inreg { float, float } @cplx1(float inreg %r)
_Complex float cplx1(float r) {
return r + 2.0fi;
}
// CHECK: define inreg { double, double } @cplx2(double inreg %r)
// CHECK: define dso_local inreg { double, double } @cplx2(double inreg %r)
_Complex double cplx2(double r) {
return r + 2.0i;
}
// CHECK: define inreg { i32, i32 } @cplx3(i32 inreg %r)
// CHECK: define dso_local inreg { i32, i32 } @cplx3(i32 inreg %r)
_Complex int cplx3(int r) {
return r + 2i;
}
// CHECK: define inreg { i64, i64 } @cplx4(i64 inreg %r)
// CHECK: define dso_local inreg { i64, i64 } @cplx4(i64 inreg %r)
_Complex long long cplx4(long long r) {
return r + 2i;
}
// CHECK: define inreg { i8, i8 } @cplx6(i8 inreg signext %r)
// CHECK: define dso_local inreg { i8, i8 } @cplx6(i8 inreg signext %r)
_Complex signed char cplx6(signed char r) {
return r + 2i;
}
// CHECK: define inreg { i16, i16 } @cplx7(i16 inreg signext %r)
// CHECK: define dso_local inreg { i16, i16 } @cplx7(i16 inreg signext %r)
_Complex short cplx7(short r) {
return r + 2i;
}
@ -120,16 +120,16 @@ typedef struct {
// Use 16-byte struct 2 times, gets 8 registers.
void st2(s16 a, s16 b) {}
// CHECK: define void @st2(i32 inreg %a.coerce0, i32 inreg %a.coerce1, i32 inreg %a.coerce2, i32 inreg %a.coerce3, i32 inreg %b.coerce0, i32 inreg %b.coerce1, i32 inreg %b.coerce2, i32 inreg %b.coerce3)
// CHECK: define dso_local void @st2(i32 inreg %a.coerce0, i32 inreg %a.coerce1, i32 inreg %a.coerce2, i32 inreg %a.coerce3, i32 inreg %b.coerce0, i32 inreg %b.coerce1, i32 inreg %b.coerce2, i32 inreg %b.coerce3)
// Use 8-byte struct 3 times, gets 8 registers, 1 byval struct argument.
void st3(s16 a, s16 b, s16 c) {}
// CHECK: define void @st3(i32 inreg %a.coerce0, i32 inreg %a.coerce1, i32 inreg %a.coerce2, i32 inreg %a.coerce3, i32 inreg %b.coerce0, i32 inreg %b.coerce1, i32 inreg %b.coerce2, i32 inreg %b.coerce3, { i32, i32, i32, i32 } %c.coerce)
// CHECK: define dso_local void @st3(i32 inreg %a.coerce0, i32 inreg %a.coerce1, i32 inreg %a.coerce2, i32 inreg %a.coerce3, i32 inreg %b.coerce0, i32 inreg %b.coerce1, i32 inreg %b.coerce2, i32 inreg %b.coerce3, { i32, i32, i32, i32 } %c.coerce)
// 1 sret + 1 i32 + 2*(i32 coerce) + 4*(i32 coerce) + 1 byval
s16 st4(int x, s8 a, s16 b, s16 c) { return b; }
// CHECK: define void @st4(%struct.s16* noalias sret %agg.result, i32 inreg %x, i32 inreg %a.coerce0, i32 inreg %a.coerce1, i32 inreg %b.coerce0, i32 inreg %b.coerce1, i32 inreg %b.coerce2, i32 inreg %b.coerce3, { i32, i32, i32, i32 } %c.coerce)
// CHECK: define dso_local void @st4(%struct.s16* noalias sret %agg.result, i32 inreg %x, i32 inreg %a.coerce0, i32 inreg %a.coerce1, i32 inreg %b.coerce0, i32 inreg %b.coerce1, i32 inreg %b.coerce2, i32 inreg %b.coerce3, { i32, i32, i32, i32 } %c.coerce)
// 1 sret + 2*(i32 coerce) + 4*(i32 coerce) + 4*(i32 coerce)
s16 st5(s8 a, s16 b, s16 c) { return b; }
// CHECK: define void @st5(%struct.s16* noalias sret %agg.result, i32 inreg %a.coerce0, i32 inreg %a.coerce1, i32 inreg %b.coerce0, i32 inreg %b.coerce1, i32 inreg %b.coerce2, i32 inreg %b.coerce3, { i32, i32, i32, i32 } %c.coerce)
// CHECK: define dso_local void @st5(%struct.s16* noalias sret %agg.result, i32 inreg %a.coerce0, i32 inreg %a.coerce1, i32 inreg %b.coerce0, i32 inreg %b.coerce1, i32 inreg %b.coerce2, i32 inreg %b.coerce3, { i32, i32, i32, i32 } %c.coerce)

4
clang/test/CodeGen/arc/struct-align.c
View File

@ -8,7 +8,7 @@ typedef struct {
double bb;
} s1;
// CHECK: define i32 @f1
// CHECK: define dso_local i32 @f1
// CHECK: ret i32 12
int f1() {
return sizeof(s1);
@ -18,7 +18,7 @@ typedef struct {
int aa;
long long bb;
} s2;
// CHECK: define i32 @f2
// CHECK: define dso_local i32 @f2
// CHECK: ret i32 12
int f2() {
return sizeof(s2);

2
clang/test/CodeGen/arm-aapcs-vfp.c
View File

@ -114,7 +114,7 @@ void test_neon(struct neon_struct arg) {
neon_callee(arg);
}
// CHECK-LABEL: define arm_aapcs_vfpcc void @f33(%struct.s33* byval(%struct.s33) align 4 %s)
// CHECK-LABEL: define dso_local arm_aapcs_vfpcc void @f33(%struct.s33* byval(%struct.s33) align 4 %s)
struct s33 { char buf[32*32]; };
void f33(struct s33 s) { }

6
clang/test/CodeGen/arm-cc.c
View File

@ -12,11 +12,11 @@
// DARWIN-APCS: call void @g
// DARWIN-AAPCS-LABEL: define arm_aapcscc void @f()
// DARWIN-AAPCS: call arm_aapcscc void @g
// LINUX-APCS-LABEL: define arm_apcscc void @f()
// LINUX-APCS-LABEL: define dso_local arm_apcscc void @f()
// LINUX-APCS: call arm_apcscc void @g
// LINUX-AAPCS-LABEL: define void @f()
// LINUX-AAPCS-LABEL: define dso_local void @f()
// LINUX-AAPCS: call void @g
// BAREMETAL-AAPCS_VFP-LABEL: define void @f()
// BAREMETAL-AAPCS_VFP-LABEL: define dso_local void @f()
// BAREMETAL-AAPCS_VFP: call void @g
// BAREMETAL-AAPCS_VFP: declare void @g()
void g(void);

76
clang/test/CodeGen/arm-float-helpers.c
View File

@ -32,192 +32,192 @@
// other runtime functions such as the _Complex helper routines are not covered.
float fadd(float a, float b) { return a + b; }
// CHECK-LABEL: define float @fadd(float %a, float %b)
// CHECK-LABEL: define dso_local float @fadd(float %a, float %b)
// CHECK-NOT: __aeabi_fadd
// CHECK: %add = fadd float {{.*}}, {{.*}}
float fdiv(float a, float b) { return a / b; }
// CHECK-LABEL: define float @fdiv(float %a, float %b)
// CHECK-LABEL: define dso_local float @fdiv(float %a, float %b)
// CHECK-NOT: __aeabi_fdiv
// CHECK: %div = fdiv float {{.*}}, {{.*}}
float fmul(float a, float b) { return a * b; }
// CHECK-LABEL: define float @fmul(float %a, float %b)
// CHECK-LABEL: define dso_local float @fmul(float %a, float %b)
// CHECK-NOT: __aeabi_fmul
// CHECK: %mul = fmul float {{.*}}, {{.*}}
float fsub(float a, float b) { return a - b; }
// CHECK-LABEL: define float @fsub(float %a, float %b)
// CHECK-LABEL: define dso_local float @fsub(float %a, float %b)
// CHECK-NOT: __aeabi_fsub
// CHECK: %sub = fsub float {{.*}}, {{.*}}
int fcmpeq(float a, float b) { return a == b; }
// CHECK-LABEL: define i32 @fcmpeq(float %a, float %b)
// CHECK-LABEL: define dso_local i32 @fcmpeq(float %a, float %b)
// CHECK-NOT: __aeabi_fcmpeq
// CHECK: %cmp = fcmp oeq float {{.*}}, {{.*}}
int fcmplt(float a, float b) { return a < b; }
// CHECK-LABEL: define i32 @fcmplt(float %a, float %b)
// CHECK-LABEL: define dso_local i32 @fcmplt(float %a, float %b)
// CHECK-NOT: __aeabi_fcmplt
// CHECK: %cmp = fcmp olt float {{.*}}, {{.*}}
int fcmple(float a, float b) { return a <= b; }
// CHECK-LABEL: define i32 @fcmple(float %a, float %b)
// CHECK-LABEL: define dso_local i32 @fcmple(float %a, float %b)
// CHECK-NOT: __aeabi_fcmple
// CHECK: %cmp = fcmp ole float {{.*}}, {{.*}}
int fcmpge(float a, float b) { return a >= b; }
// CHECK-LABEL: define i32 @fcmpge(float %a, float %b)
// CHECK-LABEL: define dso_local i32 @fcmpge(float %a, float %b)
// CHECK-NOT: __aeabi_fcmpge
// CHECK: %cmp = fcmp oge float {{.*}}, {{.*}}
int fcmpgt(float a, float b) { return a > b; }
// CHECK-LABEL: define i32 @fcmpgt(float %a, float %b)
// CHECK-LABEL: define dso_local i32 @fcmpgt(float %a, float %b)
// CHECK-NOT: __aeabi_fcmpgt
// CHECK: %cmp = fcmp ogt float {{.*}}, {{.*}}
int fcmpun(float a, float b) { return __builtin_isunordered(a, b); }
// CHECK-LABEL: define i32 @fcmpun(float %a, float %b)
// CHECK-LABEL: define dso_local i32 @fcmpun(float %a, float %b)
// CHECK-NOT: __aeabi_fcmpun
// CHECK: %cmp = fcmp uno float {{.*}}, {{.*}}
double dadd(double a, double b) { return a + b; }
// CHECK-LABEL: define double @dadd(double %a, double %b)
// CHECK-LABEL: define dso_local double @dadd(double %a, double %b)
// CHECK-NOT: __aeabi_dadd
// CHECK: %add = fadd double {{.*}}, {{.*}}
double ddiv(double a, double b) { return a / b; }
// CHECK-LABEL: define double @ddiv(double %a, double %b)
// CHECK-LABEL: define dso_local double @ddiv(double %a, double %b)
// CHECK-NOT: __aeabi_ddiv
// CHECK: %div = fdiv double {{.*}}, {{.*}}
double dmul(double a, double b) { return a * b; }
// CHECK-LABEL: define double @dmul(double %a, double %b)
// CHECK-LABEL: define dso_local double @dmul(double %a, double %b)
// CHECK-NOT: __aeabi_dmul
// CHECK: %mul = fmul double {{.*}}, {{.*}}
double dsub(double a, double b) { return a - b; }
// CHECK-LABEL: define double @dsub(double %a, double %b)
// CHECK-LABEL: define dso_local double @dsub(double %a, double %b)
// CHECK-NOT: __aeabi_dsub
// CHECK: %sub = fsub double {{.*}}, {{.*}}
int dcmpeq(double a, double b) { return a == b; }
// CHECK-LABEL: define i32 @dcmpeq(double %a, double %b)
// CHECK-LABEL: define dso_local i32 @dcmpeq(double %a, double %b)
// CHECK-NOT: __aeabi_dcmpeq
// CHECK: %cmp = fcmp oeq double {{.*}}, {{.*}}
int dcmplt(double a, double b) { return a < b; }
// CHECK-LABEL: define i32 @dcmplt(double %a, double %b)
// CHECK-LABEL: define dso_local i32 @dcmplt(double %a, double %b)
// CHECK-NOT: __aeabi_dcmplt
// CHECK: %cmp = fcmp olt double {{.*}}, {{.*}}
int dcmple(double a, double b) { return a <= b; }
// CHECK-LABEL: define i32 @dcmple(double %a, double %b)
// CHECK-LABEL: define dso_local i32 @dcmple(double %a, double %b)
// CHECK-NOT: __aeabi_dcmple
// CHECK: %cmp = fcmp ole double {{.*}}, {{.*}}
int dcmpge(double a, double b) { return a >= b; }
// CHECK-LABEL: define i32 @dcmpge(double %a, double %b)
// CHECK-LABEL: define dso_local i32 @dcmpge(double %a, double %b)
// CHECK-NOT: __aeabi_dcmpge
// CHECK: %cmp = fcmp oge double {{.*}}, {{.*}}
int dcmpgt(double a, double b) { return a > b; }
// CHECK-LABEL: define i32 @dcmpgt(double %a, double %b)
// CHECK-LABEL: define dso_local i32 @dcmpgt(double %a, double %b)
// CHECK-NOT: __aeabi_dcmpgt
// CHECK: %cmp = fcmp ogt double {{.*}}, {{.*}}
int dcmpun(double a, double b) { return __builtin_isunordered(a, b); }
// CHECK-LABEL: define i32 @dcmpun(double %a, double %b)
// CHECK-LABEL: define dso_local i32 @dcmpun(double %a, double %b)
// CHECK-NOT: __aeabi_dcmpun
// CHECK: %cmp = fcmp uno double {{.*}}, {{.*}}
int d2iz(double a) { return (int)a; }
// CHECK-LABEL: define i32 @d2iz(double %a)
// CHECK-LABEL: define dso_local i32 @d2iz(double %a)
// CHECK-NOT: __aeabi_d2iz
// CHECK: %conv = fptosi double {{.*}} to i32
unsigned int d2uiz(double a) { return (unsigned int)a; }
// CHECK-LABEL: define i32 @d2uiz(double %a)
// CHECK-LABEL: define dso_local i32 @d2uiz(double %a)
// CHECK-NOT: __aeabi_d2uiz
// CHECK: %conv = fptoui double {{.*}} to i32
long long d2lz(double a) { return (long long)a; }
// CHECK-LABEL: define i64 @d2lz(double %a)
// CHECK-LABEL: define dso_local i64 @d2lz(double %a)
// CHECK-NOT: __aeabi_d2lz
// CHECK: %conv = fptosi double {{.*}} to i64
unsigned long long d2ulz(double a) { return (unsigned long long)a; }
// CHECK-LABEL: define i64 @d2ulz(double %a)
// CHECK-LABEL: define dso_local i64 @d2ulz(double %a)
// CHECK-NOT: __aeabi_d2ulz
// CHECK: %conv = fptoui double {{.*}} to i64
int f2iz(float a) { return (int)a; }
// CHECK-LABEL: define i32 @f2iz(float %a)
// CHECK-LABEL: define dso_local i32 @f2iz(float %a)
// CHECK-NOT: __aeabi_f2iz
// CHECK: %conv = fptosi float {{.*}} to i32
unsigned int f2uiz(float a) { return (unsigned int)a; }
// CHECK-LABEL: define i32 @f2uiz(float %a)
// CHECK-LABEL: define dso_local i32 @f2uiz(float %a)
// CHECK-NOT: __aeabi_f2uiz
// CHECK: %conv = fptoui float {{.*}} to i32
long long f2lz(float a) { return (long long)a; }
// CHECK-LABEL: define i64 @f2lz(float %a)
// CHECK-LABEL: define dso_local i64 @f2lz(float %a)
// CHECK-NOT: __aeabi_f2lz
// CHECK: %conv = fptosi float {{.*}} to i64
unsigned long long f2ulz(float a) { return (unsigned long long)a; }
// CHECK-LABEL: define i64 @f2ulz(float %a)
// CHECK-LABEL: define dso_local i64 @f2ulz(float %a)
// CHECK-NOT: __aeabi_f2ulz
// CHECK: %conv = fptoui float {{.*}} to i64
float d2f(double a) { return (float)a; }
// CHECK-LABEL: define float @d2f(double %a)
// CHECK-LABEL: define dso_local float @d2f(double %a)
// CHECK-NOT: __aeabi_d2f
// CHECK: %conv = fptrunc double {{.*}} to float
double f2d(float a) { return (double)a; }
// CHECK-LABEL: define double @f2d(float %a)
// CHECK-LABEL: define dso_local double @f2d(float %a)
// CHECK-NOT: __aeabi_f2d
// CHECK: %conv = fpext float {{.*}} to double
double i2d(int a) { return (double)a; }
// CHECK-LABEL: define double @i2d(i32 %a)
// CHECK-LABEL: define dso_local double @i2d(i32 %a)
// CHECK-NOT: __aeabi_i2d
// CHECK: %conv = sitofp i32 {{.*}} to double
double ui2d(unsigned int a) { return (double)a; }
// CHECK-LABEL: define double @ui2d(i32 %a)
// CHECK-LABEL: define dso_local double @ui2d(i32 %a)
// CHECK-NOT: __aeabi_ui2d
// CHECK: %conv = uitofp i32 {{.*}} to double
double l2d(long long a) { return (double)a; }
// CHECK-LABEL: define double @l2d(i64 %a)
// CHECK-LABEL: define dso_local double @l2d(i64 %a)
// CHECK-NOT: __aeabi_l2d
// CHECK: %conv = sitofp i64 {{.*}} to double
double ul2d(unsigned long long a) { return (unsigned long long)a; }
// CHECK-LABEL: define double @ul2d(i64 %a)
// CHECK-LABEL: define dso_local double @ul2d(i64 %a)
// CHECK-NOT: __aeabi_ul2d
// CHECK: %conv = uitofp i64 {{.*}} to double
float i2f(int a) { return (int)a; }
// CHECK-LABEL: define float @i2f(i32 %a)
// CHECK-LABEL: define dso_local float @i2f(i32 %a)
// CHECK-NOT: __aeabi_i2f
// CHECK: %conv = sitofp i32 {{.*}} to float
float ui2f(unsigned int a) { return (unsigned int)a; }
// CHECK-LABEL: define float @ui2f(i32 %a)
// CHECK-LABEL: define dso_local float @ui2f(i32 %a)
// CHECK-NOT: __aeabi_ui2f
// CHECK: %conv = uitofp i32 {{.*}} to float
float l2f(long long a) { return (long long)a; }
// CHECK-LABEL: define float @l2f(i64 %a)
// CHECK-LABEL: define dso_local float @l2f(i64 %a)
// CHECK-NOT: __aeabi_l2f
// CHECK: %conv = sitofp i64 {{.*}} to float
float ul2f(unsigned long long a) { return (unsigned long long)a; }
// CHECK-LABEL: define float @ul2f(i64 %a)
// CHECK-LABEL: define dso_local float @ul2f(i64 %a)
// CHECK-NOT: __aeabi_ul2f
// CHECK: %conv = uitofp i64 {{.*}} to float

24
clang/test/CodeGen/arm-fp16-arguments.c
View File

@ -5,19 +5,19 @@
__fp16 g;
void t1(__fp16 a) { g = a; }
// SOFT: define void @t1(i32 [[PARAM:%.*]])
// SOFT: define dso_local void @t1(i32 [[PARAM:%.*]])
// SOFT: [[TRUNC:%.*]] = trunc i32 [[PARAM]] to i16
// HARD: define arm_aapcs_vfpcc void @t1(float [[PARAM:%.*]])
// HARD: define dso_local arm_aapcs_vfpcc void @t1(float [[PARAM:%.*]])
// HARD: [[BITCAST:%.*]] = bitcast float [[PARAM]] to i32
// HARD: [[TRUNC:%.*]] = trunc i32 [[BITCAST]] to i16
// CHECK: store i16 [[TRUNC]], i16* bitcast (half* @g to i16*)
// NATIVE: define void @t1(half [[PARAM:%.*]])
// NATIVE: define dso_local void @t1(half [[PARAM:%.*]])
// NATIVE: store half [[PARAM]], half* @g
__fp16 t2() { return g; }
// SOFT: define i32 @t2()
// HARD: define arm_aapcs_vfpcc float @t2()
// NATIVE: define half @t2()
// SOFT: define dso_local i32 @t2()
// HARD: define dso_local arm_aapcs_vfpcc float @t2()
// NATIVE: define dso_local half @t2()
// CHECK: [[LOAD:%.*]] = load i16, i16* bitcast (half* @g to i16*)
// CHECK: [[ZEXT:%.*]] = zext i16 [[LOAD]] to i32
// SOFT: ret i32 [[ZEXT]]
@ -29,19 +29,19 @@ __fp16 t2() { return g; }
_Float16 h;
void t3(_Float16 a) { h = a; }
// SOFT: define void @t3(i32 [[PARAM:%.*]])
// SOFT: define dso_local void @t3(i32 [[PARAM:%.*]])
// SOFT: [[TRUNC:%.*]] = trunc i32 [[PARAM]] to i16
// HARD: define arm_aapcs_vfpcc void @t3(float [[PARAM:%.*]])
// HARD: define dso_local arm_aapcs_vfpcc void @t3(float [[PARAM:%.*]])
// HARD: [[BITCAST:%.*]] = bitcast float [[PARAM]] to i32
// HARD: [[TRUNC:%.*]] = trunc i32 [[BITCAST]] to i16
// CHECK: store i16 [[TRUNC]], i16* bitcast (half* @h to i16*)
// NATIVE: define void @t3(half [[PARAM:%.*]])
// NATIVE: define dso_local void @t3(half [[PARAM:%.*]])
// NATIVE: store half [[PARAM]], half* @h
_Float16 t4() { return h; }
// SOFT: define i32 @t4()
// HARD: define arm_aapcs_vfpcc float @t4()
// NATIVE: define half @t4()
// SOFT: define dso_local i32 @t4()
// HARD: define dso_local arm_aapcs_vfpcc float @t4()
// NATIVE: define dso_local half @t4()
// CHECK: [[LOAD:%.*]] = load i16, i16* bitcast (half* @h to i16*)
// CHECK: [[ZEXT:%.*]] = zext i16 [[LOAD]] to i32
// SOFT: ret i32 [[ZEXT]]

2
clang/test/CodeGen/arm-homogenous.c
View File

@ -223,7 +223,7 @@ struct_of_double_and_long_double g_dld;
struct_of_double_and_long_double test_struct_of_double_and_long_double(void) {
return g_dld;
}
// CHECK: define arm_aapcs_vfpcc %struct.struct_of_double_and_long_double @test_struct_of_double_and_long_double()
// CHECK: define dso_local arm_aapcs_vfpcc %struct.struct_of_double_and_long_double @test_struct_of_double_and_long_double()
// FIXME: Tests necessary:
// - Vectors

30
clang/test/CodeGen/arm-neon-directed-rounding.c
View File

@ -7,7 +7,7 @@
#include <arm_neon.h>
// CHECK-LABEL: define <2 x float> @test_vrnda_f32(<2 x float> %a)
// CHECK-LABEL: define dso_local <2 x float> @test_vrnda_f32(<2 x float> %a)
// CHECK-A32: [[VRNDA_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrinta.v2f32(<2 x float> %a)
// CHECK-A64: [[VRNDA_V1_I:%.*]] = call <2 x float> @llvm.round.v2f32(<2 x float> %a)
// CHECK: ret <2 x float> [[VRNDA_V1_I]]
@ -15,7 +15,7 @@ float32x2_t test_vrnda_f32(float32x2_t a) {
return vrnda_f32(a);
}
// CHECK-LABEL: define <4 x float> @test_vrndaq_f32(<4 x float> %a)
// CHECK-LABEL: define dso_local <4 x float> @test_vrndaq_f32(<4 x float> %a)
// CHECK-A32: [[VRNDAQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrinta.v4f32(<4 x float> %a)
// CHECK-A64: [[VRNDAQ_V1_I:%.*]] = call <4 x float> @llvm.round.v4f32(<4 x float> %a)
// CHECK: ret <4 x float> [[VRNDAQ_V1_I]]
@ -23,7 +23,7 @@ float32x4_t test_vrndaq_f32(float32x4_t a) {
return vrndaq_f32(a);
}
// CHECK-LABEL: define <2 x float> @test_vrndm_f32(<2 x float> %a)
// CHECK-LABEL: define dso_local <2 x float> @test_vrndm_f32(<2 x float> %a)
// CHECK-A32: [[VRNDM_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrintm.v2f32(<2 x float> %a)
// CHECK-A64: [[VRNDM_V1_I:%.*]] = call <2 x float> @llvm.floor.v2f32(<2 x float> %a)
// CHECK: ret <2 x float> [[VRNDM_V1_I]]
@ -31,7 +31,7 @@ float32x2_t test_vrndm_f32(float32x2_t a) {
return vrndm_f32(a);
}
// CHECK-LABEL: define <4 x float> @test_vrndmq_f32(<4 x float> %a)
// CHECK-LABEL: define dso_local <4 x float> @test_vrndmq_f32(<4 x float> %a)
// CHECK-A32: [[VRNDMQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrintm.v4f32(<4 x float> %a)
// CHECK-A64: [[VRNDMQ_V1_I:%.*]] = call <4 x float> @llvm.floor.v4f32(<4 x float> %a)
// CHECK: ret <4 x float> [[VRNDMQ_V1_I]]
@ -39,7 +39,7 @@ float32x4_t test_vrndmq_f32(float32x4_t a) {
return vrndmq_f32(a);
}
// CHECK-LABEL: define <2 x float> @test_vrndn_f32(<2 x float> %a)
// CHECK-LABEL: define dso_local <2 x float> @test_vrndn_f32(<2 x float> %a)
// CHECK-A32: [[VRNDN_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrintn.v2f32(<2 x float> %a)
// CHECK-A64: [[VRNDN_V1_I:%.*]] = call <2 x float> @llvm.aarch64.neon.frintn.v2f32(<2 x float> %a)
// CHECK: ret <2 x float> [[VRNDN_V1_I]]
@ -47,7 +47,7 @@ float32x2_t test_vrndn_f32(float32x2_t a) {
return vrndn_f32(a);
}
// CHECK-LABEL: define <4 x float> @test_vrndnq_f32(<4 x float> %a)
// CHECK-LABEL: define dso_local <4 x float> @test_vrndnq_f32(<4 x float> %a)
// CHECK-A32: [[VRNDNQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrintn.v4f32(<4 x float> %a)
// CHECK-A64: [[VRNDNQ_V1_I:%.*]] = call <4 x float> @llvm.aarch64.neon.frintn.v4f32(<4 x float> %a)
// CHECK: ret <4 x float> [[VRNDNQ_V1_I]]
@ -55,7 +55,7 @@ float32x4_t test_vrndnq_f32(float32x4_t a) {
return vrndnq_f32(a);
}
// CHECK-LABEL: define <2 x float> @test_vrndp_f32(<2 x float> %a)
// CHECK-LABEL: define dso_local <2 x float> @test_vrndp_f32(<2 x float> %a)
// CHECK-A32: [[VRNDP_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrintp.v2f32(<2 x float> %a)
// CHECK-A64: [[VRNDP_V1_I:%.*]] = call <2 x float> @llvm.ceil.v2f32(<2 x float> %a)
// CHECK: ret <2 x float> [[VRNDP_V1_I]]
@ -63,7 +63,7 @@ float32x2_t test_vrndp_f32(float32x2_t a) {
return vrndp_f32(a);
}
// CHECK-LABEL: define <4 x float> @test_vrndpq_f32(<4 x float> %a)
// CHECK-LABEL: define dso_local <4 x float> @test_vrndpq_f32(<4 x float> %a)
// CHECK-A32: [[VRNDPQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrintp.v4f32(<4 x float> %a)
// CHECK-A64: [[VRNDPQ_V1_I:%.*]] = call <4 x float> @llvm.ceil.v4f32(<4 x float> %a)
// CHECK: ret <4 x float> [[VRNDPQ_V1_I]]
@ -71,7 +71,7 @@ float32x4_t test_vrndpq_f32(float32x4_t a) {
return vrndpq_f32(a);
}
// CHECK-LABEL: define <2 x float> @test_vrndx_f32(<2 x float> %a)
// CHECK-LABEL: define dso_local <2 x float> @test_vrndx_f32(<2 x float> %a)
// CHECK-A32: [[VRNDX_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrintx.v2f32(<2 x float> %a)
// CHECK-A64: [[VRNDX_V1_I:%.*]] = call <2 x float> @llvm.rint.v2f32(<2 x float> %a)
// CHECK: ret <2 x float> [[VRNDX_V1_I]]
@ -79,7 +79,7 @@ float32x2_t test_vrndx_f32(float32x2_t a) {
return vrndx_f32(a);
}
// CHECK-LABEL: define <4 x float> @test_vrndxq_f32(<4 x float> %a)
// CHECK-LABEL: define dso_local <4 x float> @test_vrndxq_f32(<4 x float> %a)
// CHECK-A32: [[VRNDXQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrintx.v4f32(<4 x float> %a)
// CHECK-A64: [[VRNDXQ_V1_I:%.*]] = call <4 x float> @llvm.rint.v4f32(<4 x float> %a)
// CHECK: ret <4 x float> [[VRNDXQ_V1_I]]
@ -87,7 +87,7 @@ float32x4_t test_vrndxq_f32(float32x4_t a) {
return vrndxq_f32(a);
}
// CHECK-LABEL: define <2 x float> @test_vrnd_f32(<2 x float> %a)
// CHECK-LABEL: define dso_local <2 x float> @test_vrnd_f32(<2 x float> %a)
// CHECK-A32: [[VRND_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrintz.v2f32(<2 x float> %a)
// CHECK-A64: [[VRND_V1_I:%.*]] = call <2 x float> @llvm.trunc.v2f32(<2 x float> %a)
// CHECK: ret <2 x float> [[VRND_V1_I]]
@ -95,7 +95,7 @@ float32x2_t test_vrnd_f32(float32x2_t a) {
return vrnd_f32(a);
}
// CHECK-LABEL: define <4 x float> @test_vrndq_f32(<4 x float> %a)
// CHECK-LABEL: define dso_local <4 x float> @test_vrndq_f32(<4 x float> %a)
// CHECK-A32: [[VRNDQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrintz.v4f32(<4 x float> %a)
// CHECK-A64: [[VRNDQ_V1_I:%.*]] = call <4 x float> @llvm.trunc.v4f32(<4 x float> %a)
// CHECK: ret <4 x float> [[VRNDQ_V1_I]]
@ -103,7 +103,7 @@ float32x4_t test_vrndq_f32(float32x4_t a) {
return vrndq_f32(a);
}
// CHECK-LABEL: define float @test_vrndns_f32(float %a)
// CHECK-LABEL: define dso_local float @test_vrndns_f32(float %a)
// CHECK-A32: [[VRNDN_I:%.*]] = call float @llvm.arm.neon.vrintn.f32(float %a)
// CHECK-A64: [[VRNDN_I:%.*]] = call float @llvm.aarch64.neon.frintn.f32(float %a)
// CHECK: ret float [[VRNDN_I]]
@ -111,7 +111,7 @@ float32_t test_vrndns_f32(float32_t a) {
return vrndns_f32(a);
}
// CHECK-LABEL: define <2 x float> @test_vrndi_f32(<2 x float> %a)
// CHECK-LABEL: define dso_local <2 x float> @test_vrndi_f32(<2 x float> %a)
// CHECK: [[TMP0:%.*]] = bitcast <2 x float> %a to <8 x i8>
// CHECK: [[VRNDI1_I:%.*]] = call <2 x float> @llvm.nearbyint.v2f32(<2 x float> %a)
// CHECK: ret <2 x float> [[VRNDI1_I]]
@ -119,7 +119,7 @@ float32x2_t test_vrndi_f32(float32x2_t a) {
return vrndi_f32(a);
}
// CHECK-LABEL: define <4 x float> @test_vrndiq_f32(<4 x float> %a)
// CHECK-LABEL: define dso_local <4 x float> @test_vrndiq_f32(<4 x float> %a)
// CHECK: [[TMP0:%.*]] = bitcast <4 x float> %a to <16 x i8>
// CHECK: [[VRNDI1_I:%.*]] = call <4 x float> @llvm.nearbyint.v4f32(<4 x float> %a)
// CHECK: ret <4 x float> [[VRNDI1_I]]

16
clang/test/CodeGen/arm-neon-dot-product.c
View File

@ -8,35 +8,35 @@
#include <arm_neon.h>
uint32x2_t test_vdot_u32(uint32x2_t a, uint8x8_t b, uint8x8_t c) {
// CHECK-LABEL: define <2 x i32> @test_vdot_u32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
// CHECK-LABEL: define dso_local <2 x i32> @test_vdot_u32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
// CHECK: [[RESULT:%.*]] = call <2 x i32> @llvm.arm.neon.udot.v2i32.v8i8(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
// CHECK: ret <2 x i32> [[RESULT]]
return vdot_u32(a, b, c);
}
uint32x4_t test_vdotq_u32(uint32x4_t a, uint8x16_t b, uint8x16_t c) {
// CHECK-LABEL: define <4 x i32> @test_vdotq_u32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
// CHECK-LABEL: define dso_local <4 x i32> @test_vdotq_u32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
// CHECK: [[RESULT:%.*]] = call <4 x i32> @llvm.arm.neon.udot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
// CHECK: ret <4 x i32> [[RESULT]]
return vdotq_u32(a, b, c);
}
int32x2_t test_vdot_s32(int32x2_t a, int8x8_t b, int8x8_t c) {
// CHECK-LABEL: define <2 x i32> @test_vdot_s32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
// CHECK-LABEL: define dso_local <2 x i32> @test_vdot_s32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
// CHECK: [[RESULT:%.*]] = call <2 x i32> @llvm.arm.neon.sdot.v2i32.v8i8(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
// CHECK: ret <2 x i32> [[RESULT]]
return vdot_s32(a, b, c);
}
int32x4_t test_vdotq_s32(int32x4_t a, int8x16_t b, int8x16_t c) {
// CHECK-LABEL: define <4 x i32> @test_vdotq_s32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
// CHECK-LABEL: define dso_local <4 x i32> @test_vdotq_s32(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
// CHECK: [[RESULT:%.*]] = call <4 x i32> @llvm.arm.neon.sdot.v4i32.v16i8(<4 x i32> %a, <16 x i8> %b, <16 x i8> %c)
// CHECK: ret <4 x i32> [[RESULT]]
return vdotq_s32(a, b, c);
}
uint32x2_t test_vdot_lane_u32(uint32x2_t a, uint8x8_t b, uint8x8_t c) {
// CHECK-LABEL: define <2 x i32> @test_vdot_lane_u32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
// CHECK-LABEL: define dso_local <2 x i32> @test_vdot_lane_u32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
// CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32>
// CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> undef, <2 x i32> <i32 1, i32 1>
// CHECK: [[CAST2:%.*]] = bitcast <2 x i32> [[SHUFFLE]] to <8 x i8>
@ -46,7 +46,7 @@ uint32x2_t test_vdot_lane_u32(uint32x2_t a, uint8x8_t b, uint8x8_t c) {
}
uint32x4_t test_vdotq_lane_u32(uint32x4_t a, uint8x16_t b, uint8x8_t c) {
// CHECK-LABEL: define <4 x i32> @test_vdotq_lane_u32(<4 x i32> %a, <16 x i8> %b, <8 x i8> %c)
// CHECK-LABEL: define dso_local <4 x i32> @test_vdotq_lane_u32(<4 x i32> %a, <16 x i8> %b, <8 x i8> %c)
// CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32>
// CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
// CHECK: [[CAST2:%.*]] = bitcast <4 x i32> [[SHUFFLE]] to <16 x i8>
@ -56,7 +56,7 @@ uint32x4_t test_vdotq_lane_u32(uint32x4_t a, uint8x16_t b, uint8x8_t c) {
}
int32x2_t test_vdot_lane_s32(int32x2_t a, int8x8_t b, int8x8_t c) {
// CHECK-LABEL: define <2 x i32> @test_vdot_lane_s32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
// CHECK-LABEL: define dso_local <2 x i32> @test_vdot_lane_s32(<2 x i32> %a, <8 x i8> %b, <8 x i8> %c)
// CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32>
// CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> undef, <2 x i32> <i32 1, i32 1>
// CHECK: [[CAST2:%.*]] = bitcast <2 x i32> [[SHUFFLE]] to <8 x i8>
@ -66,7 +66,7 @@ int32x2_t test_vdot_lane_s32(int32x2_t a, int8x8_t b, int8x8_t c) {
}
int32x4_t test_vdotq_lane_s32(int32x4_t a, int8x16_t b, int8x8_t c) {
// CHECK-LABEL: define <4 x i32> @test_vdotq_lane_s32(<4 x i32> %a, <16 x i8> %b, <8 x i8> %c)
// CHECK-LABEL: define dso_local <4 x i32> @test_vdotq_lane_s32(<4 x i32> %a, <16 x i8> %b, <8 x i8> %c)
// CHECK: [[CAST1:%.*]] = bitcast <8 x i8> %c to <2 x i32>
// CHECK: [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[CAST1]], <2 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
// CHECK: [[CAST2:%.*]] = bitcast <4 x i32> [[SHUFFLE]] to <16 x i8>

8
clang/test/CodeGen/arm-neon-fma.c
View File

@ -7,21 +7,21 @@
#include <arm_neon.h>
// CHECK-LABEL: define <2 x float> @test_fma_order(<2 x float> %accum, <2 x float> %lhs, <2 x float> %rhs) #0 {
// CHECK-LABEL: define dso_local <2 x float> @test_fma_order(<2 x float> %accum, <2 x float> %lhs, <2 x float> %rhs) #0 {
// CHECK: [[TMP6:%.*]] = call <2 x float> @llvm.fma.v2f32(<2 x float> %lhs, <2 x float> %rhs, <2 x float> %accum) #3
// CHECK: ret <2 x float> [[TMP6]]
float32x2_t test_fma_order(float32x2_t accum, float32x2_t lhs, float32x2_t rhs) {
return vfma_f32(accum, lhs, rhs);
}
// CHECK-LABEL: define <4 x float> @test_fmaq_order(<4 x float> %accum, <4 x float> %lhs, <4 x float> %rhs) #1 {
// CHECK-LABEL: define dso_local <4 x float> @test_fmaq_order(<4 x float> %accum, <4 x float> %lhs, <4 x float> %rhs) #1 {
// CHECK: [[TMP6:%.*]] = call <4 x float> @llvm.fma.v4f32(<4 x float> %lhs, <4 x float> %rhs, <4 x float> %accum) #3
// CHECK: ret <4 x float> [[TMP6]]
float32x4_t test_fmaq_order(float32x4_t accum, float32x4_t lhs, float32x4_t rhs) {
return vfmaq_f32(accum, lhs, rhs);
}
// CHECK-LABEL: define <2 x float> @test_vfma_n_f32(<2 x float> %a, <2 x float> %b, float %n) #0 {
// CHECK-LABEL: define dso_local <2 x float> @test_vfma_n_f32(<2 x float> %a, <2 x float> %b, float %n) #0 {
// CHECK: [[VECINIT_I:%.*]] = insertelement <2 x float> undef, float %n, i32 0
// CHECK: [[VECINIT1_I:%.*]] = insertelement <2 x float> [[VECINIT_I]], float %n, i32 1
// CHECK: [[TMP1:%.*]] = bitcast <2 x float> %b to <8 x i8>
@ -32,7 +32,7 @@ float32x2_t test_vfma_n_f32(float32x2_t a, float32x2_t b, float32_t n) {
return vfma_n_f32(a, b, n);
}
// CHECK-LABEL: define <4 x float> @test_vfmaq_n_f32(<4 x float> %a, <4 x float> %b, float %n) #1 {
// CHECK-LABEL: define dso_local <4 x float> @test_vfmaq_n_f32(<4 x float> %a, <4 x float> %b, float %n) #1 {
// CHECK: [[VECINIT_I:%.*]] = insertelement <4 x float> undef, float %n, i32 0
// CHECK: [[VECINIT1_I:%.*]] = insertelement <4 x float> [[VECINIT_I]], float %n, i32 1
// CHECK: [[VECINIT2_I:%.*]] = insertelement <4 x float> [[VECINIT1_I]], float %n, i32 2

8
clang/test/CodeGen/arm-neon-numeric-maxmin.c
View File

@ -2,28 +2,28 @@
#include <arm_neon.h>
// CHECK-LABEL: define <2 x float> @test_vmaxnm_f32(<2 x float> %a, <2 x float> %b) #0 {
// CHECK-LABEL: define dso_local <2 x float> @test_vmaxnm_f32(<2 x float> %a, <2 x float> %b) #0 {
// CHECK: [[VMAXNM_V2_I:%.*]] = call <2 x float> @llvm.arm.neon.vmaxnm.v2f32(<2 x float> %a, <2 x float> %b) #3
// CHECK: ret <2 x float> [[VMAXNM_V2_I]]
float32x2_t test_vmaxnm_f32(float32x2_t a, float32x2_t b) {
return vmaxnm_f32(a, b);
}
// CHECK-LABEL: define <4 x float> @test_vmaxnmq_f32(<4 x float> %a, <4 x float> %b) #1 {
// CHECK-LABEL: define dso_local <4 x float> @test_vmaxnmq_f32(<4 x float> %a, <4 x float> %b) #1 {
// CHECK: [[VMAXNMQ_V2_I:%.*]] = call <4 x float> @llvm.arm.neon.vmaxnm.v4f32(<4 x float> %a, <4 x float> %b) #3
// CHECK: ret <4 x float> [[VMAXNMQ_V2_I]]
float32x4_t test_vmaxnmq_f32(float32x4_t a, float32x4_t b) {
return vmaxnmq_f32(a, b);
}
// CHECK-LABEL: define <2 x float> @test_vminnm_f32(<2 x float> %a, <2 x float> %b) #0 {
// CHECK-LABEL: define dso_local <2 x float> @test_vminnm_f32(<2 x float> %a, <2 x float> %b) #0 {
// CHECK: [[VMINNM_V2_I:%.*]] = call <2 x float> @llvm.arm.neon.vminnm.v2f32(<2 x float> %a, <2 x float> %b) #3
// CHECK: ret <2 x float> [[VMINNM_V2_I]]
float32x2_t test_vminnm_f32(float32x2_t a, float32x2_t b) {
return vminnm_f32(a, b);
}
// CHECK-LABEL: define <4 x float> @test_vminnmq_f32(<4 x float> %a, <4 x float> %b) #1 {
// CHECK-LABEL: define dso_local <4 x float> @test_vminnmq_f32(<4 x float> %a, <4 x float> %b) #1 {
// CHECK: [[VMINNMQ_V2_I:%.*]] = call <4 x float> @llvm.arm.neon.vminnm.v4f32(<4 x float> %a, <4 x float> %b) #3
// CHECK: ret <4 x float> [[VMINNMQ_V2_I]]
float32x4_t test_vminnmq_f32(float32x4_t a, float32x4_t b) {

32
clang/test/CodeGen/arm-neon-vcvtX.c
View File

@ -2,112 +2,112 @@
#include <arm_neon.h>
// CHECK-LABEL: define <2 x i32> @test_vcvta_s32_f32(<2 x float> %a) #0 {
// CHECK-LABEL: define dso_local <2 x i32> @test_vcvta_s32_f32(<2 x float> %a) #0 {
// CHECK: [[VCVTA_S32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtas.v2i32.v2f32(<2 x float> %a) #3
// CHECK: ret <2 x i32> [[VCVTA_S32_V1_I]]
int32x2_t test_vcvta_s32_f32(float32x2_t a) {
return vcvta_s32_f32(a);
}
// CHECK-LABEL: define <2 x i32> @test_vcvta_u32_f32(<2 x float> %a) #0 {
// CHECK-LABEL: define dso_local <2 x i32> @test_vcvta_u32_f32(<2 x float> %a) #0 {
// CHECK: [[VCVTA_U32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtau.v2i32.v2f32(<2 x float> %a) #3
// CHECK: ret <2 x i32> [[VCVTA_U32_V1_I]]
uint32x2_t test_vcvta_u32_f32(float32x2_t a) {
return vcvta_u32_f32(a);
}
// CHECK-LABEL: define <4 x i32> @test_vcvtaq_s32_f32(<4 x float> %a) #1 {
// CHECK-LABEL: define dso_local <4 x i32> @test_vcvtaq_s32_f32(<4 x float> %a) #1 {
// CHECK: [[VCVTAQ_S32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtas.v4i32.v4f32(<4 x float> %a) #3
// CHECK: ret <4 x i32> [[VCVTAQ_S32_V1_I]]
int32x4_t test_vcvtaq_s32_f32(float32x4_t a) {
return vcvtaq_s32_f32(a);
}
// CHECK-LABEL: define <4 x i32> @test_vcvtaq_u32_f32(<4 x float> %a) #1 {
// CHECK-LABEL: define dso_local <4 x i32> @test_vcvtaq_u32_f32(<4 x float> %a) #1 {
// CHECK: [[VCVTAQ_U32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtau.v4i32.v4f32(<4 x float> %a) #3
// CHECK: ret <4 x i32> [[VCVTAQ_U32_V1_I]]
uint32x4_t test_vcvtaq_u32_f32(float32x4_t a) {
return vcvtaq_u32_f32(a);
}
// CHECK-LABEL: define <2 x i32> @test_vcvtn_s32_f32(<2 x float> %a) #0 {
// CHECK-LABEL: define dso_local <2 x i32> @test_vcvtn_s32_f32(<2 x float> %a) #0 {
// CHECK: [[VCVTN_S32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtns.v2i32.v2f32(<2 x float> %a) #3
// CHECK: ret <2 x i32> [[VCVTN_S32_V1_I]]
int32x2_t test_vcvtn_s32_f32(float32x2_t a) {
return vcvtn_s32_f32(a);
}
// CHECK-LABEL: define <2 x i32> @test_vcvtn_u32_f32(<2 x float> %a) #0 {
// CHECK-LABEL: define dso_local <2 x i32> @test_vcvtn_u32_f32(<2 x float> %a) #0 {
// CHECK: [[VCVTN_U32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtnu.v2i32.v2f32(<2 x float> %a) #3
// CHECK: ret <2 x i32> [[VCVTN_U32_V1_I]]
uint32x2_t test_vcvtn_u32_f32(float32x2_t a) {
return vcvtn_u32_f32(a);
}
// CHECK-LABEL: define <4 x i32> @test_vcvtnq_s32_f32(<4 x float> %a) #1 {
// CHECK-LABEL: define dso_local <4 x i32> @test_vcvtnq_s32_f32(<4 x float> %a) #1 {
// CHECK: [[VCVTNQ_S32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtns.v4i32.v4f32(<4 x float> %a) #3
// CHECK: ret <4 x i32> [[VCVTNQ_S32_V1_I]]
int32x4_t test_vcvtnq_s32_f32(float32x4_t a) {
return vcvtnq_s32_f32(a);
}
// CHECK-LABEL: define <4 x i32> @test_vcvtnq_u32_f32(<4 x float> %a) #1 {
// CHECK-LABEL: define dso_local <4 x i32> @test_vcvtnq_u32_f32(<4 x float> %a) #1 {
// CHECK: [[VCVTNQ_U32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtnu.v4i32.v4f32(<4 x float> %a) #3
// CHECK: ret <4 x i32> [[VCVTNQ_U32_V1_I]]
uint32x4_t test_vcvtnq_u32_f32(float32x4_t a) {
return vcvtnq_u32_f32(a);
}
// CHECK-LABEL: define <2 x i32> @test_vcvtp_s32_f32(<2 x float> %a) #0 {
// CHECK-LABEL: define dso_local <2 x i32> @test_vcvtp_s32_f32(<2 x float> %a) #0 {
// CHECK: [[VCVTP_S32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtps.v2i32.v2f32(<2 x float> %a) #3
// CHECK: ret <2 x i32> [[VCVTP_S32_V1_I]]
int32x2_t test_vcvtp_s32_f32(float32x2_t a) {
return vcvtp_s32_f32(a);
}
// CHECK-LABEL: define <2 x i32> @test_vcvtp_u32_f32(<2 x float> %a) #0 {
// CHECK-LABEL: define dso_local <2 x i32> @test_vcvtp_u32_f32(<2 x float> %a) #0 {
// CHECK: [[VCVTP_U32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtpu.v2i32.v2f32(<2 x float> %a) #3
// CHECK: ret <2 x i32> [[VCVTP_U32_V1_I]]
uint32x2_t test_vcvtp_u32_f32(float32x2_t a) {
return vcvtp_u32_f32(a);
}
// CHECK-LABEL: define <4 x i32> @test_vcvtpq_s32_f32(<4 x float> %a) #1 {
// CHECK-LABEL: define dso_local <4 x i32> @test_vcvtpq_s32_f32(<4 x float> %a) #1 {
// CHECK: [[VCVTPQ_S32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtps.v4i32.v4f32(<4 x float> %a) #3
// CHECK: ret <4 x i32> [[VCVTPQ_S32_V1_I]]
int32x4_t test_vcvtpq_s32_f32(float32x4_t a) {
return vcvtpq_s32_f32(a);
}
// CHECK-LABEL: define <4 x i32> @test_vcvtpq_u32_f32(<4 x float> %a) #1 {
// CHECK-LABEL: define dso_local <4 x i32> @test_vcvtpq_u32_f32(<4 x float> %a) #1 {
// CHECK: [[VCVTPQ_U32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtpu.v4i32.v4f32(<4 x float> %a) #3
// CHECK: ret <4 x i32> [[VCVTPQ_U32_V1_I]]
uint32x4_t test_vcvtpq_u32_f32(float32x4_t a) {
return vcvtpq_u32_f32(a);
}
// CHECK-LABEL: define <2 x i32> @test_vcvtm_s32_f32(<2 x float> %a) #0 {
// CHECK-LABEL: define dso_local <2 x i32> @test_vcvtm_s32_f32(<2 x float> %a) #0 {
// CHECK: [[VCVTM_S32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtms.v2i32.v2f32(<2 x float> %a) #3
// CHECK: ret <2 x i32> [[VCVTM_S32_V1_I]]
int32x2_t test_vcvtm_s32_f32(float32x2_t a) {
return vcvtm_s32_f32(a);
}
// CHECK-LABEL: define <2 x i32> @test_vcvtm_u32_f32(<2 x float> %a) #0 {
// CHECK-LABEL: define dso_local <2 x i32> @test_vcvtm_u32_f32(<2 x float> %a) #0 {
// CHECK: [[VCVTM_U32_V1_I:%.*]] = call <2 x i32> @llvm.arm.neon.vcvtmu.v2i32.v2f32(<2 x float> %a) #3
// CHECK: ret <2 x i32> [[VCVTM_U32_V1_I]]
uint32x2_t test_vcvtm_u32_f32(float32x2_t a) {
return vcvtm_u32_f32(a);
}
// CHECK-LABEL: define <4 x i32> @test_vcvtmq_s32_f32(<4 x float> %a) #1 {
// CHECK-LABEL: define dso_local <4 x i32> @test_vcvtmq_s32_f32(<4 x float> %a) #1 {
// CHECK: [[VCVTMQ_S32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtms.v4i32.v4f32(<4 x float> %a) #3
// CHECK: ret <4 x i32> [[VCVTMQ_S32_V1_I]]
int32x4_t test_vcvtmq_s32_f32(float32x4_t a) {
return vcvtmq_s32_f32(a);
}
// CHECK-LABEL: define <4 x i32> @test_vcvtmq_u32_f32(<4 x float> %a) #1 {
// CHECK-LABEL: define dso_local <4 x i32> @test_vcvtmq_u32_f32(<4 x float> %a) #1 {
// CHECK: [[VCVTMQ_U32_V1_I:%.*]] = call <4 x i32> @llvm.arm.neon.vcvtmu.v4i32.v4f32(<4 x float> %a) #3
// CHECK: ret <4 x i32> [[VCVTMQ_U32_V1_I]]
uint32x4_t test_vcvtmq_u32_f32(float32x4_t a) {

2
clang/test/CodeGen/arm-pcs.c
View File

@ -6,7 +6,7 @@ typedef int __attribute__((pcs("aapcs-vfp"))) (*aapcs_vfp_fn)(void);
aapcs_fn bar;
int foo(aapcs_vfp_fn baz) {
// CHECK-LABEL: define i32 @foo
// CHECK-LABEL: define dso_local i32 @foo
// CHECK: call arm_aapcscc
// CHECK: call arm_aapcs_vfpcc
return bar() + baz();

36
clang/test/CodeGen/arm-varargs.c
View File

@ -9,7 +9,7 @@
va_list the_list;
int simple_int(void) {
// CHECK-LABEL: define i32 @simple_int
// CHECK-LABEL: define dso_local i32 @simple_int
return va_arg(the_list, int);
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
// CHECK: [[NEXT:%[a-z0-9._]+]] = getelementptr inbounds i8, i8* [[CUR]], i32 4
@ -24,7 +24,7 @@ struct bigstruct {
};
struct bigstruct simple_struct(void) {
// CHECK-LABEL: define void @simple_struct(%struct.bigstruct* noalias sret %agg.result)
// CHECK-LABEL: define dso_local void @simple_struct(%struct.bigstruct* noalias sret %agg.result)
return va_arg(the_list, struct bigstruct);
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
// CHECK: [[NEXT:%[a-z0-9._]+]] = getelementptr inbounds i8, i8* [[CUR]], i32 40
@ -42,7 +42,7 @@ struct aligned_bigstruct {
};
struct aligned_bigstruct simple_aligned_struct(void) {
// CHECK-LABEL: define void @simple_aligned_struct(%struct.aligned_bigstruct* noalias sret %agg.result)
// CHECK-LABEL: define dso_local void @simple_aligned_struct(%struct.aligned_bigstruct* noalias sret %agg.result)
return va_arg(the_list, struct aligned_bigstruct);
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
// CHECK: [[CUR_INT:%[a-z0-9._]+]] = ptrtoint i8* [[CUR]] to i32
@ -59,7 +59,7 @@ struct aligned_bigstruct simple_aligned_struct(void) {
}
double simple_double(void) {
// CHECK-LABEL: define double @simple_double
// CHECK-LABEL: define dso_local double @simple_double
return va_arg(the_list, double);
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
// CHECK: [[CUR_INT:%[a-z0-9._]+]] = ptrtoint i8* [[CUR]] to i32
@ -78,7 +78,7 @@ struct hfa {
};
struct hfa simple_hfa(void) {
// CHECK-LABEL: define void @simple_hfa(%struct.hfa* noalias sret %agg.result)
// CHECK-LABEL: define dso_local void @simple_hfa(%struct.hfa* noalias sret %agg.result)
return va_arg(the_list, struct hfa);
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
// CHECK: [[NEXT:%[a-z0-9._]+]] = getelementptr inbounds i8, i8* [[CUR]], i32 8
@ -96,7 +96,7 @@ struct hfa simple_hfa(void) {
typedef int underaligned_int __attribute__((packed,aligned(2)));
underaligned_int underaligned_int_test() {
// CHECK-LABEL: define i32 @underaligned_int_test()
// CHECK-LABEL: define dso_local i32 @underaligned_int_test()
return va_arg(the_list, underaligned_int);
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
// CHECK: [[NEXT:%[a-z0-9._]+]] = getelementptr inbounds i8, i8* [[CUR]], i32 4
@ -108,7 +108,7 @@ underaligned_int underaligned_int_test() {
typedef int overaligned_int __attribute__((aligned(32)));
overaligned_int overaligned_int_test() {
// CHECK-LABEL: define i32 @overaligned_int_test()
// CHECK-LABEL: define dso_local i32 @overaligned_int_test()
return va_arg(the_list, overaligned_int);
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
// CHECK: [[NEXT:%[a-z0-9._]+]] = getelementptr inbounds i8, i8* [[CUR]], i32 4
@ -120,7 +120,7 @@ overaligned_int overaligned_int_test() {
typedef long long underaligned_long_long __attribute__((packed,aligned(2)));
underaligned_long_long underaligned_long_long_test() {
// CHECK-LABEL: define i64 @underaligned_long_long_test()
// CHECK-LABEL: define dso_local i64 @underaligned_long_long_test()
return va_arg(the_list, underaligned_long_long);
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
// CHECK: [[CUR_INT:%[a-z0-9._]+]] = ptrtoint i8* [[CUR]] to i32
@ -136,7 +136,7 @@ underaligned_long_long underaligned_long_long_test() {
typedef long long overaligned_long_long __attribute__((aligned(32)));
overaligned_long_long overaligned_long_long_test() {
// CHECK-LABEL: define i64 @overaligned_long_long_test()
// CHECK-LABEL: define dso_local i64 @overaligned_long_long_test()
return va_arg(the_list, overaligned_long_long);
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
// CHECK: [[CUR_INT:%[a-z0-9._]+]] = ptrtoint i8* [[CUR]] to i32
@ -166,7 +166,7 @@ typedef struct __attribute__((packed,aligned(2))) {
int val;
} underaligned_int_struct;
underaligned_int_struct underaligned_int_struct_test() {
// CHECK-LABEL: define i32 @underaligned_int_struct_test()
// CHECK-LABEL: define dso_local i32 @underaligned_int_struct_test()
return va_arg(the_list, underaligned_int_struct);
// CHECK: [[RETVAL:%[a-z0-9._]+]] = alloca %struct.underaligned_int_struct, align 2
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
@ -185,7 +185,7 @@ typedef struct __attribute__((aligned(16))) {
int val;
} overaligned_int_struct;
overaligned_int_struct overaligned_int_struct_test() {
// CHECK-LABEL: define void @overaligned_int_struct_test(%struct.overaligned_int_struct* noalias sret %agg.result)
// CHECK-LABEL: define dso_local void @overaligned_int_struct_test(%struct.overaligned_int_struct* noalias sret %agg.result)
return va_arg(the_list, overaligned_int_struct);
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
// CHECK: [[NEXT:%[a-z0-9._]+]] = getelementptr inbounds i8, i8* [[CUR]], i32 16
@ -201,7 +201,7 @@ typedef struct __attribute__((packed,aligned(2))) {
long long val;
} underaligned_long_long_struct;
underaligned_long_long_struct underaligned_long_long_struct_test() {
// CHECK-LABEL: define void @underaligned_long_long_struct_test(%struct.underaligned_long_long_struct* noalias sret %agg.result)
// CHECK-LABEL: define dso_local void @underaligned_long_long_struct_test(%struct.underaligned_long_long_struct* noalias sret %agg.result)
return va_arg(the_list, underaligned_long_long_struct);
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
// CHECK: [[NEXT:%[a-z0-9._]+]] = getelementptr inbounds i8, i8* [[CUR]], i32 8
@ -217,7 +217,7 @@ typedef struct __attribute__((aligned(16))) {
long long val;
} overaligned_long_long_struct;
overaligned_long_long_struct overaligned_long_long_struct_test() {
// CHECK-LABEL: define void @overaligned_long_long_struct_test(%struct.overaligned_long_long_struct* noalias sret %agg.result)
// CHECK-LABEL: define dso_local void @overaligned_long_long_struct_test(%struct.overaligned_long_long_struct* noalias sret %agg.result)
return va_arg(the_list, overaligned_long_long_struct);
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
// CHECK: [[CUR_INT:%[a-z0-9._]+]] = ptrtoint i8* [[CUR]] to i32
@ -240,7 +240,7 @@ typedef struct {
int val __attribute__((packed,aligned(2)));
} underaligned_int_struct_member;
underaligned_int_struct_member underaligned_int_struct_member_test() {
// CHECK-LABEL: define i32 @underaligned_int_struct_member_test()
// CHECK-LABEL: define dso_local i32 @underaligned_int_struct_member_test()
return va_arg(the_list, underaligned_int_struct_member);
// CHECK: [[RETVAL:%[a-z0-9._]+]] = alloca %struct.underaligned_int_struct_member, align 2
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
@ -259,7 +259,7 @@ typedef struct {
int val __attribute__((aligned(16)));
} overaligned_int_struct_member;
overaligned_int_struct_member overaligned_int_struct_member_test() {
// CHECK-LABEL: define void @overaligned_int_struct_member_test(%struct.overaligned_int_struct_member* noalias sret %agg.result)
// CHECK-LABEL: define dso_local void @overaligned_int_struct_member_test(%struct.overaligned_int_struct_member* noalias sret %agg.result)
return va_arg(the_list, overaligned_int_struct_member);
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
// CHECK: [[CUR_INT:%[a-z0-9._]+]] = ptrtoint i8* [[CUR]] to i32
@ -279,7 +279,7 @@ typedef struct {
long long val __attribute__((packed,aligned(2)));
} underaligned_long_long_struct_member;
underaligned_long_long_struct_member underaligned_long_long_struct_member_test() {
// CHECK-LABEL: define void @underaligned_long_long_struct_member_test(%struct.underaligned_long_long_struct_member* noalias sret %agg.result)
// CHECK-LABEL: define dso_local void @underaligned_long_long_struct_member_test(%struct.underaligned_long_long_struct_member* noalias sret %agg.result)
return va_arg(the_list, underaligned_long_long_struct_member);
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
// CHECK: [[NEXT:%[a-z0-9._]+]] = getelementptr inbounds i8, i8* [[CUR]], i32 8
@ -295,7 +295,7 @@ typedef struct {
long long val __attribute__((aligned(16)));
} overaligned_long_long_struct_member;
overaligned_long_long_struct_member overaligned_long_long_struct_member_test() {
// CHECK-LABEL: define void @overaligned_long_long_struct_member_test(%struct.overaligned_long_long_struct_member* noalias sret %agg.result)
// CHECK-LABEL: define dso_local void @overaligned_long_long_struct_member_test(%struct.overaligned_long_long_struct_member* noalias sret %agg.result)
return va_arg(the_list, overaligned_long_long_struct_member);
// CHECK: [[CUR:%[a-z0-9._]+]] = load i8*, i8** getelementptr inbounds (%struct.__va_list, %struct.__va_list* @the_list, i32 0, i32 0), align 4
// CHECK: [[CUR_INT:%[a-z0-9._]+]] = ptrtoint i8* [[CUR]] to i32
@ -312,7 +312,7 @@ overaligned_long_long_struct_member overaligned_long_long_struct_member_test() {
}
void check_start(int n, ...) {
// CHECK-LABEL: define void @check_start(i32 %n, ...)
// CHECK-LABEL: define dso_local void @check_start(i32 %n, ...)
va_list the_list;
va_start(the_list, n);

36
clang/test/CodeGen/arm-vfp16-arguments.c
View File

@ -19,58 +19,58 @@ float16x4_t g4;
float16x8_t g8;
void st4(float16x4_t a) { g4 = a; }
// CHECK-SOFT: define void @st4(<2 x i32> %a.coerce)
// CHECK-SOFT: define dso_local void @st4(<2 x i32> %a.coerce)
// CHECK-SOFT: store <2 x i32> %a.coerce, <2 x i32>* bitcast (<4 x half>* @g4 to <2 x i32>*)
//
// CHECK-HARD: define arm_aapcs_vfpcc void @st4(<2 x i32> %a.coerce)
// CHECK-HARD: define dso_local arm_aapcs_vfpcc void @st4(<2 x i32> %a.coerce)
// CHECK-HARD: store <2 x i32> %a.coerce, <2 x i32>* bitcast (<4 x half>* @g4 to <2 x i32>*)
//
// CHECK-FULL: define arm_aapcs_vfpcc void @st4(<4 x half> %a)
// CHECK-FULL: define dso_local arm_aapcs_vfpcc void @st4(<4 x half> %a)
// CHECK-FULL: store <4 x half> %a, <4 x half>* @g4
float16x4_t ld4(void) { return g4; }
// CHECK-SOFT: define <2 x i32> @ld4()
// CHECK-SOFT: define dso_local <2 x i32> @ld4()
// CHECK-SOFT: %0 = load <2 x i32>, <2 x i32>* bitcast (<4 x half>* @g4 to <2 x i32>*)
// CHECK-SOFT: ret <2 x i32> %0
//
// CHECK-HARD: define arm_aapcs_vfpcc <2 x i32> @ld4()
// CHECK-HARD: define dso_local arm_aapcs_vfpcc <2 x i32> @ld4()
// CHECK-HARD: %0 = load <2 x i32>, <2 x i32>* bitcast (<4 x half>* @g4 to <2 x i32>*)
// CHECK-HARD: ret <2 x i32> %0
//
// CHECK-FULL: define arm_aapcs_vfpcc <4 x half> @ld4()
// CHECK-FULL: define dso_local arm_aapcs_vfpcc <4 x half> @ld4()
// CHECK-FULL: %0 = load <4 x half>, <4 x half>* @g4
// CHECK-FULL: ret <4 x half> %0
void st8(float16x8_t a) { g8 = a; }
// CHECK-SOFT: define void @st8(<4 x i32> %a.coerce)
// CHECK-SOFT: define dso_local void @st8(<4 x i32> %a.coerce)
// CHECK-SOFT: store <4 x i32> %a.coerce, <4 x i32>* bitcast (<8 x half>* @g8 to <4 x i32>*)
//
// CHECK-HARD: define arm_aapcs_vfpcc void @st8(<4 x i32> %a.coerce)
// CHECK-HARD: define dso_local arm_aapcs_vfpcc void @st8(<4 x i32> %a.coerce)
// CHECK-HARD: store <4 x i32> %a.coerce, <4 x i32>* bitcast (<8 x half>* @g8 to <4 x i32>*)
//
// CHECK-FULL: define arm_aapcs_vfpcc void @st8(<8 x half> %a)
// CHECK-FULL: define dso_local arm_aapcs_vfpcc void @st8(<8 x half> %a)
// CHECK-FULL: store <8 x half> %a, <8 x half>* @g8
float16x8_t ld8(void) { return g8; }
// CHECK-SOFT: define <4 x i32> @ld8()
// CHECK-SOFT: define dso_local <4 x i32> @ld8()
// CHECK-SOFT: %0 = load <4 x i32>, <4 x i32>* bitcast (<8 x half>* @g8 to <4 x i32>*)
// CHECK-SOFT: ret <4 x i32> %0
//
// CHECK-HARD: define arm_aapcs_vfpcc <4 x i32> @ld8()
// CHECK-HARD: define dso_local arm_aapcs_vfpcc <4 x i32> @ld8()
// CHECK-HARD: %0 = load <4 x i32>, <4 x i32>* bitcast (<8 x half>* @g8 to <4 x i32>*)
// CHECK-HARD: ret <4 x i32> %0
//
// CHECK-FULL: define arm_aapcs_vfpcc <8 x half> @ld8()
// CHECK-FULL: define dso_local arm_aapcs_vfpcc <8 x half> @ld8()
// CHECK-FULL: %0 = load <8 x half>, <8 x half>* @g8
// CHECK-FULL: ret <8 x half> %0
void test_hfa(hfa_t a) {}
// CHECK-SOFT: define void @test_hfa([2 x i64] %a.coerce)
// CHECK-HARD: define arm_aapcs_vfpcc void @test_hfa([2 x <2 x i32>] %a.coerce)
// CHECK-FULL: define arm_aapcs_vfpcc void @test_hfa(%struct.hfa_t %a.coerce)
// CHECK-SOFT: define dso_local void @test_hfa([2 x i64] %a.coerce)
// CHECK-HARD: define dso_local arm_aapcs_vfpcc void @test_hfa([2 x <2 x i32>] %a.coerce)
// CHECK-FULL: define dso_local arm_aapcs_vfpcc void @test_hfa(%struct.hfa_t %a.coerce)
hfa_t ghfa;
hfa_t test_ret_hfa(void) { return ghfa; }
// CHECK-SOFT: define void @test_ret_hfa(%struct.hfa_t* noalias nocapture sret %agg.result)
// CHECK-HARD: define arm_aapcs_vfpcc [2 x <2 x i32>] @test_ret_hfa()
// CHECK-FULL: define arm_aapcs_vfpcc %struct.hfa_t @test_ret_hfa()
// CHECK-SOFT: define dso_local void @test_ret_hfa(%struct.hfa_t* noalias nocapture sret %agg.result)
// CHECK-HARD: define dso_local arm_aapcs_vfpcc [2 x <2 x i32>] @test_ret_hfa()
// CHECK-FULL: define dso_local arm_aapcs_vfpcc %struct.hfa_t @test_ret_hfa()

30
clang/test/CodeGen/arm-vfp16-arguments2.cpp
View File

@ -37,27 +37,27 @@ struct S5 : B1 {
B1 M[1];
};
// CHECK-SOFT: define void @_Z2f12S1(%struct.S1* noalias nocapture sret %agg.result, [2 x i64] %s1.coerce)
// CHECK-HARD: define arm_aapcs_vfpcc [2 x <2 x i32>] @_Z2f12S1([2 x <2 x i32>] returned %s1.coerce)
// CHECK-FULL: define arm_aapcs_vfpcc %struct.S1 @_Z2f12S1(%struct.S1 returned %s1.coerce)
// CHECK-SOFT: define dso_local void @_Z2f12S1(%struct.S1* noalias nocapture sret %agg.result, [2 x i64] %s1.coerce)
// CHECK-HARD: define dso_local arm_aapcs_vfpcc [2 x <2 x i32>] @_Z2f12S1([2 x <2 x i32>] returned %s1.coerce)
// CHECK-FULL: define dso_local arm_aapcs_vfpcc %struct.S1 @_Z2f12S1(%struct.S1 returned %s1.coerce)
struct S1 f1(struct S1 s1) { return s1; }
// CHECK-SOFT: define void @_Z2f22S2(%struct.S2* noalias nocapture sret %agg.result, [4 x i32] %s2.coerce)
// CHECK-HARD: define arm_aapcs_vfpcc [2 x <2 x i32>] @_Z2f22S2([2 x <2 x i32>] returned %s2.coerce)
// CHECK-FULL: define arm_aapcs_vfpcc %struct.S2 @_Z2f22S2(%struct.S2 returned %s2.coerce)
// CHECK-SOFT: define dso_local void @_Z2f22S2(%struct.S2* noalias nocapture sret %agg.result, [4 x i32] %s2.coerce)
// CHECK-HARD: define dso_local arm_aapcs_vfpcc [2 x <2 x i32>] @_Z2f22S2([2 x <2 x i32>] returned %s2.coerce)
// CHECK-FULL: define dso_local arm_aapcs_vfpcc %struct.S2 @_Z2f22S2(%struct.S2 returned %s2.coerce)
struct S2 f2(struct S2 s2) { return s2; }
// CHECK-SOFT: define void @_Z2f32S3(%struct.S3* noalias nocapture sret %agg.result, [2 x i64] %s3.coerce)
// CHECK-HARD: define arm_aapcs_vfpcc [2 x <2 x i32>] @_Z2f32S3([2 x <2 x i32>] returned %s3.coerce)
// CHECK-FULL: define arm_aapcs_vfpcc %struct.S3 @_Z2f32S3(%struct.S3 returned %s3.coerce)
// CHECK-SOFT: define dso_local void @_Z2f32S3(%struct.S3* noalias nocapture sret %agg.result, [2 x i64] %s3.coerce)
// CHECK-HARD: define dso_local arm_aapcs_vfpcc [2 x <2 x i32>] @_Z2f32S3([2 x <2 x i32>] returned %s3.coerce)
// CHECK-FULL: define dso_local arm_aapcs_vfpcc %struct.S3 @_Z2f32S3(%struct.S3 returned %s3.coerce)
struct S3 f3(struct S3 s3) { return s3; }
// CHECK-SOFT: define void @_Z2f42S4(%struct.S4* noalias nocapture sret %agg.result, [2 x i64] %s4.coerce)
// CHECK-HARD: define arm_aapcs_vfpcc [2 x <2 x i32>] @_Z2f42S4([2 x <2 x i32>] returned %s4.coerce)
// CHECK-FULL: define arm_aapcs_vfpcc %struct.S4 @_Z2f42S4(%struct.S4 returned %s4.coerce)
// CHECK-SOFT: define dso_local void @_Z2f42S4(%struct.S4* noalias nocapture sret %agg.result, [2 x i64] %s4.coerce)
// CHECK-HARD: define dso_local arm_aapcs_vfpcc [2 x <2 x i32>] @_Z2f42S4([2 x <2 x i32>] returned %s4.coerce)
// CHECK-FULL: define dso_local arm_aapcs_vfpcc %struct.S4 @_Z2f42S4(%struct.S4 returned %s4.coerce)
struct S4 f4(struct S4 s4) { return s4; }
// CHECK-SOFT: define void @_Z2f52S5(%struct.S5* noalias nocapture sret %agg.result, [2 x i64] %s5.coerce)
// CHECK-HARD: define arm_aapcs_vfpcc %struct.S5 @_Z2f52S5(%struct.S5 returned %s5.coerce)
// CHECK-FULL: define arm_aapcs_vfpcc %struct.S5 @_Z2f52S5(%struct.S5 returned %s5.coerce)
// CHECK-SOFT: define dso_local void @_Z2f52S5(%struct.S5* noalias nocapture sret %agg.result, [2 x i64] %s5.coerce)
// CHECK-HARD: define dso_local arm_aapcs_vfpcc %struct.S5 @_Z2f52S5(%struct.S5 returned %s5.coerce)
// CHECK-FULL: define dso_local arm_aapcs_vfpcc %struct.S5 @_Z2f52S5(%struct.S5 returned %s5.coerce)
struct S5 f5(struct S5 s5) { return s5; }

6
clang/test/CodeGen/arm64-aapcs-arguments.c
View File

@ -37,15 +37,15 @@ void test4(BigHFA v0_v2, BigHFA v3_v5, BigHFA sp, double sp48, BigHFA sp64) {
// It's the job of the argument *consumer* to perform the required sign & zero
// extensions under AAPCS. There shouldn't be
// CHECK: define i8 @test5(i8 %a, i16 %b)
// CHECK: define dso_local i8 @test5(i8 %a, i16 %b)
unsigned char test5(unsigned char a, signed short b) {
}
// __fp16 can be used as a function argument or return type (ACLE 2.0)
// CHECK: define half @test_half(half %{{.*}})
// CHECK: define dso_local half @test_half(half %{{.*}})
__fp16 test_half(__fp16 A) { }
// __fp16 is a base type for homogeneous floating-point aggregates for AArch64 (but not 32-bit ARM).
// CHECK: define %struct.HFA_half @test_half_hfa([4 x half] %{{.*}})
// CHECK: define dso_local %struct.HFA_half @test_half_hfa([4 x half] %{{.*}})
struct HFA_half { __fp16 a[4]; };
struct HFA_half test_half_hfa(struct HFA_half A) { }

26
clang/test/CodeGen/arm64-mte.c
View File

@ -3,7 +3,7 @@
#include <stddef.h>
#include <arm_acle.h>
// CHECK-LABEL: define i32* @create_tag1
// CHECK-LABEL: define dso_local i32* @create_tag1
int *create_tag1(int *a, unsigned b) {
// CHECK: [[T0:%[0-9]+]] = bitcast i32* %a to i8*
// CHECK: [[T1:%[0-9]+]] = zext i32 %b to i64
@ -12,7 +12,7 @@ int *create_tag1(int *a, unsigned b) {
return __arm_mte_create_random_tag(a,b);
}
// CHECK-LABEL: define i16* @create_tag2
// CHECK-LABEL: define dso_local i16* @create_tag2
short *create_tag2(short *a, unsigned b) {
// CHECK: [[T0:%[0-9]+]] = bitcast i16* %a to i8*
// CHECK: [[T1:%[0-9]+]] = zext i32 %b to i64
@ -21,7 +21,7 @@ short *create_tag2(short *a, unsigned b) {
return __arm_mte_create_random_tag(a,b);
}
// CHECK-LABEL: define i8* @create_tag3
// CHECK-LABEL: define dso_local i8* @create_tag3
char *create_tag3(char *a, unsigned b) {
// CHECK: [[T1:%[0-9]+]] = zext i32 %b to i64
// CHECK: [[T2:%[0-9]+]] = tail call i8* @llvm.aarch64.irg(i8* %a, i64 [[T1]])
@ -29,13 +29,13 @@ char *create_tag3(char *a, unsigned b) {
return __arm_mte_create_random_tag(a,b);
}
// CHECK-LABEL: define i8* @increment_tag1
// CHECK-LABEL: define dso_local i8* @increment_tag1
char *increment_tag1(char *a) {
// CHECK: call i8* @llvm.aarch64.addg(i8* %a, i64 3)
return __arm_mte_increment_tag(a,3);
}
// CHECK-LABEL: define i16* @increment_tag2
// CHECK-LABEL: define dso_local i16* @increment_tag2
short *increment_tag2(short *a) {
// CHECK: [[T0:%[0-9]+]] = bitcast i16* %a to i8*
// CHECK: [[T1:%[0-9]+]] = tail call i8* @llvm.aarch64.addg(i8* [[T0]], i64 3)
@ -43,7 +43,7 @@ short *increment_tag2(short *a) {
return __arm_mte_increment_tag(a,3);
}
// CHECK-LABEL: define i32 @exclude_tag
// CHECK-LABEL: define dso_local i32 @exclude_tag
unsigned exclude_tag(int *a, unsigned m) {
// CHECK: [[T0:%[0-9]+]] = zext i32 %m to i64
// CHECK: [[T1:%[0-9]+]] = bitcast i32* %a to i8*
@ -52,7 +52,7 @@ unsigned exclude_tag(int *a, unsigned m) {
return __arm_mte_exclude_tag(a, m);
}
// CHECK-LABEL: define i32* @get_tag1
// CHECK-LABEL: define dso_local i32* @get_tag1
int *get_tag1(int *a) {
// CHECK: [[T0:%[0-9]+]] = bitcast i32* %a to i8*
// CHECK: [[T1:%[0-9]+]] = tail call i8* @llvm.aarch64.ldg(i8* [[T0]], i8* [[T0]])
@ -60,7 +60,7 @@ int *get_tag1(int *a) {
return __arm_mte_get_tag(a);
}
// CHECK-LABEL: define i16* @get_tag2
// CHECK-LABEL: define dso_local i16* @get_tag2
short *get_tag2(short *a) {
// CHECK: [[T0:%[0-9]+]] = bitcast i16* %a to i8*
// CHECK: [[T1:%[0-9]+]] = tail call i8* @llvm.aarch64.ldg(i8* [[T0]], i8* [[T0]])
@ -68,14 +68,14 @@ short *get_tag2(short *a) {
return __arm_mte_get_tag(a);
}
// CHECK-LABEL: define void @set_tag1
// CHECK-LABEL: define dso_local void @set_tag1
void set_tag1(int *a) {
// CHECK: [[T0:%[0-9]+]] = bitcast i32* %a to i8*
// CHECK: tail call void @llvm.aarch64.stg(i8* [[T0]], i8* [[T0]])
__arm_mte_set_tag(a);
}
// CHECK-LABEL: define i64 @subtract_pointers
// CHECK-LABEL: define dso_local i64 @subtract_pointers
ptrdiff_t subtract_pointers(int *a, int *b) {
// CHECK: [[T0:%[0-9]+]] = bitcast i32* %a to i8*
// CHECK: [[T1:%[0-9]+]] = bitcast i32* %b to i8*
@ -84,7 +84,7 @@ ptrdiff_t subtract_pointers(int *a, int *b) {
return __arm_mte_ptrdiff(a, b);
}
// CHECK-LABEL: define i64 @subtract_pointers_null_1
// CHECK-LABEL: define dso_local i64 @subtract_pointers_null_1
ptrdiff_t subtract_pointers_null_1(int *a) {
// CHECK: [[T0:%[0-9]+]] = bitcast i32* %a to i8*
// CHECK: [[T1:%[0-9]+]] = tail call i64 @llvm.aarch64.subp(i8* [[T0]], i8* null)
@ -92,7 +92,7 @@ ptrdiff_t subtract_pointers_null_1(int *a) {
return __arm_mte_ptrdiff(a, NULL);
}
// CHECK-LABEL: define i64 @subtract_pointers_null_2
// CHECK-LABEL: define dso_local i64 @subtract_pointers_null_2
ptrdiff_t subtract_pointers_null_2(int *a) {
// CHECK: [[T0:%[0-9]+]] = bitcast i32* %a to i8*
// CHECK: [[T1:%[0-9]+]] = tail call i64 @llvm.aarch64.subp(i8* null, i8* [[T0]])
@ -101,7 +101,7 @@ ptrdiff_t subtract_pointers_null_2(int *a) {
}
// Check arithmetic promotion on return type
// CHECK-LABEL: define i32 @subtract_pointers4
// CHECK-LABEL: define dso_local i32 @subtract_pointers4
int subtract_pointers4(void* a, void *b) {
// CHECK: [[T0:%[0-9]+]] = tail call i64 @llvm.aarch64.subp(i8* %a, i8* %b)
// CHECK-NEXT: %cmp = icmp slt i64 [[T0]], 1

2
clang/test/CodeGen/arm_function_epilog.cpp
View File

@ -7,7 +7,7 @@ struct Vec2 {
};
};
// CHECK: define arm_aapcs_vfpcc %struct.Vec2 @_Z7getVec2v()
// CHECK: define dso_local arm_aapcs_vfpcc %struct.Vec2 @_Z7getVec2v()
// CHECK: ret %struct.Vec2
Vec2 getVec2() {
Vec2 out;

2
clang/test/CodeGen/asm-label.c
View File

@ -11,7 +11,7 @@ int *test(void) {
}
// LINUX: @bar = internal global i32 0
// LINUX: @foo = common global i32 0
// LINUX: @foo = common dso_local global i32 0
// LINUX: declare i8* @alias(i32)
// DARWIN: @"\01bar" = internal global i32 0

4
clang/test/CodeGen/assign.c
View File

@ -2,7 +2,7 @@
// Check that we don't generate unnecessary reloads.
//
// CHECK-LABEL: define void @f0()
// CHECK-LABEL: define dso_local void @f0()
// CHECK: [[x_0:%.*]] = alloca i32, align 4
// CHECK-NEXT: [[y_0:%.*]] = alloca i32, align 4
// CHECK-NEXT: store i32 1, i32* [[x_0]]
@ -18,7 +18,7 @@ void f0() {
// This used to test that we generate reloads for volatile access,
// but that does not appear to be correct behavior for C.
//
// CHECK-LABEL: define void @f1()
// CHECK-LABEL: define dso_local void @f1()
// CHECK: [[x_1:%.*]] = alloca i32, align 4
// CHECK-NEXT: [[y_1:%.*]] = alloca i32, align 4
// CHECK-NEXT: store volatile i32 1, i32* [[x_1]]

10
clang/test/CodeGen/atomics-inlining.c
View File

@ -48,7 +48,7 @@ void test1(void) {
// ARM: call{{.*}} void @__atomic_load(i32 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0)
// ARM: call{{.*}} void @__atomic_store(i32 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0)
// PPC32-LABEL: define void @test1
// PPC32-LABEL: define dso_local void @test1
// PPC32: = load atomic i8, i8* @c1 seq_cst
// PPC32: store atomic i8 {{.*}}, i8* @c1 seq_cst
// PPC32: = load atomic i16, i16* @s1 seq_cst
@ -60,7 +60,7 @@ void test1(void) {
// PPC32: call void @__atomic_load(i32 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0)
// PPC32: call void @__atomic_store(i32 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0)
// PPC64-LABEL: define void @test1
// PPC64-LABEL: define dso_local void @test1
// PPC64: = load atomic i8, i8* @c1 seq_cst
// PPC64: store atomic i8 {{.*}}, i8* @c1 seq_cst
// PPC64: = load atomic i16, i16* @s1 seq_cst
@ -72,7 +72,7 @@ void test1(void) {
// PPC64: call void @__atomic_load(i64 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0)
// PPC64: call void @__atomic_store(i64 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0)
// MIPS32-LABEL: define void @test1
// MIPS32-LABEL: define dso_local void @test1
// MIPS32: = load atomic i8, i8* @c1 seq_cst
// MIPS32: store atomic i8 {{.*}}, i8* @c1 seq_cst
// MIPS32: = load atomic i16, i16* @s1 seq_cst
@ -84,7 +84,7 @@ void test1(void) {
// MIPS32: call void @__atomic_load(i32 signext 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0)
// MIPS32: call void @__atomic_store(i32 signext 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0)
// MIPS64-LABEL: define void @test1
// MIPS64-LABEL: define dso_local void @test1
// MIPS64: = load atomic i8, i8* @c1 seq_cst
// MIPS64: store atomic i8 {{.*}}, i8* @c1 seq_cst
// MIPS64: = load atomic i16, i16* @s1 seq_cst
@ -96,7 +96,7 @@ void test1(void) {
// MIPS64: call void @__atomic_load(i64 zeroext 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0)
// MIPS64: call void @__atomic_store(i64 zeroext 100, i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8], [100 x i8]* @a2, i32 0, i32 0)
// SPARC-LABEL: define void @test1
// SPARC-LABEL: define dso_local void @test1
// SPARC: = load atomic i8, i8* @c1 seq_cst
// SPARC: store atomic i8 {{.*}}, i8* @c1 seq_cst
// SPARC: = load atomic i16, i16* @s1 seq_cst

2
clang/test/CodeGen/attr-msp430.c
View File

@ -4,7 +4,7 @@ __attribute__((interrupt(1))) void foo(void) {}
// CHECK: @llvm.used
// CHECK-SAME: @foo
// CHECK: define msp430_intrcc void @foo() #0
// CHECK: define dso_local msp430_intrcc void @foo() #0
// CHECK: attributes #0
// CHECK-SAME: noinline
// CHECK-SAME: "interrupt"="1"

52
clang/test/CodeGen/attr-target-mv.c
View File

@ -47,20 +47,20 @@ void bar5() {
fwd_decl_avx();
}
// LINUX: @foo.ifunc = weak_odr ifunc i32 (), i32 ()* ()* @foo.resolver
// LINUX: @foo_inline.ifunc = weak_odr ifunc i32 (), i32 ()* ()* @foo_inline.resolver
// LINUX: @foo_decls.ifunc = weak_odr ifunc void (), void ()* ()* @foo_decls.resolver
// LINUX: @foo_multi.ifunc = weak_odr ifunc void (i32, double), void (i32, double)* ()* @foo_multi.resolver
// LINUX: @fwd_decl_default.ifunc = weak_odr ifunc i32 (), i32 ()* ()* @fwd_decl_default.resolver
// LINUX: @fwd_decl_avx.ifunc = weak_odr ifunc i32 (), i32 ()* ()* @fwd_decl_avx.resolver
// LINUX: @foo.ifunc = weak_odr dso_local ifunc i32 (), i32 ()* ()* @foo.resolver
// LINUX: @foo_inline.ifunc = weak_odr dso_local ifunc i32 (), i32 ()* ()* @foo_inline.resolver
// LINUX: @foo_decls.ifunc = weak_odr dso_local ifunc void (), void ()* ()* @foo_decls.resolver
// LINUX: @foo_multi.ifunc = weak_odr dso_local ifunc void (i32, double), void (i32, double)* ()* @foo_multi.resolver
// LINUX: @fwd_decl_default.ifunc = weak_odr dso_local ifunc i32 (), i32 ()* ()* @fwd_decl_default.resolver
// LINUX: @fwd_decl_avx.ifunc = weak_odr dso_local ifunc i32 (), i32 ()* ()* @fwd_decl_avx.resolver
// LINUX: define i32 @foo.sse4.2()
// LINUX: define dso_local i32 @foo.sse4.2()
// LINUX: ret i32 0
// LINUX: define i32 @foo.arch_ivybridge()
// LINUX: define dso_local i32 @foo.arch_ivybridge()
// LINUX: ret i32 1
// LINUX: define i32 @foo()
// LINUX: define dso_local i32 @foo()
// LINUX: ret i32 2
// LINUX: define i32 @bar()
// LINUX: define dso_local i32 @bar()
// LINUX: call i32 @foo.ifunc()
// WINDOWS: define dso_local i32 @foo.sse4.2()
@ -86,7 +86,7 @@ void bar5() {
// WINDOWS: call i32 @foo.sse4.2
// WINDOWS: call i32 @foo
// LINUX: define i32 @bar2()
// LINUX: define dso_local i32 @bar2()
// LINUX: call i32 @foo_inline.ifunc()
// WINDOWS: define dso_local i32 @bar2()
@ -106,7 +106,7 @@ void bar5() {
// WINDOWS: call i32 @foo_inline.sse4.2
// WINDOWS: call i32 @foo_inline
// LINUX: define void @bar3()
// LINUX: define dso_local void @bar3()
// LINUX: call void @foo_decls.ifunc()
// WINDOWS: define dso_local void @bar3()
@ -120,7 +120,7 @@ void bar5() {
// WINDOWS: call void @foo_decls.sse4.2
// WINDOWS: call void @foo_decls
// LINUX: define void @bar4()
// LINUX: define dso_local void @bar4()
// LINUX: call void @foo_multi.ifunc(i32 1, double 5.{{[0+e]*}})
// WINDOWS: define dso_local void @bar4()
@ -156,11 +156,11 @@ void bar5() {
// WINDOWS: call void @foo_multi(i32 %0, double %1)
// WINDOWS-NEXT: ret void
// LINUX: define i32 @fwd_decl_default()
// LINUX: define dso_local i32 @fwd_decl_default()
// LINUX: ret i32 2
// LINUX: define i32 @fwd_decl_avx.avx()
// LINUX: define dso_local i32 @fwd_decl_avx.avx()
// LINUX: ret i32 2
// LINUX: define i32 @fwd_decl_avx()
// LINUX: define dso_local i32 @fwd_decl_avx()
// LINUX: ret i32 2
// WINDOWS: define dso_local i32 @fwd_decl_default()
@ -170,7 +170,7 @@ void bar5() {
// WINDOWS: define dso_local i32 @fwd_decl_avx()
// WINDOWS: ret i32 2
// LINUX: define void @bar5()
// LINUX: define dso_local void @bar5()
// LINUX: call i32 @fwd_decl_default.ifunc()
// LINUX: call i32 @fwd_decl_avx.ifunc()
@ -197,7 +197,7 @@ void bar5() {
// LINUX: declare i32 @foo.arch_sandybridge()
// WINDOWS: declare dso_local i32 @foo.arch_sandybridge()
// LINUX: define linkonce i32 @foo_inline.sse4.2()
// LINUX: define linkonce dso_local i32 @foo_inline.sse4.2()
// LINUX: ret i32 0
// WINDOWS: define linkonce_odr dso_local i32 @foo_inline.sse4.2()
@ -207,9 +207,9 @@ void bar5() {
// WINDOWS: declare dso_local i32 @foo_inline.arch_sandybridge()
// LINUX: define linkonce i32 @foo_inline.arch_ivybridge()
// LINUX: define linkonce dso_local i32 @foo_inline.arch_ivybridge()
// LINUX: ret i32 1
// LINUX: define linkonce i32 @foo_inline()
// LINUX: define linkonce dso_local i32 @foo_inline()
// LINUX: ret i32 2
// WINDOWS: define linkonce_odr dso_local i32 @foo_inline.arch_ivybridge()
@ -217,16 +217,16 @@ void bar5() {
// WINDOWS: define linkonce_odr dso_local i32 @foo_inline()
// WINDOWS: ret i32 2
// LINUX: define linkonce void @foo_decls()
// LINUX: define linkonce void @foo_decls.sse4.2()
// LINUX: define linkonce dso_local void @foo_decls()
// LINUX: define linkonce dso_local void @foo_decls.sse4.2()
// WINDOWS: define linkonce_odr dso_local void @foo_decls()
// WINDOWS: define linkonce_odr dso_local void @foo_decls.sse4.2()
// LINUX: define linkonce void @foo_multi(i32 %{{[^,]+}}, double %{{[^\)]+}})
// LINUX: define linkonce void @foo_multi.avx_sse4.2(i32 %{{[^,]+}}, double %{{[^\)]+}})
// LINUX: define linkonce void @foo_multi.fma4_sse4.2(i32 %{{[^,]+}}, double %{{[^\)]+}})
// LINUX: define linkonce void @foo_multi.arch_ivybridge_fma4_sse4.2(i32 %{{[^,]+}}, double %{{[^\)]+}})
// LINUX: define linkonce dso_local void @foo_multi(i32 %{{[^,]+}}, double %{{[^\)]+}})
// LINUX: define linkonce dso_local void @foo_multi.avx_sse4.2(i32 %{{[^,]+}}, double %{{[^\)]+}})
// LINUX: define linkonce dso_local void @foo_multi.fma4_sse4.2(i32 %{{[^,]+}}, double %{{[^\)]+}})
// LINUX: define linkonce dso_local void @foo_multi.arch_ivybridge_fma4_sse4.2(i32 %{{[^,]+}}, double %{{[^\)]+}})
// WINDOWS: define linkonce_odr dso_local void @foo_multi(i32 %{{[^,]+}}, double %{{[^\)]+}})
// WINDOWS: define linkonce_odr dso_local void @foo_multi.avx_sse4.2(i32 %{{[^,]+}}, double %{{[^\)]+}})

4
clang/test/CodeGen/attr-weakref.c
View File

@ -8,7 +8,7 @@ void test1_h(void) {
test1_g();
}
// CHECK-LABEL: define void @test2_f()
// CHECK-LABEL: define dso_local void @test2_f()
void test2_f(void) {}
static void test2_g(void) __attribute__((weakref("test2_f")));
void test2_h(void) {
@ -25,7 +25,7 @@ void test3_h(void) {
test3_g();
}
// CHECK-LABEL: define void @test4_f()
// CHECK-LABEL: define dso_local void @test4_f()
void test4_f(void);
static void test4_g(void) __attribute__((weakref("test4_f")));
void test4_h(void) {

4
clang/test/CodeGen/attr-weakref2.c
View File

@ -8,7 +8,7 @@ int test1_h(void) {
return test1_g;
}
// CHECK: @test2_f = common global i32 0, align 4
// CHECK: @test2_f = common dso_local global i32 0, align 4
int test2_f;
static int test2_g __attribute__((weakref("test2_f")));
int test2_h(void) {
@ -25,7 +25,7 @@ int test3_h(void) {
return test3_g;
}
// CHECK: @test4_f = common global i32 0, align 4
// CHECK: @test4_f = common dso_local global i32 0, align 4
extern int test4_f;
static int test4_g __attribute__((weakref("test4_f")));
int test4_h(void) {

8
clang/test/CodeGen/attr-x86-interrupt.c
View File

@ -13,13 +13,13 @@ typedef __UINT32_TYPE__ uword;
__attribute__((interrupt)) void foo7(int *a, uword b) {}
__attribute__((interrupt)) void foo8(int *a) {}
// X86_64_LINUX: @llvm.used = appending global [2 x i8*] [i8* bitcast (void (i32*, i64)* @foo7 to i8*), i8* bitcast (void (i32*)* @foo8 to i8*)], section "llvm.metadata"
// X86_64_LINUX: define x86_intrcc void @foo7(i32* %{{.+}}, i64 %{{.+}})
// X86_64_LINUX: define x86_intrcc void @foo8(i32* %{{.+}})
// X86_64_LINUX: define dso_local x86_intrcc void @foo7(i32* %{{.+}}, i64 %{{.+}})
// X86_64_LINUX: define dso_local x86_intrcc void @foo8(i32* %{{.+}})
// X86_64_LINUX: "disable-tail-calls"="true"
// X86_64_LINUX-NOT: "disable-tail-calls"="false"
// X86_LINUX: @llvm.used = appending global [2 x i8*] [i8* bitcast (void (i32*, i32)* @foo7 to i8*), i8* bitcast (void (i32*)* @foo8 to i8*)], section "llvm.metadata"
// X86_LINUX: define x86_intrcc void @foo7(i32* %{{.+}}, i32 %{{.+}})
// X86_LINUX: define x86_intrcc void @foo8(i32* %{{.+}})
// X86_LINUX: define dso_local x86_intrcc void @foo7(i32* %{{.+}}, i32 %{{.+}})
// X86_LINUX: define dso_local x86_intrcc void @foo8(i32* %{{.+}})
// X86_LINUX: "disable-tail-calls"="true"
// X86_LINUX-NOT: "disable-tail-calls"="false"
// X86_64_WIN: @llvm.used = appending global [2 x i8*] [i8* bitcast (void (i32*, i64)* @foo7 to i8*), i8* bitcast (void (i32*)* @foo8 to i8*)], section "llvm.metadata"

32
clang/test/CodeGen/attributes.c
View File

@ -1,10 +1,10 @@
// RUN: %clang_cc1 -emit-llvm -fcf-protection=branch -triple i386-linux-gnu -o %t %s
// RUN: FileCheck --input-file=%t %s
// CHECK: @t5 = weak global i32 2
// CHECK: @t5 = weak dso_local global i32 2
int t5 __attribute__((weak)) = 2;
// CHECK: @t13 = global %struct.s0 zeroinitializer, section "SECT"
// CHECK: @t13 = dso_local global %struct.s0 zeroinitializer, section "SECT"
struct s0 { int x; };
struct s0 t13 __attribute__((section("SECT"))) = { 0 };
@ -13,7 +13,7 @@ void t14(void) {
static int x __attribute__((section("SECT"))) = 0;
}
// CHECK: @t18 = global i32 1, align 4
// CHECK: @t18 = dso_local global i32 1, align 4
extern int t18 __attribute__((weak_import));
int t18 = 1;
@ -23,10 +23,10 @@ extern int t16 __attribute__((weak_import));
// CHECK: @t6 = common protected global i32 0
int t6 __attribute__((visibility("protected")));
// CHECK: @t12 = global i32 0, section "SECT"
// CHECK: @t12 = dso_local global i32 0, section "SECT"
int t12 __attribute__((section("SECT")));
// CHECK: @t9 = weak alias void (...), bitcast (void ()* @__t8 to void (...)*)
// CHECK: @t9 = weak dso_local alias void (...), bitcast (void ()* @__t8 to void (...)*)
void __t8() {}
void t9() __attribute__((weak, alias("__t8")));
@ -36,15 +36,15 @@ int t17() {
return t15() + t16;
}
// CHECK: define void @t1() [[NR:#[0-9]+]] {
// CHECK: define dso_local void @t1() [[NR:#[0-9]+]] {
void t1() __attribute__((noreturn));
void t1() { while (1) {} }
// CHECK: define void @t2() [[NUW:#[0-9]+]] {
// CHECK: define dso_local void @t2() [[NUW:#[0-9]+]] {
void t2() __attribute__((nothrow));
void t2() {}
// CHECK: define weak void @t3() [[NUW]] {
// CHECK: define weak dso_local void @t3() [[NUW]] {
void t3() __attribute__((weak));
void t3() {}
@ -52,30 +52,30 @@ void t3() {}
void t4() __attribute__((visibility("hidden")));
void t4() {}
// CHECK: define void @t7() [[NR]] {
// CHECK: define dso_local void @t7() [[NR]] {
void t7() __attribute__((noreturn, nothrow));
void t7() { while (1) {} }
// CHECK: define void @t72() [[COLDDEF:#[0-9]+]] {
// CHECK: define dso_local void @t72() [[COLDDEF:#[0-9]+]] {
void t71(void) __attribute__((cold));
void t72() __attribute__((cold));
void t72() { t71(); }
// CHECK: call void @t71() [[COLDSITE:#[0-9]+]]
// CHECK: declare void @t71() [[COLDDECL:#[0-9]+]]
// CHECK: define void @t10() [[NUW]] section "SECT" {
// CHECK: define dso_local void @t10() [[NUW]] section "SECT" {
void t10(void) __attribute__((section("SECT")));
void t10(void) {}
// CHECK: define void @t11() [[NUW]] section "SECT" {
// CHECK: define dso_local void @t11() [[NUW]] section "SECT" {
void __attribute__((section("SECT"))) t11(void) {}
// CHECK: define i32 @t19() [[NUW]] {
// CHECK: define dso_local i32 @t19() [[NUW]] {
extern int t19(void) __attribute__((weak_import));
int t19(void) {
return 10;
}
// CHECK:define void @t20() [[NUW]] {
// CHECK:define dso_local void @t20() [[NUW]] {
// CHECK: call void @abort()
// CHECK-NEXT: unreachable
void t20(void) {
@ -95,9 +95,9 @@ void t21(void) {
void __attribute__((section(".foo"))) t22(void);
void __attribute__((section(".bar"))) t22(void) {}
// CHECK: define void @t22() [[NUW]] section ".bar"
// CHECK: define dso_local void @t22() [[NUW]] section ".bar"
// CHECK: define void @t23() [[NOCF_CHECK_FUNC:#[0-9]+]]
// CHECK: define dso_local void @t23() [[NOCF_CHECK_FUNC:#[0-9]+]]
void __attribute__((nocf_check)) t23(void) {}
// CHECK: call void %{{[a-z0-9]+}}() [[NOCF_CHECK_CALL:#[0-9]+]]

30
clang/test/CodeGen/avr-builtins.c
View File

@ -8,99 +8,99 @@ unsigned char bitrev8(unsigned char data) {
return __builtin_bitreverse8(data);
}
// CHECK: define zeroext i8 @bitrev8
// CHECK: define dso_local zeroext i8 @bitrev8
// CHECK: i8 @llvm.bitreverse.i8(i8
unsigned int bitrev16(unsigned int data) {
return __builtin_bitreverse16(data);
}
// CHECK: define i16 @bitrev16
// CHECK: define dso_local i16 @bitrev16
// CHECK: i16 @llvm.bitreverse.i16(i16
unsigned long bitrev32(unsigned long data) {
return __builtin_bitreverse32(data);
}
// CHECK: define i32 @bitrev32
// CHECK: define dso_local i32 @bitrev32
// CHECK: i32 @llvm.bitreverse.i32(i32
unsigned long long bitrev64(unsigned long long data) {
return __builtin_bitreverse64(data);
}
// CHECK: define i64 @bitrev64
// CHECK: define dso_local i64 @bitrev64
// CHECK: i64 @llvm.bitreverse.i64(i64
unsigned char rotleft8(unsigned char x, unsigned char y) {
return __builtin_rotateleft8(x, y);
}
// CHECK: define zeroext i8 @rotleft8
// CHECK: define dso_local zeroext i8 @rotleft8
// CHECK: i8 @llvm.fshl.i8(i8
unsigned int rotleft16(unsigned int x, unsigned int y) {
return __builtin_rotateleft16(x, y);
}
// CHECK: define i16 @rotleft16
// CHECK: define dso_local i16 @rotleft16
// CHECK: i16 @llvm.fshl.i16(i16
unsigned long rotleft32(unsigned long x, unsigned long y) {
return __builtin_rotateleft32(x, y);
}
// CHECK: define i32 @rotleft32
// CHECK: define dso_local i32 @rotleft32
// CHECK: i32 @llvm.fshl.i32(i32
unsigned long long rotleft64(unsigned long long x, unsigned long long y) {
return __builtin_rotateleft64(x, y);
}
// CHECK: define i64 @rotleft64
// CHECK: define dso_local i64 @rotleft64
// CHECK: i64 @llvm.fshl.i64(i64
unsigned char rotright8(unsigned char x, unsigned char y) {
return __builtin_rotateright8(x, y);
}
// CHECK: define zeroext i8 @rotright8
// CHECK: define dso_local zeroext i8 @rotright8
// CHECK: i8 @llvm.fshr.i8(i8
unsigned int rotright16(unsigned int x, unsigned int y) {
return __builtin_rotateright16(x, y);
}
// CHECK: define i16 @rotright16
// CHECK: define dso_local i16 @rotright16
// CHECK: i16 @llvm.fshr.i16(i16
unsigned long rotright32(unsigned long x, unsigned long y) {
return __builtin_rotateright32(x, y);
}
// CHECK: define i32 @rotright32
// CHECK: define dso_local i32 @rotright32
// CHECK: i32 @llvm.fshr.i32(i32
unsigned long long rotright64(unsigned long long x, unsigned long long y) {
return __builtin_rotateright64(x, y);
}
// CHECK: define i64 @rotright64
// CHECK: define dso_local i64 @rotright64
// CHECK: i64 @llvm.fshr.i64(i64
unsigned int byteswap16(unsigned int x) {
return __builtin_bswap16(x);
}
// CHECK: define i16 @byteswap16
// CHECK: define dso_local i16 @byteswap16
// CHECK: i16 @llvm.bswap.i16(i16
unsigned long byteswap32(unsigned long x) {
return __builtin_bswap32(x);
}
// CHECK: define i32 @byteswap32
// CHECK: define dso_local i32 @byteswap32
// CHECK: i32 @llvm.bswap.i32(i32
unsigned long long byteswap64(unsigned long long x) {
return __builtin_bswap64(x);
}
// CHECK: define i64 @byteswap64
// CHECK: define dso_local i64 @byteswap64
// CHECK: i64 @llvm.bswap.i64(i64

2
clang/test/CodeGen/avr/attributes/interrupt.c
View File

@ -1,6 +1,6 @@
// RUN: %clang_cc1 -triple avr-unknown-unknown -emit-llvm %s -o - | FileCheck %s
// CHECK: define void @foo(){{.*}}#0
// CHECK: define dso_local void @foo(){{.*}}#0
__attribute__((interrupt)) void foo(void) { }
// CHECK: attributes #0 = {{{.*interrupt.*}}}

2
clang/test/CodeGen/avr/attributes/signal.c
View File

@ -1,6 +1,6 @@
// RUN: %clang_cc1 -triple avr-unknown-unknown -emit-llvm %s -o - | FileCheck %s
// CHECK: define void @foo(){{.*}}#0
// CHECK: define dso_local void @foo(){{.*}}#0
__attribute__((signal)) void foo(void) { }
// CHECK: attributes #0 = {{{.*signal.*}}}

16
clang/test/CodeGen/bitfield-2.c
View File

@ -32,7 +32,7 @@ int f0_reload(struct s0 *a0) {
return (a0->f0 += 1);
}
// CHECK-OPT-LABEL: define i64 @test_0()
// CHECK-OPT-LABEL: define dso_local i64 @test_0()
// CHECK-OPT: ret i64 1
// CHECK-OPT: }
unsigned long long test_0() {
@ -78,7 +78,7 @@ int f1_reload(struct s1 *a0) {
return (a0->f1 += 1234);
}
// CHECK-OPT-LABEL: define i64 @test_1()
// CHECK-OPT-LABEL: define dso_local i64 @test_1()
// CHECK-OPT: ret i64 210
// CHECK-OPT: }
unsigned long long test_1() {
@ -120,7 +120,7 @@ int f2_reload(union u2 *a0) {
return (a0->f0 += 1234);
}
// CHECK-OPT-LABEL: define i64 @test_2()
// CHECK-OPT-LABEL: define dso_local i64 @test_2()
// CHECK-OPT: ret i64 2
// CHECK-OPT: }
unsigned long long test_2() {
@ -156,7 +156,7 @@ int f3_reload(struct s3 *a0) {
return (a0->f0 += 1234);
}
// CHECK-OPT-LABEL: define i64 @test_3()
// CHECK-OPT-LABEL: define dso_local i64 @test_3()
// CHECK-OPT: ret i64 -559039940
// CHECK-OPT: }
unsigned long long test_3() {
@ -190,7 +190,7 @@ int f4_reload(struct s4 *a0) {
return (a0->f0 += 1234) ^ (a0->f1 += 5678);
}
// CHECK-OPT-LABEL: define i64 @test_4()
// CHECK-OPT-LABEL: define dso_local i64 @test_4()
// CHECK-OPT: ret i64 4860
// CHECK-OPT: }
unsigned long long test_4() {
@ -222,7 +222,7 @@ int f5_reload(struct s5 *a0) {
return (a0->f0 += 0xF) ^ (a0->f1 += 0xF) ^ (a0->f2 += 0xF);
}
// CHECK-OPT-LABEL: define i64 @test_5()
// CHECK-OPT-LABEL: define dso_local i64 @test_5()
// CHECK-OPT: ret i64 2
// CHECK-OPT: }
unsigned long long test_5() {
@ -252,7 +252,7 @@ int f6_reload(struct s6 *a0) {
return (a0->f0 += 0xF);
}
// CHECK-OPT-LABEL: define zeroext i1 @test_6()
// CHECK-OPT-LABEL: define dso_local zeroext i1 @test_6()
// CHECK-OPT: ret i1 true
// CHECK-OPT: }
_Bool test_6() {
@ -310,7 +310,7 @@ int f8_reload(struct s8 *a0) {
return (a0->f0 += 0xFD) ^ (a0->f2 += 0xFD) ^ (a0->f3 += 0xFD);
}
// CHECK-OPT-LABEL: define i32 @test_8()
// CHECK-OPT-LABEL: define dso_local i32 @test_8()
// CHECK-OPT: ret i32 -3
// CHECK-OPT: }
unsigned test_8() {

6
clang/test/CodeGen/blocks.c
View File

@ -77,7 +77,7 @@ void f3() {
// The bool can fill in between the header and the long long.
// Add the appropriate amount of padding between them.
void f4_helper(long long (^)(void));
// CHECK-LABEL: define void @f4()
// CHECK-LABEL: define dso_local void @f4()
void f4(void) {
_Bool b = 0;
long long ll = 0;
@ -92,7 +92,7 @@ struct F5 {
char buffer[32] __attribute((aligned));
};
void f5_helper(void (^)(struct F5 *));
// CHECK-LABEL: define void @f5()
// CHECK-LABEL: define dso_local void @f5()
void f5(void) {
struct F5 value;
// CHECK: alloca <{ i8*, i32, i32, i8*, {{%.*}}*, [12 x i8], [[F5:%.*]] }>, align 16
@ -117,7 +117,7 @@ void testConstCaptureInCopyAndDestroyHelpers() {
__block int i;
(^ { i = x; })();
}
// CHECK-LABEL: define void @testConstCaptureInCopyAndDestroyHelpers(
// CHECK-LABEL: define dso_local void @testConstCaptureInCopyAndDestroyHelpers(
// CHECK: %[[BLOCK_DESCRIPTOR:.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %[[STRUCT_BLOCK_DESCRIPTOR]]*, i8* }>, <{ i8*, i32, i32, i8*, %[[STRUCT_BLOCK_DESCRIPTOR]]*, i8* }>* %{{.*}}, i32 0, i32 4
// CHECK: store %[[STRUCT_BLOCK_DESCRIPTOR]]* bitcast ({ i32, i32, i8*, i8*, i8*, i8* }* @[[BLOCK_DESCRIPTOR_TMP21]] to %[[STRUCT_BLOCK_DESCRIPTOR]]*), %[[STRUCT_BLOCK_DESCRIPTOR]]** %[[BLOCK_DESCRIPTOR]], align 4

10
clang/test/CodeGen/bool-convert.c
View File

@ -2,19 +2,19 @@
// All of these should uses the memory representation of _Bool
// CHECK-LABEL: %struct.teststruct1 = type { i8, i8 }
// CHECK-LABEL: @test1 = common global %struct.teststruct1
// CHECK-LABEL: @test1 = common dso_local global %struct.teststruct1
struct teststruct1 {_Bool a, b;} test1;
// CHECK-LABEL: @test2 = common global i8* null
// CHECK-LABEL: @test2 = common dso_local global i8* null
_Bool* test2;
// CHECK-LABEL: @test3 = common global [10 x i8]
// CHECK-LABEL: @test3 = common dso_local global [10 x i8]
_Bool test3[10];
// CHECK-LABEL: @test4 = common global [0 x i8]* null
// CHECK-LABEL: @test4 = common dso_local global [0 x i8]* null
_Bool (*test4)[];
// CHECK-LABEL: define void @f(i32 %x)
// CHECK-LABEL: define dso_local void @f(i32 %x)
void f(int x) {
// CHECK: alloca i8, align 1
_Bool test5;

2
clang/test/CodeGen/bool-init.c
View File

@ -1,5 +1,5 @@
// RUN: %clang_cc1 -triple x86_64-pc-linux -emit-llvm < %s | FileCheck %s
// Check that the type of this global isn't i1
// CHECK: @test = global i8 1
// CHECK: @test = dso_local global i8 1
_Bool test = &test;

4
clang/test/CodeGen/bool_test.c
View File

@ -2,13 +2,13 @@
// RUN: %clang_cc1 -triple powerpc-unknown-linux-gnu -emit-llvm -o - %s -O2 -disable-llvm-passes | FileCheck %s
int boolsize = sizeof(_Bool);
// CHECK: boolsize = global i32 1, align 4
// CHECK: boolsize = dso_local global i32 1, align 4
void f(_Bool *x, _Bool *y) {
*x = *y;
}
// CHECK-LABEL: define void @f(
// CHECK-LABEL: define dso_local void @f(
// CHECK: [[FROMMEM:%.*]] = load i8, i8* %
// CHECK: [[BOOLVAL:%.*]] = trunc i8 [[FROMMEM]] to i1
// CHECK: [[TOMEM:%.*]] = zext i1 [[BOOLVAL]] to i8

12
clang/test/CodeGen/builtin-align.c
View File

@ -34,19 +34,19 @@
/// Check that constant initializers work and are correct
_Bool aligned_true = __builtin_is_aligned(1024, 512);
// CHECK: @aligned_true = global i8 1, align 1
// CHECK: @aligned_true = dso_local global i8 1, align 1
_Bool aligned_false = __builtin_is_aligned(123, 512);
// CHECK: @aligned_false = global i8 0, align 1
// CHECK: @aligned_false = dso_local global i8 0, align 1
int down_1 = __builtin_align_down(1023, 32);
// CHECK: @down_1 = global i32 992, align 4
// CHECK: @down_1 = dso_local global i32 992, align 4
int down_2 = __builtin_align_down(256, 32);
// CHECK: @down_2 = global i32 256, align 4
// CHECK: @down_2 = dso_local global i32 256, align 4
int up_1 = __builtin_align_up(1023, 32);
// CHECK: @up_1 = global i32 1024, align 4
// CHECK: @up_1 = dso_local global i32 1024, align 4
int up_2 = __builtin_align_up(256, 32);
// CHECK: @up_2 = global i32 256, align 4
// CHECK: @up_2 = dso_local global i32 256, align 4
/// Capture the IR type here to use in the remaining FileCheck captures:
// CHECK: define {{[^@]+}}@get_type() #0

4
clang/test/CodeGen/builtin-constant-p.c
View File

@ -48,7 +48,7 @@ inline char test4_i(const char *x) {
}
int test4() {
// CHECK: define i32 @test4
// CHECK: define dso_local i32 @test4
// CHECK: ret i32 0
return __builtin_constant_p(test4_i(test3_c));
}
@ -144,7 +144,7 @@ void test14() {
}
int test15_f();
// CHECK-LABEL: define void @test15
// CHECK-LABEL: define dso_local void @test15
// CHECK-NOT: call {{.*}}test15_f
void test15() {
int a, b;

12
clang/test/CodeGen/builtin-expect.c
View File

@ -5,7 +5,7 @@
// If optimizations are on, generate the correct expect and preserve other necessary operations.
int expect_taken(int x) {
// ALL-LABEL: define i32 @expect_taken
// ALL-LABEL: define dso_local i32 @expect_taken
// O1: call i64 @llvm.expect.i64(i64 {{%.*}}, i64 1)
// O0-NOT: @llvm.expect
@ -16,7 +16,7 @@ int expect_taken(int x) {
int expect_not_taken(int x) {
// ALL-LABEL: define i32 @expect_not_taken
// ALL-LABEL: define dso_local i32 @expect_not_taken
// O1: call i64 @llvm.expect.i64(i64 {{%.*}}, i64 0)
// O0-NOT: @llvm.expect
@ -31,7 +31,7 @@ int y(void);
void foo();
void expect_value_side_effects() {
// ALL-LABEL: define void @expect_value_side_effects()
// ALL-LABEL: define dso_local void @expect_value_side_effects()
// ALL: [[CALL:%.*]] = call i32 @y
// O1: [[SEXT:%.*]] = sext i32 [[CALL]] to i64
// O1: call i64 @llvm.expect.i64(i64 {{%.*}}, i64 [[SEXT]])
@ -49,7 +49,7 @@ void isigprocmask(void);
long bar();
int main() {
// ALL-LABEL: define i32 @main()
// ALL-LABEL: define dso_local i32 @main()
// ALL: call void @isigprocmask()
// ALL: [[CALL:%.*]] = call i64 (...) @bar()
// O1: call i64 @llvm.expect.i64(i64 0, i64 [[CALL]])
@ -60,7 +60,7 @@ int main() {
int switch_cond(int x) {
// ALL-LABEL: define i32 @switch_cond
// ALL-LABEL: define dso_local i32 @switch_cond
// O1: call i64 @llvm.expect.i64(i64 {{%.*}}, i64 5)
// O0-NOT: @llvm.expect
@ -79,7 +79,7 @@ int switch_cond(int x) {
}
int variable_expected(int stuff) {
// ALL-LABEL: define i32 @variable_expected(
// ALL-LABEL: define dso_local i32 @variable_expected(
// O1: call i64 @llvm.expect.i64(i64 {{%.*}}, i64 {{%.*}})
// O0-NOT: @llvm.expect

8
clang/test/CodeGen/builtin-ms-noop.cpp
View File

@ -5,7 +5,7 @@ struct A {
};
extern "C" int f() {
// CHECK: define i32 @f()
// CHECK: define dso_local i32 @f()
// CHECK-NOT: call void @_ZN1AD1Ev
// CHECK: ret i32 0
return __noop(A());
@ -13,18 +13,18 @@ extern "C" int f() {
extern "C" int g() {
return __noop;
// CHECK: define i32 @g()
// CHECK: define dso_local i32 @g()
// CHECK: ret i32 0
}
extern "C" int h() {
return (__noop);
// CHECK: define i32 @h()
// CHECK: define dso_local i32 @h()
// CHECK: ret i32 0
}
extern "C" int i() {
return __noop + 1;
// CHECK: define i32 @i()
// CHECK: define dso_local i32 @i()
// CHECK: ret i32 1
}

2
clang/test/CodeGen/builtin-unpredictable.c
View File

@ -12,7 +12,7 @@ extern "C" {
void foo();
void branch(int x) {
// CHECK-LABEL: define void @branch(
// CHECK-LABEL: define dso_local void @branch(
// CHECK-NOT: builtin_unpredictable
// CHECK: !unpredictable [[METADATA:.+]]

36
clang/test/CodeGen/builtins-arm.c
View File

@ -102,121 +102,121 @@ void prefetch(int i) {
}
void ldc(const void *i) {
// CHECK: define void @ldc(i8* %i)
// CHECK: define dso_local void @ldc(i8* %i)
// CHECK: call void @llvm.arm.ldc(i32 1, i32 2, i8* %i)
// CHECK-NEXT: ret void
__builtin_arm_ldc(1, 2, i);
}
void ldcl(const void *i) {
// CHECK: define void @ldcl(i8* %i)
// CHECK: define dso_local void @ldcl(i8* %i)
// CHECK: call void @llvm.arm.ldcl(i32 1, i32 2, i8* %i)
// CHECK-NEXT: ret void
__builtin_arm_ldcl(1, 2, i);
}
void ldc2(const void *i) {
// CHECK: define void @ldc2(i8* %i)
// CHECK: define dso_local void @ldc2(i8* %i)
// CHECK: call void @llvm.arm.ldc2(i32 1, i32 2, i8* %i)
// CHECK-NEXT: ret void
__builtin_arm_ldc2(1, 2, i);
}
void ldc2l(const void *i) {
// CHECK: define void @ldc2l(i8* %i)
// CHECK: define dso_local void @ldc2l(i8* %i)
// CHECK: call void @llvm.arm.ldc2l(i32 1, i32 2, i8* %i)
// CHECK-NEXT: ret void
__builtin_arm_ldc2l(1, 2, i);
}
void stc(void *i) {
// CHECK: define void @stc(i8* %i)
// CHECK: define dso_local void @stc(i8* %i)
// CHECK: call void @llvm.arm.stc(i32 1, i32 2, i8* %i)
// CHECK-NEXT: ret void
__builtin_arm_stc(1, 2, i);
}
void stcl(void *i) {
// CHECK: define void @stcl(i8* %i)
// CHECK: define dso_local void @stcl(i8* %i)
// CHECK: call void @llvm.arm.stcl(i32 1, i32 2, i8* %i)
// CHECK-NEXT: ret void
__builtin_arm_stcl(1, 2, i);
}
void stc2(void *i) {
// CHECK: define void @stc2(i8* %i)
// CHECK: define dso_local void @stc2(i8* %i)
// CHECK: call void @llvm.arm.stc2(i32 1, i32 2, i8* %i)
// CHECK-NEXT: ret void
__builtin_arm_stc2(1, 2, i);
}
void stc2l(void *i) {
// CHECK: define void @stc2l(i8* %i)
// CHECK: define dso_local void @stc2l(i8* %i)
// CHECK: call void @llvm.arm.stc2l(i32 1, i32 2, i8* %i)
// CHECK-NEXT: ret void
__builtin_arm_stc2l(1, 2, i);
}
void cdp() {
// CHECK: define void @cdp()
// CHECK: define dso_local void @cdp()
// CHECK: call void @llvm.arm.cdp(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6)
// CHECK-NEXT: ret void
__builtin_arm_cdp(1, 2, 3, 4, 5, 6);
}
void cdp2() {
// CHECK: define void @cdp2()
// CHECK: define dso_local void @cdp2()
// CHECK: call void @llvm.arm.cdp2(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6)
// CHECK-NEXT: ret void
__builtin_arm_cdp2(1, 2, 3, 4, 5, 6);
}
unsigned mrc() {
// CHECK: define i32 @mrc()
// CHECK: define dso_local i32 @mrc()
// CHECK: [[R:%.*]] = call i32 @llvm.arm.mrc(i32 15, i32 0, i32 13, i32 0, i32 3)
// CHECK-NEXT: ret i32 [[R]]
return __builtin_arm_mrc(15, 0, 13, 0, 3);
}
unsigned mrc2() {
// CHECK: define i32 @mrc2()
// CHECK: define dso_local i32 @mrc2()
// CHECK: [[R:%.*]] = call i32 @llvm.arm.mrc2(i32 15, i32 0, i32 13, i32 0, i32 3)
// CHECK-NEXT: ret i32 [[R]]
return __builtin_arm_mrc2(15, 0, 13, 0, 3);
}
void mcr(unsigned a) {
// CHECK: define void @mcr(i32 [[A:%.*]])
// CHECK: define dso_local void @mcr(i32 [[A:%.*]])
// CHECK: call void @llvm.arm.mcr(i32 15, i32 0, i32 [[A]], i32 13, i32 0, i32 3)
__builtin_arm_mcr(15, 0, a, 13, 0, 3);
}
void mcr2(unsigned a) {
// CHECK: define void @mcr2(i32 [[A:%.*]])
// CHECK: define dso_local void @mcr2(i32 [[A:%.*]])
// CHECK: call void @llvm.arm.mcr2(i32 15, i32 0, i32 [[A]], i32 13, i32 0, i32 3)
__builtin_arm_mcr2(15, 0, a, 13, 0, 3);
}
void mcrr(uint64_t a) {
// CHECK: define void @mcrr(i64 %{{.*}})
// CHECK: define dso_local void @mcrr(i64 %{{.*}})
// CHECK: call void @llvm.arm.mcrr(i32 15, i32 0, i32 %{{[0-9]+}}, i32 %{{[0-9]+}}, i32 0)
__builtin_arm_mcrr(15, 0, a, 0);
}
void mcrr2(uint64_t a) {
// CHECK: define void @mcrr2(i64 %{{.*}})
// CHECK: define dso_local void @mcrr2(i64 %{{.*}})
// CHECK: call void @llvm.arm.mcrr2(i32 15, i32 0, i32 %{{[0-9]+}}, i32 %{{[0-9]+}}, i32 0)
__builtin_arm_mcrr2(15, 0, a, 0);
}
uint64_t mrrc() {
// CHECK: define i64 @mrrc()
// CHECK: define dso_local i64 @mrrc()
// CHECK: call { i32, i32 } @llvm.arm.mrrc(i32 15, i32 0, i32 0)
return __builtin_arm_mrrc(15, 0, 0);
}
uint64_t mrrc2() {
// CHECK: define i64 @mrrc2()
// CHECK: define dso_local i64 @mrrc2()
// CHECK: call { i32, i32 } @llvm.arm.mrrc2(i32 15, i32 0, i32 0)
return __builtin_arm_mrrc2(15, 0, 0);
}

30
clang/test/CodeGen/builtins-ppc-altivec.c
View File

@ -56,7 +56,7 @@ int res_i;
int res_ui;
int res_f;
// CHECK-LABEL: define void @test1
// CHECK-LABEL: define dso_local void @test1
void test1() {
/* vec_abs */
@ -907,7 +907,7 @@ void test1() {
}
// CHECK-LABEL: define void @test2
// CHECK-LABEL: define dso_local void @test2
void test2() {
/* vec_avg */
res_vsc = vec_avg(vsc, vsc);
@ -1063,7 +1063,7 @@ void test2() {
// CHECK-LE: @llvm.ppc.altivec.vcmpgefp
}
// CHECK-LABEL: define void @test5
// CHECK-LABEL: define dso_local void @test5
void test5() {
/* vec_cmpgt */
@ -1153,7 +1153,7 @@ void test5() {
// CHECK-LE: @llvm.ppc.altivec.vcmpgefp
}
// CHECK-LABEL: define void @test6
// CHECK-LABEL: define dso_local void @test6
void test6() {
/* vec_cmplt */
res_vbc = vec_cmplt(vsc, vsc);
@ -9034,7 +9034,7 @@ void test6() {
}
/* ------------------------------ Relational Operators ------------------------------ */
// CHECK-LABEL: define void @test7
// CHECK-LABEL: define dso_local void @test7
void test7() {
vector signed char vsc1 = (vector signed char)(-1);
vector signed char vsc2 = (vector signed char)(-2);
@ -9221,8 +9221,8 @@ void test7() {
/* ------------------------------ optional ---------------------------------- */
void test8() {
// CHECK-LABEL: define void @test8
// CHECK-LE-LABEL: define void @test8
// CHECK-LABEL: define dso_local void @test8
// CHECK-LE-LABEL: define dso_local void @test8
res_vbc = vec_reve(vbc);
// CHECK: shufflevector <16 x i8> %{{[0-9]+}}, <16 x i8> %{{[0-9]+}}, <16 x i32> <i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>
// CHECK-LE: shufflevector <16 x i8> %{{[0-9]+}}, <16 x i8> %{{[0-9]+}}, <16 x i32> <i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>
@ -9352,8 +9352,8 @@ void test8() {
/* ------------------------------ vec_xl ------------------------------------ */
void test9() {
// CHECK-LABEL: define void @test9
// CHECK-LE-LABEL: define void @test9
// CHECK-LABEL: define dso_local void @test9
// CHECK-LE-LABEL: define dso_local void @test9
res_vsc = vec_xl(param_sll, &param_sc);
// CHECK: load <16 x i8>, <16 x i8>* %{{[0-9]+}}, align 1
// CHECK-LE: load <16 x i8>, <16 x i8>* %{{[0-9]+}}, align 1
@ -9385,8 +9385,8 @@ void test9() {
/* ------------------------------ vec_xst ----------------------------------- */
void test10() {
// CHECK-LABEL: define void @test10
// CHECK-LE-LABEL: define void @test10
// CHECK-LABEL: define dso_local void @test10
// CHECK-LE-LABEL: define dso_local void @test10
vec_xst(vsc, param_sll, &param_sc);
// CHECK: store <16 x i8> %{{[0-9]+}}, <16 x i8>* %{{[0-9]+}}, align 1
// CHECK-LE: store <16 x i8> %{{[0-9]+}}, <16 x i8>* %{{[0-9]+}}, align 1
@ -9418,8 +9418,8 @@ void test10() {
/* ----------------------------- vec_xl_be ---------------------------------- */
void test11() {
// CHECK-LABEL: define void @test11
// CHECK-LE-LABEL: define void @test11
// CHECK-LABEL: define dso_local void @test11
// CHECK-LE-LABEL: define dso_local void @test11
res_vsc = vec_xl_be(param_sll, &param_sc);
// CHECK: load <16 x i8>, <16 x i8>* %{{[0-9]+}}, align 1
// CHECK-LE: call <2 x double> @llvm.ppc.vsx.lxvd2x.be(i8* %{{[0-9]+}})
@ -9455,8 +9455,8 @@ void test11() {
/* ----------------------------- vec_xst_be --------------------------------- */
void test12() {
// CHECK-LABEL: define void @test12
// CHECK-LE-LABEL: define void @test12
// CHECK-LABEL: define dso_local void @test12
// CHECK-LE-LABEL: define dso_local void @test12
vec_xst_be(vsc, param_sll, &param_sc);
// CHECK: store <16 x i8> %{{[0-9]+}}, <16 x i8>* %{{[0-9]+}}, align 1
// CHECK-LE: shufflevector <16 x i8> %{{[0-9]+}}, <16 x i8> %{{[0-9]+}}, <16 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8>

58
clang/test/CodeGen/builtins-ppc-crypto.c
View File

@ -24,7 +24,7 @@
#define D_INIT2 { 0x7172737475767778, \
0x797A7B7C7D7E7F70 };
// CHECK-LABEL: define <16 x i8> @test_vpmsumb
// CHECK-LABEL: define dso_local <16 x i8> @test_vpmsumb
vector unsigned char test_vpmsumb(void)
{
vector unsigned char a = B_INIT1
@ -33,7 +33,7 @@ vector unsigned char test_vpmsumb(void)
// CHECK: @llvm.ppc.altivec.crypto.vpmsumb
}
// CHECK-LABEL: define <8 x i16> @test_vpmsumh
// CHECK-LABEL: define dso_local <8 x i16> @test_vpmsumh
vector unsigned short test_vpmsumh(void)
{
vector unsigned short a = H_INIT1
@ -42,7 +42,7 @@ vector unsigned short test_vpmsumh(void)
// CHECK: @llvm.ppc.altivec.crypto.vpmsumh
}
// CHECK-LABEL: define <4 x i32> @test_vpmsumw
// CHECK-LABEL: define dso_local <4 x i32> @test_vpmsumw
vector unsigned int test_vpmsumw(void)
{
vector unsigned int a = W_INIT1
@ -51,7 +51,7 @@ vector unsigned int test_vpmsumw(void)
// CHECK: @llvm.ppc.altivec.crypto.vpmsumw
}
// CHECK-LABEL: define <2 x i64> @test_vpmsumd
// CHECK-LABEL: define dso_local <2 x i64> @test_vpmsumd
vector unsigned long long test_vpmsumd(void)
{
vector unsigned long long a = D_INIT1
@ -60,7 +60,7 @@ vector unsigned long long test_vpmsumd(void)
// CHECK: @llvm.ppc.altivec.crypto.vpmsumd
}
// CHECK-LABEL: define <2 x i64> @test_vsbox
// CHECK-LABEL: define dso_local <2 x i64> @test_vsbox
vector unsigned long long test_vsbox(void)
{
vector unsigned long long a = D_INIT1
@ -68,7 +68,7 @@ vector unsigned long long test_vsbox(void)
// CHECK: @llvm.ppc.altivec.crypto.vsbox
}
// CHECK-LABEL: define <16 x i8> @test_vpermxorb
// CHECK-LABEL: define dso_local <16 x i8> @test_vpermxorb
vector unsigned char test_vpermxorb(void)
{
vector unsigned char a = B_INIT1
@ -78,7 +78,7 @@ vector unsigned char test_vpermxorb(void)
// CHECK: @llvm.ppc.altivec.crypto.vpermxor
}
// CHECK-LABEL: define <8 x i16> @test_vpermxorh
// CHECK-LABEL: define dso_local <8 x i16> @test_vpermxorh
vector unsigned short test_vpermxorh(void)
{
vector unsigned short a = H_INIT1
@ -88,7 +88,7 @@ vector unsigned short test_vpermxorh(void)
// CHECK: @llvm.ppc.altivec.crypto.vpermxor
}
// CHECK-LABEL: define <4 x i32> @test_vpermxorw
// CHECK-LABEL: define dso_local <4 x i32> @test_vpermxorw
vector unsigned int test_vpermxorw(void)
{
vector unsigned int a = W_INIT1
@ -98,7 +98,7 @@ vector unsigned int test_vpermxorw(void)
// CHECK: @llvm.ppc.altivec.crypto.vpermxor
}
// CHECK-LABEL: define <2 x i64> @test_vpermxord
// CHECK-LABEL: define dso_local <2 x i64> @test_vpermxord
vector unsigned long long test_vpermxord(void)
{
vector unsigned long long a = D_INIT1
@ -132,7 +132,7 @@ vector unsigned char test_vpermxoruc(vector unsigned char a,
// CHECK: @llvm.ppc.altivec.crypto.vpermxor
}
// CHECK-LABEL: define <2 x i64> @test_vcipher
// CHECK-LABEL: define dso_local <2 x i64> @test_vcipher
vector unsigned long long test_vcipher(void)
{
vector unsigned long long a = D_INIT1
@ -141,7 +141,7 @@ vector unsigned long long test_vcipher(void)
// CHECK: @llvm.ppc.altivec.crypto.vcipher
}
// CHECK-LABEL: define <2 x i64> @test_vcipherlast
// CHECK-LABEL: define dso_local <2 x i64> @test_vcipherlast
vector unsigned long long test_vcipherlast(void)
{
vector unsigned long long a = D_INIT1
@ -159,7 +159,7 @@ vector unsigned long long test_vncipher(void)
// CHECK: @llvm.ppc.altivec.crypto.vncipher
}
// CHECK-LABEL: define <2 x i64> @test_vncipherlast
// CHECK-LABEL: define dso_local <2 x i64> @test_vncipherlast
vector unsigned long long test_vncipherlast(void)
{
vector unsigned long long a = D_INIT1
@ -168,7 +168,7 @@ vector unsigned long long test_vncipherlast(void)
// CHECK: @llvm.ppc.altivec.crypto.vncipherlast
}
// CHECK-LABEL: define <4 x i32> @test_vshasigmaw
// CHECK-LABEL: define dso_local <4 x i32> @test_vshasigmaw
vector unsigned int test_vshasigmaw(void)
{
vector unsigned int a = W_INIT1
@ -176,7 +176,7 @@ vector unsigned int test_vshasigmaw(void)
// CHECK: @llvm.ppc.altivec.crypto.vshasigmaw
}
// CHECK-LABEL: define <2 x i64> @test_vshasigmad
// CHECK-LABEL: define dso_local <2 x i64> @test_vshasigmad
vector unsigned long long test_vshasigmad(void)
{
vector unsigned long long a = D_INIT2
@ -186,7 +186,7 @@ vector unsigned long long test_vshasigmad(void)
// Test cases for the builtins the way they are exposed to
// users through altivec.h
// CHECK-LABEL: define <16 x i8> @test_vpmsumb_e
// CHECK-LABEL: define dso_local <16 x i8> @test_vpmsumb_e
vector unsigned char test_vpmsumb_e(void)
{
vector unsigned char a = B_INIT1
@ -195,7 +195,7 @@ vector unsigned char test_vpmsumb_e(void)
// CHECK: @llvm.ppc.altivec.crypto.vpmsumb
}
// CHECK-LABEL: define <8 x i16> @test_vpmsumh_e
// CHECK-LABEL: define dso_local <8 x i16> @test_vpmsumh_e
vector unsigned short test_vpmsumh_e(void)
{
vector unsigned short a = H_INIT1
@ -204,7 +204,7 @@ vector unsigned short test_vpmsumh_e(void)
// CHECK: @llvm.ppc.altivec.crypto.vpmsumh
}
// CHECK-LABEL: define <4 x i32> @test_vpmsumw_e
// CHECK-LABEL: define dso_local <4 x i32> @test_vpmsumw_e
vector unsigned int test_vpmsumw_e(void)
{
vector unsigned int a = W_INIT1
@ -213,7 +213,7 @@ vector unsigned int test_vpmsumw_e(void)
// CHECK: @llvm.ppc.altivec.crypto.vpmsumw
}
// CHECK-LABEL: define <2 x i64> @test_vpmsumd_e
// CHECK-LABEL: define dso_local <2 x i64> @test_vpmsumd_e
vector unsigned long long test_vpmsumd_e(void)
{
vector unsigned long long a = D_INIT1
@ -222,7 +222,7 @@ vector unsigned long long test_vpmsumd_e(void)
// CHECK: @llvm.ppc.altivec.crypto.vpmsumd
}
// CHECK-LABEL: define <2 x i64> @test_vsbox_e
// CHECK-LABEL: define dso_local <2 x i64> @test_vsbox_e
vector unsigned long long test_vsbox_e(void)
{
vector unsigned long long a = D_INIT1
@ -230,7 +230,7 @@ vector unsigned long long test_vsbox_e(void)
// CHECK: @llvm.ppc.altivec.crypto.vsbox
}
// CHECK-LABEL: define <16 x i8> @test_vpermxorb_e
// CHECK-LABEL: define dso_local <16 x i8> @test_vpermxorb_e
vector unsigned char test_vpermxorb_e(void)
{
vector unsigned char a = B_INIT1
@ -240,7 +240,7 @@ vector unsigned char test_vpermxorb_e(void)
// CHECK: @llvm.ppc.altivec.crypto.vpermxor
}
// CHECK-LABEL: define <8 x i16> @test_vpermxorh_e
// CHECK-LABEL: define dso_local <8 x i16> @test_vpermxorh_e
vector unsigned short test_vpermxorh_e(void)
{
vector unsigned short a = H_INIT1
@ -250,7 +250,7 @@ vector unsigned short test_vpermxorh_e(void)
// CHECK: @llvm.ppc.altivec.crypto.vpermxor
}
// CHECK-LABEL: define <4 x i32> @test_vpermxorw_e
// CHECK-LABEL: define dso_local <4 x i32> @test_vpermxorw_e
vector unsigned int test_vpermxorw_e(void)
{
vector unsigned int a = W_INIT1
@ -260,7 +260,7 @@ vector unsigned int test_vpermxorw_e(void)
// CHECK: @llvm.ppc.altivec.crypto.vpermxor
}
// CHECK-LABEL: define <2 x i64> @test_vpermxord_e
// CHECK-LABEL: define dso_local <2 x i64> @test_vpermxord_e
vector unsigned long long test_vpermxord_e(void)
{
vector unsigned long long a = D_INIT1
@ -270,7 +270,7 @@ vector unsigned long long test_vpermxord_e(void)
// CHECK: @llvm.ppc.altivec.crypto.vpermxor
}
// CHECK-LABEL: define <2 x i64> @test_vcipher_e
// CHECK-LABEL: define dso_local <2 x i64> @test_vcipher_e
vector unsigned long long test_vcipher_e(void)
{
vector unsigned long long a = D_INIT1
@ -279,7 +279,7 @@ vector unsigned long long test_vcipher_e(void)
// CHECK: @llvm.ppc.altivec.crypto.vcipher
}
// CHECK-LABEL: define <2 x i64> @test_vcipherlast_e
// CHECK-LABEL: define dso_local <2 x i64> @test_vcipherlast_e
vector unsigned long long test_vcipherlast_e(void)
{
vector unsigned long long a = D_INIT1
@ -288,7 +288,7 @@ vector unsigned long long test_vcipherlast_e(void)
// CHECK: @llvm.ppc.altivec.crypto.vcipherlast
}
// CHECK-LABEL: define <2 x i64> @test_vncipher_e
// CHECK-LABEL: define dso_local <2 x i64> @test_vncipher_e
vector unsigned long long test_vncipher_e(void)
{
vector unsigned long long a = D_INIT1
@ -297,7 +297,7 @@ vector unsigned long long test_vncipher_e(void)
// CHECK: @llvm.ppc.altivec.crypto.vncipher
}
// CHECK-LABEL: define <2 x i64> @test_vncipherlast_e
// CHECK-LABEL: define dso_local <2 x i64> @test_vncipherlast_e
vector unsigned long long test_vncipherlast_e(void)
{
vector unsigned long long a = D_INIT1
@ -306,7 +306,7 @@ vector unsigned long long test_vncipherlast_e(void)
// CHECK: @llvm.ppc.altivec.crypto.vncipherlast
}
// CHECK-LABEL: define <4 x i32> @test_vshasigmaw_e
// CHECK-LABEL: define dso_local <4 x i32> @test_vshasigmaw_e
vector unsigned int test_vshasigmaw_e(void)
{
vector unsigned int a = W_INIT1
@ -314,7 +314,7 @@ vector unsigned int test_vshasigmaw_e(void)
// CHECK: @llvm.ppc.altivec.crypto.vshasigmaw
}
// CHECK-LABEL: define <2 x i64> @test_vshasigmad_e
// CHECK-LABEL: define dso_local <2 x i64> @test_vshasigmad_e
vector unsigned long long test_vshasigmad_e(void)
{
vector unsigned long long a = D_INIT2

2
clang/test/CodeGen/builtins-ppc-htm.c
View File

@ -2,7 +2,7 @@
// RUN: %clang_cc1 -target-feature +altivec -target-feature +htm -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s
void test1(long int *r, int code, long int *a, long int *b) {
// CHECK-LABEL: define void @test1
// CHECK-LABEL: define dso_local void @test1
r[0] = __builtin_tbegin (0);
// CHECK: @llvm.ppc.tbegin

10
clang/test/CodeGen/builtins-ppc-p7.c
View File

@ -5,7 +5,7 @@
// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown -target-cpu pwr8 \
// RUN: -emit-llvm %s -o - | FileCheck %s
// CHECK-LABEL: define signext i32 @test_divwe
// CHECK-LABEL: define dso_local signext i32 @test_divwe
int test_divwe(void)
{
int a = 74;
@ -14,7 +14,7 @@ int test_divwe(void)
// CHECK: @llvm.ppc.divwe
}
// CHECK-LABEL: define zeroext i32 @test_divweu
// CHECK-LABEL: define dso_local zeroext i32 @test_divweu
unsigned int test_divweu(void)
{
unsigned int a = 74;
@ -23,7 +23,7 @@ unsigned int test_divweu(void)
// CHECK: @llvm.ppc.divweu
}
// CHECK-LABEL: define i64 @test_divde
// CHECK-LABEL: define dso_local i64 @test_divde
long long test_divde(void)
{
long long a = 74LL;
@ -32,7 +32,7 @@ long long test_divde(void)
// CHECK: @llvm.ppc.divde
}
// CHECK-LABEL: define i64 @test_divdeu
// CHECK-LABEL: define dso_local i64 @test_divdeu
unsigned long long test_divdeu(void)
{
unsigned long long a = 74ULL;
@ -41,7 +41,7 @@ unsigned long long test_divdeu(void)
// CHECK: @llvm.ppc.divdeu
}
// CHECK-LABEL: define i64 @test_bpermd
// CHECK-LABEL: define dso_local i64 @test_bpermd
long long test_bpermd(void)
{
long long a = 74LL;

2
clang/test/CodeGen/builtins-ppc-p8vector.c
View File

@ -64,7 +64,7 @@ vector unsigned __int128 res_vux;
vector float res_vf;
vector double res_vd;
// CHECK-LABEL: define void @test1
// CHECK-LABEL: define dso_local void @test1
void test1() {
/* vec_abs */

2
clang/test/CodeGen/builtins-ppc-quadword.c
View File

@ -27,7 +27,7 @@ vector signed __int128 res_vlll;
vector unsigned __int128 res_vulll;
// CHECK-LABEL: define void @test1
// CHECK-LABEL: define dso_local void @test1
void test1() {
/* vec_add */

4
clang/test/CodeGen/builtins-ppc-vsx.c
View File

@ -64,8 +64,8 @@ unsigned int res_aui[4];
void dummy() { }
void test1() {
// CHECK-LABEL: define void @test1
// CHECK-LE-LABEL: define void @test1
// CHECK-LABEL: define dso_local void @test1
// CHECK-LE-LABEL: define dso_local void @test1
res_vf = vec_abs(vf);
// CHECK: call <4 x float> @llvm.fabs.v4f32(<4 x float> %{{[0-9]*}})

2
clang/test/CodeGen/builtins-ppc.c
View File

@ -8,7 +8,7 @@ void test_eh_return_data_regno()
res = __builtin_eh_return_data_regno(1); // CHECK: store volatile i32 4
}
// CHECK-LABEL: define i64 @test_builtin_ppc_get_timebase
// CHECK-LABEL: define dso_local i64 @test_builtin_ppc_get_timebase
long long test_builtin_ppc_get_timebase() {
// CHECK: call i64 @llvm.readcyclecounter()
return __builtin_ppc_get_timebase();

14
clang/test/CodeGen/c11atomics.c
View File

@ -25,10 +25,10 @@ struct elem {
// CHECK-DAG: %struct.elem = type { %struct.ptr }
struct ptr object;
// CHECK-DAG: @object = common global %struct.ptr zeroinitializer
// CHECK-DAG: @object = common dso_local global %struct.ptr zeroinitializer
// CHECK-DAG: @testStructGlobal = global {{.*}} { i16 1, i16 2, i16 3, i16 4 }
// CHECK-DAG: @testPromotedStructGlobal = global {{.*}} { %{{.*}} { i16 1, i16 2, i16 3 }, [2 x i8] zeroinitializer }
// CHECK-DAG: @testStructGlobal = dso_local global {{.*}} { i16 1, i16 2, i16 3, i16 4 }
// CHECK-DAG: @testPromotedStructGlobal = dso_local global {{.*}} { %{{.*}} { i16 1, i16 2, i16 3 }, [2 x i8] zeroinitializer }
typedef int __attribute__((vector_size(16))) vector;
@ -154,7 +154,7 @@ void testandeq(void)
s &= 42;
}
// CHECK-LABEL: define arm_aapcscc void @testFloat(float*
// CHECK-LABEL: define dso_local arm_aapcscc void @testFloat(float*
void testFloat(_Atomic(float) *fp) {
// CHECK: [[FP:%.*]] = alloca float*
// CHECK-NEXT: [[X:%.*]] = alloca float
@ -189,7 +189,7 @@ void testFloat(_Atomic(float) *fp) {
// CHECK-NEXT: ret void
}
// CHECK: define arm_aapcscc void @testComplexFloat([[CF:{ float, float }]]*
// CHECK: define dso_local arm_aapcscc void @testComplexFloat([[CF:{ float, float }]]*
void testComplexFloat(_Atomic(_Complex float) *fp) {
// CHECK: [[FP:%.*]] = alloca [[CF]]*, align 4
// CHECK-NEXT: [[X:%.*]] = alloca [[CF]], align 8
@ -244,7 +244,7 @@ void testComplexFloat(_Atomic(_Complex float) *fp) {
typedef struct { short x, y, z, w; } S;
_Atomic S testStructGlobal = (S){1, 2, 3, 4};
// CHECK: define arm_aapcscc void @testStruct([[S:.*]]*
// CHECK: define dso_local arm_aapcscc void @testStruct([[S:.*]]*
void testStruct(_Atomic(S) *fp) {
// CHECK: [[FP:%.*]] = alloca [[S]]*, align 4
// CHECK-NEXT: [[X:%.*]] = alloca [[S]], align 8
@ -293,7 +293,7 @@ void testStruct(_Atomic(S) *fp) {
typedef struct { short x, y, z; } PS;
_Atomic PS testPromotedStructGlobal = (PS){1, 2, 3};
// CHECK: define arm_aapcscc void @testPromotedStruct([[APS:.*]]*
// CHECK: define dso_local arm_aapcscc void @testPromotedStruct([[APS:.*]]*
void testPromotedStruct(_Atomic(PS) *fp) {
// CHECK: [[FP:%.*]] = alloca [[APS]]*, align 4
// CHECK-NEXT: [[X:%.*]] = alloca [[APS]], align 8

2
clang/test/CodeGen/catch-alignment-assumption-attribute-align_value-on-lvalue.cpp
View File

@ -14,7 +14,7 @@ struct ac_struct {
// CHECK-SANITIZE-ANYRECOVER: @[[LINE_100_ALIGNMENT_ASSUMPTION:.*]] = {{.*}}, i32 100, i32 13 }, {{.*}}* @[[ALIGNED_CHAR]] }
char **load_from_ac_struct(struct ac_struct *x) {
// CHECK: define i8** @{{.*}}(%[[STRUCT_AC_STRUCT]]* %[[X:.*]])
// CHECK: define dso_local i8** @{{.*}}(%[[STRUCT_AC_STRUCT]]* %[[X:.*]])
// CHECK-NEXT: [[ENTRY:.*]]:
// CHECK-NEXT: %[[STRUCT_AC_STRUCT_ADDR:.*]] = alloca %[[STRUCT_AC_STRUCT]]*, align 8
// CHECK-NEXT: store %[[STRUCT_AC_STRUCT]]* %[[X]], %[[STRUCT_AC_STRUCT]]** %[[STRUCT_AC_STRUCT_ADDR]], align 8

4
clang/test/CodeGen/catch-alignment-assumption-attribute-align_value-on-paramvar.cpp
View File

@ -7,8 +7,8 @@
// CHECK-SANITIZE-ANYRECOVER: @[[LINE_100_ALIGNMENT_ASSUMPTION:.*]] = {{.*}}, i32 100, i32 10 }, {{.*}}* @[[CHAR]] }
char **passthrough(__attribute__((align_value(0x80000000))) char **x) {
// CHECK-NOSANITIZE: define i8** @{{.*}}(i8** align 536870912 %[[X:.*]])
// CHECK-SANITIZE: define i8** @{{.*}}(i8** %[[X:.*]])
// CHECK-NOSANITIZE: define dso_local i8** @{{.*}}(i8** align 536870912 %[[X:.*]])
// CHECK-SANITIZE: define dso_local i8** @{{.*}}(i8** %[[X:.*]])
// CHECK-NEXT: [[entry:.*]]:
// CHECK-NEXT: %[[X_ADDR:.*]] = alloca i8**, align 8
// CHECK-NEXT: store i8** %[[X]], i8*** %[[X_ADDR]], align 8

4
clang/test/CodeGen/catch-alignment-assumption-attribute-alloc_align-on-function-variable.cpp
View File

@ -8,7 +8,7 @@
char **__attribute__((alloc_align(2)))
passthrough(char **x, unsigned long alignment) {
// CHECK: define i8** @[[PASSTHROUGH:.*]](i8** %[[X:.*]], i64 %[[ALIGNMENT:.*]])
// CHECK: define dso_local i8** @[[PASSTHROUGH:.*]](i8** %[[X:.*]], i64 %[[ALIGNMENT:.*]])
// CHECK-NEXT: entry:
// CHECK-NEXT: %[[X_ADDR:.*]] = alloca i8**, align 8
// CHECK-NEXT: %[[ALIGNMENT_ADDR:.*]] = alloca i64, align 8
@ -21,7 +21,7 @@ passthrough(char **x, unsigned long alignment) {
}
char **caller(char **x, unsigned long alignment) {
// CHECK: define i8** @{{.*}}(i8** %[[X:.*]], i64 %[[ALIGNMENT:.*]])
// CHECK: define dso_local i8** @{{.*}}(i8** %[[X:.*]], i64 %[[ALIGNMENT:.*]])
// CHECK-NEXT: entry:
// CHECK-NEXT: %[[X_ADDR:.*]] = alloca i8**, align 8
// CHECK-NEXT: %[[ALIGNMENT_ADDR:.*]] = alloca i64, align 8

4
clang/test/CodeGen/catch-alignment-assumption-attribute-alloc_align-on-function.cpp
View File

@ -8,7 +8,7 @@
char **__attribute__((alloc_align(2)))
passthrough(char **x, unsigned long alignment) {
// CHECK: define i8** @[[PASSTHROUGH:.*]](i8** %[[X:.*]], i64 %[[ALIGNMENT:.*]])
// CHECK: define dso_local i8** @[[PASSTHROUGH:.*]](i8** %[[X:.*]], i64 %[[ALIGNMENT:.*]])
// CHECK-NEXT: entry:
// CHECK-NEXT: %[[X_ADDR:.*]] = alloca i8**, align 8
// CHECK-NEXT: %[[ALIGNMENT_ADDR:.*]] = alloca i64, align 8
@ -21,7 +21,7 @@ passthrough(char **x, unsigned long alignment) {
}
char **caller(char **x) {
// CHECK: define i8** @{{.*}}(i8** %[[X:.*]])
// CHECK: define dso_local i8** @{{.*}}(i8** %[[X:.*]])
// CHECK-NEXT: entry:
// CHECK-NEXT: %[[X_ADDR:.*]] = alloca i8**, align 8
// CHECK-NEXT: store i8** %[[X]], i8*** %[[X_ADDR]], align 8

4
clang/test/CodeGen/catch-alignment-assumption-attribute-assume_aligned-on-function-two-params.cpp
View File

@ -7,7 +7,7 @@
// CHECK-SANITIZE-ANYRECOVER: @[[LINE_100_ALIGNMENT_ASSUMPTION:.*]] = {{.*}}, i32 100, i32 10 }, {{.*}}* @[[CHAR]] }
char **__attribute__((assume_aligned(0x80000000, 42))) passthrough(char **x) {
// CHECK: define i8** @[[PASSTHROUGH:.*]](i8** %[[X:.*]])
// CHECK: define dso_local i8** @[[PASSTHROUGH:.*]](i8** %[[X:.*]])
// CHECK-NEXT: entry:
// CHECK-NEXT: %[[X_ADDR:.*]] = alloca i8**, align 8
// CHECK-NEXT: store i8** %[[X]], i8*** %[[X_ADDR]], align 8
@ -18,7 +18,7 @@ char **__attribute__((assume_aligned(0x80000000, 42))) passthrough(char **x) {
}
char **caller(char **x) {
// CHECK: define i8** @{{.*}}(i8** %[[X:.*]])
// CHECK: define dso_local i8** @{{.*}}(i8** %[[X:.*]])
// CHECK-NEXT: entry:
// CHECK-NEXT: %[[X_ADDR:.*]] = alloca i8**, align 8
// CHECK-NEXT: store i8** %[[X]], i8*** %[[X_ADDR]], align 8

4
clang/test/CodeGen/catch-alignment-assumption-attribute-assume_aligned-on-function.cpp
View File

@ -7,7 +7,7 @@
// CHECK-SANITIZE-ANYRECOVER: @[[LINE_100_ALIGNMENT_ASSUMPTION:.*]] = {{.*}}, i32 100, i32 10 }, {{.*}}* @[[CHAR]] }
char **__attribute__((assume_aligned(128))) passthrough(char **x) {
// CHECK: define i8** @[[PASSTHROUGH:.*]](i8** %[[X:.*]])
// CHECK: define dso_local i8** @[[PASSTHROUGH:.*]](i8** %[[X:.*]])
// CHECK-NEXT: entry:
// CHECK-NEXT: %[[X_ADDR:.*]] = alloca i8**, align 8
// CHECK-NEXT: store i8** %[[X]], i8*** %[[X_ADDR]], align 8
@ -18,7 +18,7 @@ char **__attribute__((assume_aligned(128))) passthrough(char **x) {
}
char **caller(char **x) {
// CHECK: define i8** @{{.*}}(i8** %[[X]])
// CHECK: define dso_local i8** @{{.*}}(i8** %[[X]])
// CHECK-NEXT: entry:
// CHECK-NEXT: %[[X_ADDR]] = alloca i8**, align 8
// CHECK-NEXT: store i8** %[[X]], i8*** %[[X_ADDR]], align 8

2
clang/test/CodeGen/catch-alignment-assumption-builtin_assume_aligned-three-params-variable.cpp
View File

@ -7,7 +7,7 @@
// CHECK-SANITIZE-ANYRECOVER: @[[LINE_100_ALIGNMENT_ASSUMPTION:.*]] = {{.*}}, i32 100, i32 35 }, {{.*}}* @[[CHAR]] }
void *caller(char **x, unsigned long offset) {
// CHECK: define i8* @{{.*}}(i8** %[[X:.*]], i64 %[[OFFSET:.*]])
// CHECK: define dso_local i8* @{{.*}}(i8** %[[X:.*]], i64 %[[OFFSET:.*]])
// CHECK-NEXT: entry:
// CHECK-NEXT: %[[X_ADDR:.*]] = alloca i8**, align 8
// CHECK-NEXT: %[[OFFSET_ADDR:.*]] = alloca i64, align 8

2
clang/test/CodeGen/catch-alignment-assumption-builtin_assume_aligned-three-params.cpp
View File

@ -7,7 +7,7 @@
// CHECK-SANITIZE-ANYRECOVER: @[[LINE_100_ALIGNMENT_ASSUMPTION:.*]] = {{.*}}, i32 100, i32 35 }, {{.*}}* @[[CHAR]] }
void *caller(char **x) {
// CHECK: define i8* @{{.*}}(i8** %[[X:.*]])
// CHECK: define dso_local i8* @{{.*}}(i8** %[[X:.*]])
// CHECK-NEXT: entry:
// CHECK-NEXT: %[[X_ADDR:.*]] = alloca i8**, align 8
// CHECK-NEXT: store i8** %[[X]], i8*** %[[X_ADDR]], align 8

2
clang/test/CodeGen/catch-alignment-assumption-builtin_assume_aligned-two-params.cpp
View File

@ -7,7 +7,7 @@
// CHECK-SANITIZE-ANYRECOVER: @[[LINE_100_ALIGNMENT_ASSUMPTION:.*]] = {{.*}}, i32 100, i32 35 }, {{.*}}* @[[CHAR]] }
void *caller(char **x) {
// CHECK: define i8* @{{.*}}(i8** %[[X:.*]])
// CHECK: define dso_local i8* @{{.*}}(i8** %[[X:.*]])
// CHECK-NEXT: entry:
// CHECK-NEXT: %[[X_ADDR:.*]] = alloca i8**, align 8
// CHECK-NEXT: store i8** %[[X]], i8*** %[[X_ADDR]], align 8

2
clang/test/CodeGen/catch-alignment-assumption-openmp.cpp
View File

@ -7,7 +7,7 @@
// CHECK-SANITIZE-ANYRECOVER: @[[LINE_100_ALIGNMENT_ASSUMPTION:.*]] = {{.*}}, i32 100, i32 30 }, {{.*}}* @[[CHAR]] }
void func(char *data) {
// CHECK: define void @{{.*}}(i8* %[[DATA:.*]])
// CHECK: define dso_local void @{{.*}}(i8* %[[DATA:.*]])
// CHECK-NEXT: [[ENTRY:.*]]:
// CHECK-NEXT: %[[DATA_ADDR:.*]] = alloca i8*, align 8
// CHECK: store i8* %[[DATA]], i8** %[[DATA_ADDR]], align 8

4
clang/test/CodeGen/catch-nullptr-and-nonzero-offset-in-offsetof-idiom.c
View File

@ -14,7 +14,7 @@ struct S {
int x, y;
};
// CHECK-LABEL: define i64 @{{.*}}get_offset_of_y_naively{{.*}}(
// CHECK-LABEL: define dso_local i64 @{{.*}}get_offset_of_y_naively{{.*}}(
uintptr_t get_offset_of_y_naively() {
// CHECK: [[ENTRY:.*]]:
// CHECK-NEXT: ret i64 ptrtoint (i32* getelementptr (i32, i32* null, i32 1) to i64)
@ -22,7 +22,7 @@ uintptr_t get_offset_of_y_naively() {
return ((uintptr_t)(&(((struct S *)0)->y)));
}
// CHECK-LABEL: define i64 @{{.*}}get_offset_of_y_via_builtin{{.*}}(
// CHECK-LABEL: define dso_local i64 @{{.*}}get_offset_of_y_via_builtin{{.*}}(
uintptr_t get_offset_of_y_via_builtin() {
// CHECK: [[ENTRY:.*]]:
// CHECK-NEXT: ret i64 4

2
clang/test/CodeGen/catch-nullptr-and-nonzero-offset-when-nullptr-is-defined.c
View File

@ -25,7 +25,7 @@ extern "C" {
#endif
char *add_unsigned(char *base, unsigned long offset) {
// CHECK: define i8* @add_unsigned(i8* %[[BASE:.*]], i64 %[[OFFSET:.*]])
// CHECK: define dso_local i8* @add_unsigned(i8* %[[BASE:.*]], i64 %[[OFFSET:.*]])
// CHECK-NEXT: [[ENTRY:.*]]:
// CHECK-NEXT: %[[BASE_ADDR:.*]] = alloca i8*, align 8
// CHECK-NEXT: %[[OFFSET_ADDR:.*]] = alloca i64, align 8

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