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Fix a couple issues with Win64 ABI 

1) all registers were spilled as xmm, regardless of actual size
2) win64 abi doesn't do the varargs-size-in-%al thing

Still to look into:

xmm6-15 are marked as clobbered by call instructions on win64 even though they aren't.

llvm-svn: 109035
This commit is contained in:
Nate Begeman 2010-07-21 20:49:52 +00:00
parent f6331109f0
commit 784e062b2a
2 changed files with 3 additions and 6 deletions
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3
llvm/lib/Target/X86/X86ISelLowering.cpp
View File

@ -1990,7 +1990,7 @@ X86TargetLowering::LowerCall(SDValue Chain, SDValue Callee,
} }
} }
if (Is64Bit && isVarArg) { if (Is64Bit && isVarArg && !Subtarget->isTargetWin64()) {
// From AMD64 ABI document: // From AMD64 ABI document:
// For calls that may call functions that use varargs or stdargs // For calls that may call functions that use varargs or stdargs
// (prototype-less calls or calls to functions containing ellipsis (...) in // (prototype-less calls or calls to functions containing ellipsis (...) in
@ -1999,7 +1999,6 @@ X86TargetLowering::LowerCall(SDValue Chain, SDValue Callee,
// the number of registers, but must be an ubound on the number of SSE // the number of registers, but must be an ubound on the number of SSE
// registers used and is in the range 0 - 8 inclusive. // registers used and is in the range 0 - 8 inclusive.
// FIXME: Verify this on Win64
// Count the number of XMM registers allocated. // Count the number of XMM registers allocated.
static const unsigned XMMArgRegs[] = { static const unsigned XMMArgRegs[] = {
X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3,

6
llvm/lib/Target/X86/X86InstrInfo.cpp
View File

@ -2062,7 +2062,6 @@ bool X86InstrInfo::spillCalleeSavedRegisters(MachineBasicBlock &MBB,
DebugLoc DL = MBB.findDebugLoc(MI); DebugLoc DL = MBB.findDebugLoc(MI);
bool is64Bit = TM.getSubtarget<X86Subtarget>().is64Bit(); bool is64Bit = TM.getSubtarget<X86Subtarget>().is64Bit();
bool isWin64 = TM.getSubtarget<X86Subtarget>().isTargetWin64();
unsigned SlotSize = is64Bit ? 8 : 4; unsigned SlotSize = is64Bit ? 8 : 4;
MachineFunction &MF = *MBB.getParent(); MachineFunction &MF = *MBB.getParent();
@ -2078,7 +2077,7 @@ bool X86InstrInfo::spillCalleeSavedRegisters(MachineBasicBlock &MBB,
if (Reg == FPReg) if (Reg == FPReg)
// X86RegisterInfo::emitPrologue will handle spilling of frame register. // X86RegisterInfo::emitPrologue will handle spilling of frame register.
continue; continue;
if (!X86::VR128RegClass.contains(Reg) && !isWin64) { if (!X86::VR128RegClass.contains(Reg)) {
CalleeFrameSize += SlotSize; CalleeFrameSize += SlotSize;
BuildMI(MBB, MI, DL, get(Opc)).addReg(Reg, RegState::Kill); BuildMI(MBB, MI, DL, get(Opc)).addReg(Reg, RegState::Kill);
} else { } else {
@ -2103,14 +2102,13 @@ bool X86InstrInfo::restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
MachineFunction &MF = *MBB.getParent(); MachineFunction &MF = *MBB.getParent();
unsigned FPReg = RI.getFrameRegister(MF); unsigned FPReg = RI.getFrameRegister(MF);
bool is64Bit = TM.getSubtarget<X86Subtarget>().is64Bit(); bool is64Bit = TM.getSubtarget<X86Subtarget>().is64Bit();
bool isWin64 = TM.getSubtarget<X86Subtarget>().isTargetWin64();
unsigned Opc = is64Bit ? X86::POP64r : X86::POP32r; unsigned Opc = is64Bit ? X86::POP64r : X86::POP32r;
for (unsigned i = 0, e = CSI.size(); i != e; ++i) { for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
unsigned Reg = CSI[i].getReg(); unsigned Reg = CSI[i].getReg();
if (Reg == FPReg) if (Reg == FPReg)
// X86RegisterInfo::emitEpilogue will handle restoring of frame register. // X86RegisterInfo::emitEpilogue will handle restoring of frame register.
continue; continue;
if (!X86::VR128RegClass.contains(Reg) && !isWin64) { if (!X86::VR128RegClass.contains(Reg)) {
BuildMI(MBB, MI, DL, get(Opc), Reg); BuildMI(MBB, MI, DL, get(Opc), Reg);
} else { } else {
loadRegFromStackSlot(MBB, MI, Reg, CSI[i].getFrameIdx(), loadRegFromStackSlot(MBB, MI, Reg, CSI[i].getFrameIdx(),