forked from OSchip/llvm-project
[AArch64] Update tests with the `update_llc_test_checks.py` script (NFC)
Reviewed By: Kmeakin Differential Revision: https://reviews.llvm.org/D123317
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@ -1,65 +1,96 @@
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; RUN: llc -verify-machineinstrs < %s -mtriple=arm64-apple-ios7.0 | FileCheck --check-prefix=CHECK --check-prefix=CHECK-LE %s
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; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64_be-none-linux-gnu | FileCheck --check-prefix=CHECK --check-prefix=CHECK-BE %s
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs < %s -mtriple=arm64-apple-ios7.0 | FileCheck --check-prefix=CHECK-LE %s
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; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64_be-none-linux-gnu | FileCheck --check-prefix=CHECK-BE %s
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define i128 @test_simple(i128 %a, i128 %b, i128 %c) {
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; CHECK-LABEL: test_simple:
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; CHECK-LE-LABEL: test_simple:
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; CHECK-LE: ; %bb.0:
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; CHECK-LE-NEXT: adds x8, x0, x2
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; CHECK-LE-NEXT: adcs x9, x1, x3
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; CHECK-LE-NEXT: subs x0, x8, x4
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; CHECK-LE-NEXT: sbcs x1, x9, x5
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; CHECK-LE-NEXT: ret
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;
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; CHECK-BE-LABEL: test_simple:
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; CHECK-BE: // %bb.0:
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; CHECK-BE-NEXT: adds x8, x1, x3
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; CHECK-BE-NEXT: adcs x9, x0, x2
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; CHECK-BE-NEXT: subs x1, x8, x5
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; CHECK-BE-NEXT: sbcs x0, x9, x4
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; CHECK-BE-NEXT: ret
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%valadd = add i128 %a, %b
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; CHECK-LE: adds [[ADDLO:x[0-9]+]], x0, x2
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; CHECK-LE-NEXT: adcs [[ADDHI:x[0-9]+]], x1, x3
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; CHECK-BE: adds [[ADDLO:x[0-9]+]], x1, x3
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; CHECK-BE-NEXT: adcs [[ADDHI:x[0-9]+]], x0, x2
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%valsub = sub i128 %valadd, %c
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; CHECK-LE: subs x0, [[ADDLO]], x4
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; CHECK-LE: sbcs x1, [[ADDHI]], x5
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; CHECK-BE: subs x1, [[ADDLO]], x5
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; CHECK-BE: sbcs x0, [[ADDHI]], x4
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ret i128 %valsub
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; CHECK: ret
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}
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define i128 @test_imm(i128 %a) {
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; CHECK-LABEL: test_imm:
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; CHECK-LE-LABEL: test_imm:
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; CHECK-LE: ; %bb.0:
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; CHECK-LE-NEXT: adds x0, x0, #12
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; CHECK-LE-NEXT: adcs x1, x1, xzr
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; CHECK-LE-NEXT: ret
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;
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; CHECK-BE-LABEL: test_imm:
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; CHECK-BE: // %bb.0:
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; CHECK-BE-NEXT: adds x1, x1, #12
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; CHECK-BE-NEXT: adcs x0, x0, xzr
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; CHECK-BE-NEXT: ret
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%val = add i128 %a, 12
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; CHECK-LE: adds x0, x0, #12
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; CHECK-LE: adcs x1, x1, {{x[0-9]|xzr}}
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; CHECK-BE: adds x1, x1, #12
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; CHECK-BE: adcs x0, x0, {{x[0-9]|xzr}}
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ret i128 %val
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; CHECK: ret
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}
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define i128 @test_shifted(i128 %a, i128 %b) {
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; CHECK-LABEL: test_shifted:
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; CHECK-LE-LABEL: test_shifted:
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; CHECK-LE: ; %bb.0:
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; CHECK-LE-NEXT: extr x8, x3, x2, #19
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; CHECK-LE-NEXT: adds x0, x0, x2, lsl #45
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; CHECK-LE-NEXT: adcs x1, x1, x8
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; CHECK-LE-NEXT: ret
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;
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; CHECK-BE-LABEL: test_shifted:
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; CHECK-BE: // %bb.0:
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; CHECK-BE-NEXT: extr x8, x2, x3, #19
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; CHECK-BE-NEXT: adds x1, x1, x3, lsl #45
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; CHECK-BE-NEXT: adcs x0, x0, x8
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; CHECK-BE-NEXT: ret
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%rhs = shl i128 %b, 45
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%val = add i128 %a, %rhs
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; CHECK-LE: adds x0, x0, x2, lsl #45
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; CHECK-LE: adcs x1, x1, {{x[0-9]}}
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; CHECK-BE: adds x1, x1, x3, lsl #45
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; CHECK-BE: adcs x0, x0, {{x[0-9]}}
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ret i128 %val
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; CHECK: ret
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}
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define i128 @test_extended(i128 %a, i16 %b) {
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; CHECK-LABEL: test_extended:
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; CHECK-LE-LABEL: test_extended:
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; CHECK-LE: ; %bb.0:
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; CHECK-LE-NEXT: ; kill: def $w2 killed $w2 def $x2
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; CHECK-LE-NEXT: sxth x8, w2
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; CHECK-LE-NEXT: adds x0, x0, w2, sxth #3
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; CHECK-LE-NEXT: asr x9, x8, #63
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; CHECK-LE-NEXT: extr x8, x9, x8, #61
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; CHECK-LE-NEXT: adcs x1, x1, x8
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; CHECK-LE-NEXT: ret
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;
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; CHECK-BE-LABEL: test_extended:
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; CHECK-BE: // %bb.0:
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; CHECK-BE-NEXT: // kill: def $w2 killed $w2 def $x2
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; CHECK-BE-NEXT: sxth x8, w2
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; CHECK-BE-NEXT: adds x1, x1, w2, sxth #3
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; CHECK-BE-NEXT: asr x9, x8, #63
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; CHECK-BE-NEXT: extr x8, x9, x8, #61
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; CHECK-BE-NEXT: adcs x0, x0, x8
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; CHECK-BE-NEXT: ret
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%ext = sext i16 %b to i128
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%rhs = shl i128 %ext, 3
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%val = add i128 %a, %rhs
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; CHECK-LE: adds x0, x0, w2, sxth #3
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; CHECK-LE: adcs x1, x1, {{x[0-9]}}
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; CHECK-BE: adds x1, x1, w2, sxth #3
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; CHECK-BE: adcs x0, x0, {{x[0-9]}}
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ret i128 %val
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; CHECK: ret
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}
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@ -1,13 +1,16 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s | FileCheck %s
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target triple = "arm64-apple-ios7.0"
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define i64 @foo(i64* nocapture readonly %ptr, i64 %a, i64 %b, i64 %c) local_unnamed_addr #0 {
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; CHECK: ldr w8, [x0, #4]
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; CHECK: lsr x9, x1, #32
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; CHECK: cmn x3, x2
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; CHECK: mul x8, x8, x9
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; CHECK: cinc x0, x8, hs
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; CHECK: ret
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; CHECK-LABEL: foo:
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; CHECK: ; %bb.0: ; %entry
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; CHECK-NEXT: ldr w8, [x0, #4]
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; CHECK-NEXT: lsr x9, x1, #32
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; CHECK-NEXT: cmn x3, x2
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; CHECK-NEXT: mul x8, x8, x9
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; CHECK-NEXT: cinc x0, x8, hs
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; CHECK-NEXT: ret
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entry:
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%0 = lshr i64 %a, 32
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%1 = load i64, i64* %ptr, align 8
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@ -1,11 +1,28 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-eabi | FileCheck %s
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; CHECK: mrs [[NZCV_SAVE:x[0-9]+]], NZCV
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; CHECK: msr NZCV, [[NZCV_SAVE]]
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; DAG ends up with two uses for the flags from an ADCS node, which means they
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; must be saved for later.
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define void @f(i256* nocapture %a, i256* nocapture %b, i256* nocapture %cc, i256* nocapture %dd) nounwind uwtable noinline ssp {
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; CHECK-LABEL: f:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: ldp x9, x8, [x2]
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; CHECK-NEXT: ldp x11, x10, [x3]
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; CHECK-NEXT: adds x9, x9, x11
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; CHECK-NEXT: ldp x12, x11, [x2, #16]
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; CHECK-NEXT: adcs x8, x8, x10
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; CHECK-NEXT: ldp x13, x10, [x3, #16]
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; CHECK-NEXT: adcs x12, x12, x13
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; CHECK-NEXT: mrs x13, NZCV
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; CHECK-NEXT: adcs x14, x11, x10
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; CHECK-NEXT: orr x11, x11, #0x100
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; CHECK-NEXT: msr NZCV, x13
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; CHECK-NEXT: stp x9, x8, [x0]
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; CHECK-NEXT: adcs x10, x11, x10
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; CHECK-NEXT: stp x12, x14, [x0, #16]
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; CHECK-NEXT: stp x9, x8, [x1]
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; CHECK-NEXT: stp x12, x10, [x1, #16]
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; CHECK-NEXT: ret
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entry:
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%c = load i256, i256* %cc
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%d = load i256, i256* %dd
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