forked from OSchip/llvm-project
[AMDGPU] Fix large return values with amdgpu_gfx
Returning in memory is not supported, so fall back to sret. Also, extend i1 and i16 to i32. Otherwise, they would be passed through memory. Differential Revision: https://reviews.llvm.org/D100543
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@ -38,6 +38,9 @@ def CC_SI_Gfx : CallingConv<[
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]>;
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def RetCC_SI_Gfx : CallingConv<[
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CCIfType<[i1], CCPromoteToType<i32>>,
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CCIfType<[i1, i16], CCIfExtend<CCPromoteToType<i32>>>,
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// 0-3 are reserved for the stack buffer descriptor
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// 32 is reserved for the stack pointer
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CCIfInReg<CCIfType<[f32, i32, f16, i16, v2i16, v2f16] , CCAssignToReg<[
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@ -68,8 +71,6 @@ def RetCC_SI_Gfx : CallingConv<[
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VGPR120, VGPR121, VGPR122, VGPR123, VGPR124, VGPR125, VGPR126, VGPR127,
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VGPR128, VGPR129, VGPR130, VGPR131, VGPR132, VGPR133, VGPR134, VGPR135
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]>>>,
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CCIfType<[i32, f32, v2i16, v2f16, i16, f16, i1], CCAssignToStack<4, 4>>
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]>;
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def CC_SI_SHADER : CallingConv<[
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@ -216,13 +216,13 @@ define amdgpu_gfx void @test_gfx_call_external_i1_func_void() #0 {
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; GCN: [[GV:%[0-9]+]]:sreg_64(p0) = G_GLOBAL_VALUE @external_gfx_i1_func_void
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; GCN: [[COPY1:%[0-9]+]]:_(<4 x s32>) = COPY $sgpr0_sgpr1_sgpr2_sgpr3
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; GCN: $sgpr0_sgpr1_sgpr2_sgpr3 = COPY [[COPY1]](<4 x s32>)
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; GCN: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_gfx_i1_func_void, csr_amdgpu_highregs, implicit $sgpr0_sgpr1_sgpr2_sgpr3
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; GCN: [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %fixed-stack.0
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; GCN: [[LOAD:%[0-9]+]]:_(s1) = G_LOAD [[FRAME_INDEX]](p5) :: (invariant load 1 from %fixed-stack.0, align 16, addrspace 5)
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; GCN: $sgpr30_sgpr31 = SI_CALL [[GV]](p0), @external_gfx_i1_func_void, csr_amdgpu_highregs, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit-def $vgpr0
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; GCN: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr0
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; GCN: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[COPY2]](s32)
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; GCN: ADJCALLSTACKDOWN 0, 0, implicit-def $scc
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; GCN: G_STORE [[LOAD]](s1), [[DEF]](p1) :: (volatile store 1 into `i1 addrspace(1)* undef`, addrspace 1)
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; GCN: [[COPY2:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY]]
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; GCN: S_SETPC_B64_return [[COPY2]]
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; GCN: G_STORE [[TRUNC]](s1), [[DEF]](p1) :: (volatile store 1 into `i1 addrspace(1)* undef`, addrspace 1)
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; GCN: [[COPY3:%[0-9]+]]:ccr_sgpr_64 = COPY [[COPY]]
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; GCN: S_SETPC_B64_return [[COPY3]]
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%val = call amdgpu_gfx i1 @external_gfx_i1_func_void()
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store volatile i1 %val, i1 addrspace(1)* undef
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ret void
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