forked from OSchip/llvm-project
R600: Add a SubtargetFeatture for disabling the ifcvt pass.
This is useful when writing test cases for the AMDIL structurizer. llvm-svn: 195029
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@ -28,6 +28,11 @@ def FeatureIRStructurizer : SubtargetFeature <"enable-irstructurizer",
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// Target features
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def FeatureIfCvt : SubtargetFeature <"disable-ifcvt",
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"EnableIfCvt",
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"false",
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"Disable the if conversion pass">;
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def FeatureFP64 : SubtargetFeature<"fp64",
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"FP64",
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"true",
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@ -37,6 +37,7 @@ AMDGPUSubtarget::AMDGPUSubtarget(StringRef TT, StringRef CPU, StringRef FS) :
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FP64 = false;
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CaymanISA = false;
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EnableIRStructurizer = false;
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EnableIfCvt = true;
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ParseSubtargetFeatures(GPU, FS);
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DevName = GPU;
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}
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@ -70,6 +71,10 @@ AMDGPUSubtarget::IsIRStructurizerEnabled() const {
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return EnableIRStructurizer;
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}
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bool
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AMDGPUSubtarget::isIfCvtEnabled() const {
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return EnableIfCvt;
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}
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bool
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AMDGPUSubtarget::isTargetELF() const {
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return false;
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}
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@ -50,6 +50,7 @@ private:
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bool FP64;
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bool CaymanISA;
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bool EnableIRStructurizer;
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bool EnableIfCvt;
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InstrItineraryData InstrItins;
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@ -66,6 +67,7 @@ public:
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bool hasHWFP64() const;
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bool hasCaymanISA() const;
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bool IsIRStructurizerEnabled() const;
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bool isIfCvtEnabled() const;
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virtual bool enableMachineScheduler() const {
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return getGeneration() <= NORTHERN_ISLANDS;
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@ -169,7 +169,8 @@ bool AMDGPUPassConfig::addPreSched2() {
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if (ST.getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS)
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addPass(createR600EmitClauseMarkers(*TM));
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addPass(&IfConverterID);
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if (ST.isIfCvtEnabled())
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addPass(&IfConverterID);
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if (ST.getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS)
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addPass(createR600ClauseMergePass(*TM));
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return false;
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