forked from OSchip/llvm-project
parent
d006195517
commit
78100c41ca
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@ -394,7 +394,7 @@ void RA::assignRegOrSpillAtInterval(IntervalPtrs::value_type cur)
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DEBUG(std::cerr << "\tassigning stack slot at interval "<< *cur << ":\n");
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float minWeight = HUGE_VAL;
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float minWeight = (float)HUGE_VAL;
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unsigned minReg = 0;
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const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(cur->reg);
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for (TargetRegisterClass::iterator i = rc->allocation_order_begin(*mf_),
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@ -423,7 +423,7 @@ void RA::assignRegOrStackSlotAtInterval(LiveInterval* cur)
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DEBUG(std::cerr << "\tassigning stack slot at interval "<< *cur << ":\n");
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float minWeight = HUGE_VAL;
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float minWeight = float(HUGE_VAL);
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unsigned minReg = 0;
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const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(cur->reg);
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for (TargetRegisterClass::iterator i = rc->allocation_order_begin(*mf_),
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