forked from OSchip/llvm-project
Revert r162101 and replace it with a solution that works for targets where the pointer type is illegal.
This is a horrible bit of code. We're calling a simplification routine *in the middle* of type legalization. We tell the simplification routine that it's running after legalization, but some of the types it will encounter will be illegal! The fix is only to invoke the simplification if the types in question were legal, so that none of its invariants will be violated. llvm-svn: 199847
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@ -2577,13 +2577,17 @@ void DAGTypeLegalizer::IntegerExpandSetCCOperands(SDValue &NewLHS,
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// this identity: (B1 ? B2 : B3) --> (B1 & B2)|(!B1&B3)
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TargetLowering::DAGCombinerInfo DagCombineInfo(DAG, AfterLegalizeTypes, true, NULL);
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SDValue Tmp1, Tmp2;
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Tmp1 = TLI.SimplifySetCC(getSetCCResultType(LHSLo.getValueType()),
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LHSLo, RHSLo, LowCC, false, DagCombineInfo, dl);
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if (TLI.isTypeLegal(LHSLo.getValueType()) &&
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TLI.isTypeLegal(RHSLo.getValueType()))
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Tmp1 = TLI.SimplifySetCC(getSetCCResultType(LHSLo.getValueType()),
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LHSLo, RHSLo, LowCC, false, DagCombineInfo, dl);
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if (!Tmp1.getNode())
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Tmp1 = DAG.getSetCC(dl, getSetCCResultType(LHSLo.getValueType()),
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LHSLo, RHSLo, LowCC);
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Tmp2 = TLI.SimplifySetCC(getSetCCResultType(LHSHi.getValueType()),
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LHSHi, RHSHi, CCCode, false, DagCombineInfo, dl);
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if (TLI.isTypeLegal(LHSHi.getValueType()) &&
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TLI.isTypeLegal(RHSHi.getValueType()))
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Tmp2 = TLI.SimplifySetCC(getSetCCResultType(LHSHi.getValueType()),
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LHSHi, RHSHi, CCCode, false, DagCombineInfo, dl);
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if (!Tmp2.getNode())
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Tmp2 = DAG.getNode(ISD::SETCC, dl,
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getSetCCResultType(LHSHi.getValueType()),
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@ -1536,7 +1536,7 @@ TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1,
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N0.getOpcode() == ISD::AND)
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if (ConstantSDNode *AndRHS =
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dyn_cast<ConstantSDNode>(N0.getOperand(1))) {
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EVT ShiftTy = DCI.isBeforeLegalizeOps() ?
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EVT ShiftTy = DCI.isBeforeLegalize() ?
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getPointerTy() : getShiftAmountTy(N0.getValueType());
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if (Cond == ISD::SETNE && C1 == 0) {// (X & 8) != 0 --> (X & 8) >> 3
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// Perform the xform if the AND RHS is a single bit.
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@ -1566,7 +1566,7 @@ TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1,
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const APInt &AndRHSC = AndRHS->getAPIntValue();
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if ((-AndRHSC).isPowerOf2() && (AndRHSC & C1) == C1) {
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unsigned ShiftBits = AndRHSC.countTrailingZeros();
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EVT ShiftTy = DCI.isBeforeLegalizeOps() ?
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EVT ShiftTy = DCI.isBeforeLegalize() ?
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getPointerTy() : getShiftAmountTy(N0.getValueType());
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EVT CmpTy = N0.getValueType();
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SDValue Shift = DAG.getNode(ISD::SRL, dl, CmpTy, N0.getOperand(0),
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@ -1594,7 +1594,7 @@ TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1,
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}
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NewC = NewC.lshr(ShiftBits);
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if (ShiftBits && isLegalICmpImmediate(NewC.getSExtValue())) {
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EVT ShiftTy = DCI.isBeforeLegalizeOps() ?
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EVT ShiftTy = DCI.isBeforeLegalize() ?
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getPointerTy() : getShiftAmountTy(N0.getValueType());
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EVT CmpTy = N0.getValueType();
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SDValue Shift = DAG.getNode(ISD::SRL, dl, CmpTy, N0,
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@ -27,5 +27,5 @@ if.end: ; preds = %if.then, %entry
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; CHECK-LABEL: fn1:
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; CHECK: shrq $32, [[REG:%.*]]
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; CHECK: je
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; CHECK: sete
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}
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