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[AVX-512] Add EVEX2VEX test cases for the cvt instructions fixed in r297599 and r297600. 

llvm-svn: 297603
This commit is contained in:
Craig Topper 2017-03-13 05:47:56 +00:00
parent bb4089d260
commit 7746565754
1 changed files with 20 additions and 0 deletions
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20
llvm/test/CodeGen/X86/evex-to-vex-compress.mir
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@ -2130,8 +2130,12 @@ body: |
%edi = VCVTSD2SIZrr %xmm0
; CHECK: %xmm0 = VCVTSD2SSrm %xmm0, %rdi, 1, _, 0, _
%xmm0 = VCVTSD2SSZrm %xmm0, %rdi, 1, _, 0, _
; CHECK: %xmm0 = Int_VCVTSD2SSrm %xmm0, %rdi, 1, _, 0, _
%xmm0 = VCVTSD2SSZrm_Int %xmm0, %rdi, 1, _, 0, _
; CHECK: %xmm0 = VCVTSD2SSrr %xmm0, _
%xmm0 = VCVTSD2SSZrr %xmm0, _
; CHECK: %xmm0 = Int_VCVTSD2SSrr %xmm0, _
%xmm0 = VCVTSD2SSZrr_Int %xmm0, _
; CHECK: %xmm0 = VCVTSI2SDrm %xmm0, %rdi, 1, _, 0, _
%xmm0 = VCVTSI2SDZrm %xmm0, %rdi, 1, _, 0, _
; CHECK: %xmm0 = Int_VCVTSI2SDrm %xmm0, %rdi, 1, _, 0, _
@ -2166,10 +2170,18 @@ body: |
%xmm0 = VCVTSI642SSZrr_Int %xmm0, _
; CHECK: %xmm0 = VCVTSS2SDrm %xmm0, %rdi, 1, _, 0, _
%xmm0 = VCVTSS2SDZrm %xmm0, %rdi, 1, _, 0, _
; CHECK: %xmm0 = Int_VCVTSS2SDrm %xmm0, %rdi, 1, _, 0, _
%xmm0 = VCVTSS2SDZrm_Int %xmm0, %rdi, 1, _, 0, _
; CHECK: %xmm0 = VCVTSS2SDrr %xmm0, _
%xmm0 = VCVTSS2SDZrr %xmm0, _
; CHECK: %xmm0 = Int_VCVTSS2SDrr %xmm0, _
%xmm0 = VCVTSS2SDZrr_Int %xmm0, _
; CHECK: %rdi = VCVTSS2SI64rm %rdi, %xmm0, 1, _, 0
%rdi = VCVTSS2SI64Zrm %rdi, %xmm0, 1, _, 0
; CHECK: %rdi = VCVTSS2SI64rr %xmm0
%rdi = VCVTSS2SI64Zrr %xmm0
; CHECK: %edi = VCVTSS2SIrm %rdi, %xmm0, 1, _, 0
%edi = VCVTSS2SIZrm %rdi, %xmm0, 1, _, 0
; CHECK: %edi = VCVTSS2SIrr %xmm0
%edi = VCVTSS2SIZrr %xmm0
; CHECK: %rdi = VCVTTSD2SI64rm %rdi, %xmm0, 1, _, 0
@ -4438,8 +4450,12 @@ body: |
%edi = VCVTSD2SIZrr %xmm16
; CHECK: %xmm16 = VCVTSD2SSZrm %xmm16, %rdi, 1, _, 0, _
%xmm16 = VCVTSD2SSZrm %xmm16, %rdi, 1, _, 0, _
; CHECK: %xmm16 = VCVTSD2SSZrm_Int %xmm16, %rdi, 1, _, 0, _
%xmm16 = VCVTSD2SSZrm_Int %xmm16, %rdi, 1, _, 0, _
; CHECK: %xmm16 = VCVTSD2SSZrr %xmm16, _
%xmm16 = VCVTSD2SSZrr %xmm16, _
; CHECK: %xmm16 = VCVTSD2SSZrr_Int %xmm16, _
%xmm16 = VCVTSD2SSZrr_Int %xmm16, _
; CHECK: %xmm16 = VCVTSI2SDZrm %xmm16, %rdi, 1, _, 0, _
%xmm16 = VCVTSI2SDZrm %xmm16, %rdi, 1, _, 0, _
; CHECK: %xmm16 = VCVTSI2SDZrm_Int %xmm16, %rdi, 1, _, 0, _
@ -4474,8 +4490,12 @@ body: |
%xmm16 = VCVTSI642SSZrr_Int %xmm16, _
; CHECK: %xmm16 = VCVTSS2SDZrm %xmm16, %rdi, 1, _, 0, _
%xmm16 = VCVTSS2SDZrm %xmm16, %rdi, 1, _, 0, _
; CHECK: %xmm16 = VCVTSS2SDZrm_Int %xmm16, %rdi, 1, _, 0, _
%xmm16 = VCVTSS2SDZrm_Int %xmm16, %rdi, 1, _, 0, _
; CHECK: %xmm16 = VCVTSS2SDZrr %xmm16, _
%xmm16 = VCVTSS2SDZrr %xmm16, _
; CHECK: %xmm16 = VCVTSS2SDZrr_Int %xmm16, _
%xmm16 = VCVTSS2SDZrr_Int %xmm16, _
; CHECK: %rdi = VCVTSS2SI64Zrm %rdi, %xmm16, 1, _, 0
%rdi = VCVTSS2SI64Zrm %rdi, %xmm16, 1, _, 0
; CHECK: %rdi = VCVTSS2SI64Zrr %xmm16