[DAG] Add llvm::isMinSignedConstant helper. NFC

Pulled out of D122754
This commit is contained in:
Simon Pilgrim 2022-04-01 17:47:24 +01:00
parent f054d291f2
commit 76cd11f303
3 changed files with 10 additions and 3 deletions

View File

@ -1667,6 +1667,9 @@ bool isAllOnesConstant(SDValue V);
/// Returns true if \p V is a constant integer one. /// Returns true if \p V is a constant integer one.
bool isOneConstant(SDValue V); bool isOneConstant(SDValue V);
/// Returns true if \p V is a constant min signed integer value.
bool isMinSignedConstant(SDValue V);
/// Return the non-bitcasted source operand of \p V if it exists. /// Return the non-bitcasted source operand of \p V if it exists.
/// If \p V is not a bitcasted value, it is returned as-is. /// If \p V is not a bitcasted value, it is returned as-is.
SDValue peekThroughBitcasts(SDValue V); SDValue peekThroughBitcasts(SDValue V);

View File

@ -10399,6 +10399,11 @@ bool llvm::isOneConstant(SDValue V) {
return Const != nullptr && Const->isOne(); return Const != nullptr && Const->isOne();
} }
bool llvm::isMinSignedConstant(SDValue V) {
ConstantSDNode *Const = dyn_cast<ConstantSDNode>(V);
return Const != nullptr && Const->isMinSignedValue();
}
SDValue llvm::peekThroughBitcasts(SDValue V) { SDValue llvm::peekThroughBitcasts(SDValue V) {
while (V.getOpcode() == ISD::BITCAST) while (V.getOpcode() == ISD::BITCAST)
V = V.getOperand(0); V = V.getOperand(0);

View File

@ -2435,9 +2435,8 @@ bool X86DAGToDAGISel::matchAddressRecursively(SDValue N, X86ISelAddressMode &AM,
// We want to look through a transform in InstCombine that // We want to look through a transform in InstCombine that
// turns 'add' with min_signed_val into 'xor', so we can treat this 'xor' // turns 'add' with min_signed_val into 'xor', so we can treat this 'xor'
// exactly like an 'add'. // exactly like an 'add'.
if (auto *NC1 = dyn_cast<ConstantSDNode>(N.getOperand(1))) if (isMinSignedConstant(N.getOperand(1)) && !matchAdd(N, AM, Depth))
if (NC1->isMinSignedValue() && !matchAdd(N, AM, Depth)) return false;
return false;
break; break;
case ISD::AND: { case ISD::AND: {