forked from OSchip/llvm-project
[DAGCombine] (x - C) - y -> (x - y) - C fold
Summary: Again only vectors affected. Frustrating. Let me take a look into that.. https://rise4fun.com/Alive/AAq Reviewers: RKSimon, craig.topper, spatel Reviewed By: RKSimon Subscribers: javed.absar, JDevlieghere, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D62294 llvm-svn: 361856
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@ -2957,6 +2957,13 @@ SDValue DAGCombiner::visitSUB(SDNode *N) {
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SDValue Sub = DAG.getNode(ISD::SUB, DL, VT, N0, N1.getOperand(0));
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return DAG.getNode(ISD::SUB, DL, VT, Sub, N1.getOperand(1));
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}
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// (x - C) - y -> (x - y) - C
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// This is necessary because SUB(X,C) -> ADD(X,-C) doesn't work for vectors.
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if (N0.hasOneUse() && N0.getOpcode() == ISD::SUB &&
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isConstantOrConstantVector(N0.getOperand(1))) {
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SDValue Sub = DAG.getNode(ISD::SUB, DL, VT, N0.getOperand(0), N1);
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return DAG.getNode(ISD::SUB, DL, VT, Sub, N0.getOperand(1));
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}
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// If the target's bool is represented as 0/-1, prefer to make this 'add 0/-1'
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// rather than 'sub 0/1' (the sext should get folded).
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@ -314,8 +314,8 @@ define <4 x i32> @vec_sink_sub_of_const_to_sub(<4 x i32> %a, <4 x i32> %b, <4 x
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; CHECK-NEXT: adrp x8, .LCPI20_0
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; CHECK-NEXT: ldr q3, [x8, :lo12:.LCPI20_0]
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; CHECK-NEXT: sub v0.4s, v0.4s, v1.4s
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; CHECK-NEXT: sub v0.4s, v0.4s, v3.4s
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; CHECK-NEXT: sub v0.4s, v0.4s, v2.4s
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; CHECK-NEXT: sub v0.4s, v0.4s, v3.4s
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; CHECK-NEXT: ret
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%t0 = sub <4 x i32> %a, %b
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%t1 = sub <4 x i32> %t0, <i32 42, i32 24, i32 undef, i32 46>
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@ -460,15 +460,15 @@ define <4 x i32> @vec_sink_sub_of_const_to_sub(<4 x i32> %a, <4 x i32> %b, <4 x
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; X32-LABEL: vec_sink_sub_of_const_to_sub:
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; X32: # %bb.0:
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; X32-NEXT: psubd %xmm1, %xmm0
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; X32-NEXT: psubd {{\.LCPI.*}}, %xmm0
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; X32-NEXT: psubd %xmm2, %xmm0
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; X32-NEXT: psubd {{\.LCPI.*}}, %xmm0
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; X32-NEXT: retl
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;
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; X64-LABEL: vec_sink_sub_of_const_to_sub:
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; X64: # %bb.0:
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; X64-NEXT: psubd %xmm1, %xmm0
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; X64-NEXT: psubd {{.*}}(%rip), %xmm0
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; X64-NEXT: psubd %xmm2, %xmm0
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; X64-NEXT: psubd {{.*}}(%rip), %xmm0
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; X64-NEXT: retq
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%t0 = sub <4 x i32> %a, %b
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%t1 = sub <4 x i32> %t0, <i32 42, i32 24, i32 undef, i32 46>
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