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[X86][Costmodel] Load/store i32/f32 Stride=6 VF=2 interleaving costs 

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/aec96Thee - for intels `Block RThroughput: =6.0`; for ryzens, `Block RThroughput: <=3.3`
So could pick cost of `6`.

For store we have:
https://godbolt.org/z/aec96Thee - for intels `Block RThroughput: =9.0`; for ryzens, `Block RThroughput: <=3.0`
So we could pick cost of `9`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D111083
This commit is contained in:
Roman Lebedev 2021-10-05 16:27:53 +03:00
parent c800119c46
commit 764fd5f463
No known key found for this signature in database
GPG Key ID: 083C3EBB4A1689E0
5 changed files with 8 additions and 4 deletions
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4
llvm/lib/Target/X86/X86TargetTransformInfo.cpp
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@ -5148,6 +5148,8 @@ InstructionCost X86TTIImpl::getInterleavedMemoryOpCostAVX2(
{6, MVT::v8i16, 39}, // (load 48i16 and) deinterleave into 6 x 8i16
{6, MVT::v16i16, 106}, // (load 96i16 and) deinterleave into 6 x 16i16
{6, MVT::v2i32, 6}, // (load 12i32 and) deinterleave into 6 x 2i32
{8, MVT::v8i32, 40} // (load 64i32 and) deinterleave into 8 x 8i32
};
@ -5228,6 +5230,8 @@ InstructionCost X86TTIImpl::getInterleavedMemoryOpCostAVX2(
{6, MVT::v4i16, 15}, // interleave 6 x 4i16 into 24i16 (and store)
{6, MVT::v8i16, 21}, // interleave 6 x 8i16 into 48i16 (and store)
{6, MVT::v16i16, 58}, // interleave 6 x 16i16 into 96i16 (and store)
{6, MVT::v2i32, 9}, // interleave 6 x 2i32 into 12i32 (and store)
};
if (Opcode == Instruction::Load) {

2
llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-6.ll
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@ -24,7 +24,7 @@ target triple = "x86_64-unknown-linux-gnu"
; AVX1: LV: Found an estimated cost of 228 for VF 16 For instruction: %v0 = load float, float* %in0, align 4
;
; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load float, float* %in0, align 4
; AVX2: LV: Found an estimated cost of 21 for VF 2 For instruction: %v0 = load float, float* %in0, align 4
; AVX2: LV: Found an estimated cost of 8 for VF 2 For instruction: %v0 = load float, float* %in0, align 4
; AVX2: LV: Found an estimated cost of 51 for VF 4 For instruction: %v0 = load float, float* %in0, align 4
; AVX2: LV: Found an estimated cost of 114 for VF 8 For instruction: %v0 = load float, float* %in0, align 4
; AVX2: LV: Found an estimated cost of 228 for VF 16 For instruction: %v0 = load float, float* %in0, align 4

2
llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-6.ll
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@ -24,7 +24,7 @@ target triple = "x86_64-unknown-linux-gnu"
; AVX1: LV: Found an estimated cost of 276 for VF 16 For instruction: %v0 = load i32, i32* %in0, align 4
;
; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load i32, i32* %in0, align 4
; AVX2: LV: Found an estimated cost of 30 for VF 2 For instruction: %v0 = load i32, i32* %in0, align 4
; AVX2: LV: Found an estimated cost of 8 for VF 2 For instruction: %v0 = load i32, i32* %in0, align 4
; AVX2: LV: Found an estimated cost of 63 for VF 4 For instruction: %v0 = load i32, i32* %in0, align 4
; AVX2: LV: Found an estimated cost of 138 for VF 8 For instruction: %v0 = load i32, i32* %in0, align 4
; AVX2: LV: Found an estimated cost of 276 for VF 16 For instruction: %v0 = load i32, i32* %in0, align 4

2
llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-6.ll
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@ -24,7 +24,7 @@ target triple = "x86_64-unknown-linux-gnu"
; AVX1: LV: Found an estimated cost of 228 for VF 16 For instruction: store float %v5, float* %out5, align 4
;
; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: store float %v5, float* %out5, align 4
; AVX2: LV: Found an estimated cost of 20 for VF 2 For instruction: store float %v5, float* %out5, align 4
; AVX2: LV: Found an estimated cost of 11 for VF 2 For instruction: store float %v5, float* %out5, align 4
; AVX2: LV: Found an estimated cost of 45 for VF 4 For instruction: store float %v5, float* %out5, align 4
; AVX2: LV: Found an estimated cost of 114 for VF 8 For instruction: store float %v5, float* %out5, align 4
; AVX2: LV: Found an estimated cost of 228 for VF 16 For instruction: store float %v5, float* %out5, align 4

2
llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-6.ll
View File

@ -24,7 +24,7 @@ target triple = "x86_64-unknown-linux-gnu"
; AVX1: LV: Found an estimated cost of 276 for VF 16 For instruction: store i32 %v5, i32* %out5, align 4
;
; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: store i32 %v5, i32* %out5, align 4
; AVX2: LV: Found an estimated cost of 29 for VF 2 For instruction: store i32 %v5, i32* %out5, align 4
; AVX2: LV: Found an estimated cost of 11 for VF 2 For instruction: store i32 %v5, i32* %out5, align 4
; AVX2: LV: Found an estimated cost of 57 for VF 4 For instruction: store i32 %v5, i32* %out5, align 4
; AVX2: LV: Found an estimated cost of 138 for VF 8 For instruction: store i32 %v5, i32* %out5, align 4
; AVX2: LV: Found an estimated cost of 276 for VF 16 For instruction: store i32 %v5, i32* %out5, align 4