forked from OSchip/llvm-project
Added initial support for DEBUG_LABEL allowing debug specific labels to be
inserted in the code. llvm-svn: 25104
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45e19098a6
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762e9ec06c
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@ -550,8 +550,9 @@ namespace llvm {
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///
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void EmitInitial() const;
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/// ShouldEmitDwarf - Determine if dwarf declarations should be made.
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///
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/// ShouldEmitDwarf - Returns true if dwarf declarations should be made.
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/// When called it also checks to see if debug info is newly available. if
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/// so the initial dwarf headers are emitted.
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bool ShouldEmitDwarf();
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/// BeginModule - Emit all dwarf sections that should come prior to the
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@ -52,6 +52,13 @@ public:
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///
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unsigned getNextUniqueID() { return UniqueID++; }
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/// RecordLabel - Records location information and associates it with a
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/// debug label. Returns unique label id.
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unsigned RecordLabel(unsigned Line, unsigned Col, unsigned SrcFile) {
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// FIXME - actually record.
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return getNextUniqueID();
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}
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bool doInitialization();
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bool doFinalization();
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@ -355,12 +355,17 @@ namespace ISD {
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LOCATION,
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// DEBUG_LOC - This node is used to represent source line information
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// embedded in the code. It takes token chain as input, then a line number,
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// then a column then a file id (provided by MachineDebugInfo), then a
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// unique id (provided by MachineDebugInfo for label gen). It produces a
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// token chain as output.
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// embedded in the code. It takes a token chain as input, then a line
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// number, then a column then a file id (provided by MachineDebugInfo.) It
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// produces a token chain as output.
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DEBUG_LOC,
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// DEBUG_LABEL - This node is used to mark a location in the code where a
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// label should be generated for use by the debug information. It takes a
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// token chain as input, the a unique id (provided by MachineDebugInfo.) It
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// produces a token chain as output.
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DEBUG_LABEL,
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// BUILTIN_OP_END - This must be the last enum value in this list.
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BUILTIN_OP_END,
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};
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@ -2117,8 +2117,7 @@ SDOperand DAGCombiner::visitDEBUGLOC(SDNode *N) {
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return DAG.getNode(ISD::DEBUG_LOC, MVT::Other, Chain.getOperand(0),
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N->getOperand(1),
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N->getOperand(2),
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N->getOperand(3),
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N->getOperand(4));
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N->getOperand(3));
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}
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return SDOperand();
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@ -619,20 +619,33 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
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default: assert(0 && "This action is not supported yet!");
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case TargetLowering::Expand: {
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MachineDebugInfo *DebugInfo = DAG.getMachineDebugInfo();
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if (TLI.isOperationLegal(ISD::DEBUG_LOC, MVT::Other) && DebugInfo) {
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bool useDEBUG_LOC = TLI.isOperationLegal(ISD::DEBUG_LOC, MVT::Other);
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bool useDEBUG_LABEL = TLI.isOperationLegal(ISD::DEBUG_LABEL, MVT::Other);
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if (DebugInfo && (useDEBUG_LOC || useDEBUG_LABEL)) {
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const std::string &FName =
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cast<StringSDNode>(Node->getOperand(3))->getValue();
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const std::string &DirName =
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cast<StringSDNode>(Node->getOperand(4))->getValue();
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unsigned SrcFile = DebugInfo->getUniqueSourceID(FName, DirName);
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std::vector<SDOperand> Ops;
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Ops.push_back(Tmp1); // chain
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Ops.push_back(Node->getOperand(1)); // line #
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Ops.push_back(Node->getOperand(2)); // col #
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const std::string &fname =
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cast<StringSDNode>(Node->getOperand(3))->getValue();
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const std::string &dirname =
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cast<StringSDNode>(Node->getOperand(4))->getValue();
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unsigned srcfile = DebugInfo->getUniqueSourceID(fname, dirname);
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Ops.push_back(DAG.getConstant(srcfile, MVT::i32)); // source file id
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unsigned id = DebugInfo->getNextUniqueID();
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Ops.push_back(DAG.getConstant(id, MVT::i32)); // label id
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Result = DAG.getNode(ISD::DEBUG_LOC, MVT::Other, Ops);
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SDOperand LineOp = Node->getOperand(1);
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SDOperand ColOp = Node->getOperand(2);
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if (useDEBUG_LOC) {
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Ops.push_back(LineOp); // line #
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Ops.push_back(ColOp); // col #
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Ops.push_back(DAG.getConstant(SrcFile, MVT::i32)); // source file id
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Result = DAG.getNode(ISD::DEBUG_LOC, MVT::Other, Ops);
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} else {
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unsigned Line = dyn_cast<ConstantSDNode>(LineOp)->getValue();
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unsigned Col = dyn_cast<ConstantSDNode>(ColOp)->getValue();
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unsigned ID = DebugInfo->RecordLabel(Line, Col, SrcFile);
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Ops.push_back(DAG.getConstant(ID, MVT::i32));
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Result = DAG.getNode(ISD::DEBUG_LABEL, MVT::Other, Ops);
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}
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} else {
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Result = Tmp1; // chain
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}
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@ -661,27 +674,40 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
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break;
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case ISD::DEBUG_LOC:
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assert(Node->getNumOperands() == 5 && "Invalid DEBUG_LOC node!");
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assert(Node->getNumOperands() == 4 && "Invalid DEBUG_LOC node!");
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switch (TLI.getOperationAction(ISD::DEBUG_LOC, MVT::Other)) {
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case TargetLowering::Promote:
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case TargetLowering::Expand:
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default: assert(0 && "This action is not supported yet!");
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case TargetLowering::Legal: {
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SDOperand Tmp5;
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Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
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Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the line #.
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Tmp3 = LegalizeOp(Node->getOperand(2)); // Legalize the col #.
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Tmp4 = LegalizeOp(Node->getOperand(3)); // Legalize the source file id.
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Tmp5 = LegalizeOp(Node->getOperand(4)); // Legalize the label id.
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if (Tmp1 != Node->getOperand(0) ||
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Tmp2 != Node->getOperand(1) ||
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Tmp3 != Node->getOperand(2) ||
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Tmp4 != Node->getOperand(3) ||
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Tmp5 != Node->getOperand(4)) {
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Result =
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DAG.getNode(ISD::DEBUG_LOC,MVT::Other, Tmp1, Tmp2, Tmp3, Tmp4, Tmp5);
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}
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case TargetLowering::Legal:
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Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
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Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the line #.
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Tmp3 = LegalizeOp(Node->getOperand(2)); // Legalize the col #.
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Tmp4 = LegalizeOp(Node->getOperand(3)); // Legalize the source file id.
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if (Tmp1 != Node->getOperand(0) ||
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Tmp2 != Node->getOperand(1) ||
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Tmp3 != Node->getOperand(2) ||
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Tmp4 != Node->getOperand(3)) {
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Result = DAG.getNode(ISD::DEBUG_LOC,MVT::Other, Tmp1, Tmp2, Tmp3, Tmp4);
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}
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break;
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}
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break;
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case ISD::DEBUG_LABEL:
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assert(Node->getNumOperands() == 2 && "Invalid DEBUG_LABEL node!");
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switch (TLI.getOperationAction(ISD::DEBUG_LABEL, MVT::Other)) {
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case TargetLowering::Promote:
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case TargetLowering::Expand:
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default: assert(0 && "This action is not supported yet!");
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case TargetLowering::Legal:
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Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain.
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Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the label id.
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if (Tmp1 != Node->getOperand(0) ||
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Tmp2 != Node->getOperand(1)) {
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Result = DAG.getNode(ISD::DEBUG_LABEL, MVT::Other, Tmp1, Tmp2);
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}
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break;
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}
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@ -2005,6 +2005,7 @@ const char *SDNode::getOperationName(const SelectionDAG *G) const {
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// Debug info
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case ISD::LOCATION: return "location";
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case ISD::DEBUG_LOC: return "debug_loc";
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case ISD::DEBUG_LABEL: return "debug_label";
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case ISD::CONDCODE:
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switch (cast<CondCodeSDNode>(this)->get()) {
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@ -103,7 +103,6 @@ AlphaTargetLowering::AlphaTargetLowering(TargetMachine &TM) : TargetLowering(TM)
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// We don't have line number support yet.
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setOperationAction(ISD::LOCATION, MVT::Other, Expand);
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setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
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// We want to legalize GlobalAddress and ConstantPool and
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// ExternalSymbols nodes into the appropriate instructions to
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@ -74,7 +74,6 @@ IA64TargetLowering::IA64TargetLowering(TargetMachine &TM)
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// We don't have line number support yet.
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setOperationAction(ISD::LOCATION, MVT::Other, Expand);
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setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
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//IA64 has these, but they are not implemented
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setOperationAction(ISD::CTTZ , MVT::i64 , Expand);
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@ -102,7 +102,6 @@ namespace {
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// We don't have line number support yet.
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setOperationAction(ISD::LOCATION, MVT::Other, Expand);
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setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
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computeRegisterProperties();
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@ -252,7 +252,9 @@ namespace {
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bool doFinalization(Module &M);
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void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.setPreservesAll();
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AU.addRequired<MachineDebugInfo>();
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PPCAsmPrinter::getAnalysisUsage(AU);
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}
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};
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@ -418,6 +420,9 @@ void PPCAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
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/// method to print assembly for each instruction.
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///
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bool DarwinAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
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// FIXME - is this the earliest this can be set.
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DW.SetDebugInfo(&getAnalysis<MachineDebugInfo>());
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SetupMachineFunction(MF);
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O << "\n\n";
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Mang->setUseQuotes(true);
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// Emit initial debug information.
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DW.SetDebugInfo(getAnalysisToUpdate<MachineDebugInfo>());
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DW.BeginModule();
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return false;
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}
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@ -94,8 +94,11 @@ PPCTargetLowering::PPCTargetLowering(TargetMachine &TM)
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// PowerPC does not have truncstore for i1.
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setOperationAction(ISD::TRUNCSTORE, MVT::i1, Promote);
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// PowerPC doesn't have line number support yet.
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// Support label based line numbers.
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setOperationAction(ISD::LOCATION, MVT::Other, Expand);
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// FIXME - use subtarget debug flags
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if (TM.getSubtarget<PPCSubtarget>().isDarwin())
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setOperationAction(ISD::DEBUG_LABEL, MVT::Other, Expand);
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// We want to legalize GlobalAddress and ConstantPool nodes into the
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// appropriate instructions to materialize the address.
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@ -955,11 +955,14 @@ def V_SET0 : VXForm_setzero<1220, (ops VRRC:$vD),
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// DWARF Pseudo Instructions
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//
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def DWARF_LOC : Pseudo<(ops i32imm:$line, i32imm:$col, i32imm:$file,
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i32imm:$id),
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"; .loc $file, $line, $col\nLdebug_loc$id:",
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def DWARF_LOC : Pseudo<(ops i32imm:$line, i32imm:$col, i32imm:$file),
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"; .loc $file, $line, $col",
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[(dwarf_loc (i32 imm:$line), (i32 imm:$col),
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(i32 imm:$file), (i32 imm:$id))]>;
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(i32 imm:$file))]>;
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def DWARF_LABEL : Pseudo<(ops i32imm:$id),
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"\nLdebug_loc$id:",
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[(dwarf_label (i32 imm:$id))]>;
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//===----------------------------------------------------------------------===//
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// PowerPC Instruction Patterns
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@ -153,7 +153,6 @@ SparcV8TargetLowering::SparcV8TargetLowering(TargetMachine &TM)
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// We don't have line number support yet.
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setOperationAction(ISD::LOCATION, MVT::Other, Expand);
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setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
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computeRegisterProperties();
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}
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@ -440,9 +440,12 @@ class ComplexPattern<ValueType ty, int numops, string fn, list<SDNode> roots = [
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//===----------------------------------------------------------------------===//
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// Dwarf support.
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//
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def SDT_dwarf_loc : SDTypeProfile<0, 4,
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[SDTCisInt<0>, SDTCisInt<1>, SDTCisInt<2>, SDTCisInt<3>]>;
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def dwarf_loc : SDNode<"ISD::DEBUG_LOC", SDT_dwarf_loc,[SDNPHasChain]>;
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def SDT_dwarf_loc : SDTypeProfile<0, 3,
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[SDTCisInt<0>, SDTCisInt<1>, SDTCisInt<2>]>;
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def dwarf_loc : SDNode<"ISD::DEBUG_LOC", SDT_dwarf_loc,[SDNPHasChain]>;
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def SDT_dwarf_label : SDTypeProfile<0, 1, [SDTCisInt<0>]>;
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def dwarf_label : SDNode<"ISD::DEBUG_LABEL", SDT_dwarf_label,[SDNPHasChain]>;
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@ -130,7 +130,6 @@ X86TargetLowering::X86TargetLowering(TargetMachine &TM)
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// We don't have line number support yet.
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setOperationAction(ISD::LOCATION, MVT::Other, Expand);
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setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
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if (X86ScalarSSE) {
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// Set up the FP register classes.
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