forked from OSchip/llvm-project
parent
664fcba5fa
commit
76112c3cb8
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@ -1365,7 +1365,7 @@ def PSHUFHWmi : Ii8<0x70, MRMSrcMem,
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(ops VR128:$dst, i128mem:$src1, i8imm:$src2),
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(ops VR128:$dst, i128mem:$src1, i8imm:$src2),
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"pshufhw {$src2, $src1, $dst|$dst, $src1, $src2}",
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"pshufhw {$src2, $src1, $dst|$dst, $src1, $src2}",
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[(set VR128:$dst, (v8i16 (vector_shuffle
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[(set VR128:$dst, (v8i16 (vector_shuffle
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(bc_v8i16 (loadv2i64 addr:$src1)), (undef),
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(load addr:$src1), (undef),
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PSHUFHW_shuffle_mask:$src2)))]>,
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PSHUFHW_shuffle_mask:$src2)))]>,
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XS, Requires<[HasSSE2]>;
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XS, Requires<[HasSSE2]>;
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@ -1381,7 +1381,7 @@ def PSHUFLWmi : Ii8<0x70, MRMSrcMem,
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(ops VR128:$dst, i128mem:$src1, i32i8imm:$src2),
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(ops VR128:$dst, i128mem:$src1, i32i8imm:$src2),
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"pshuflw {$src2, $src1, $dst|$dst, $src1, $src2}",
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"pshuflw {$src2, $src1, $dst|$dst, $src1, $src2}",
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[(set VR128:$dst, (v8i16 (vector_shuffle
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[(set VR128:$dst, (v8i16 (vector_shuffle
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(bc_v8i16 (loadv2i64 addr:$src1)), (undef),
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(load addr:$src1), (undef),
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PSHUFLW_shuffle_mask:$src2)))]>,
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PSHUFLW_shuffle_mask:$src2)))]>,
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XD, Requires<[HasSSE2]>;
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XD, Requires<[HasSSE2]>;
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@ -1823,11 +1823,28 @@ def : Pat<(vector_shuffle (v4i32 VR128:$src1), (load addr:$src2),
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(v4i32 (SHUFPSrm VR128:$src1, addr:$src2,
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(v4i32 (SHUFPSrm VR128:$src1, addr:$src2,
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SHUFP_int_shuffle_mask:$sm))>, Requires<[HasSSE2]>;
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SHUFP_int_shuffle_mask:$sm))>, Requires<[HasSSE2]>;
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// Shuffle v4f32 with PSHUF* if others do not match.
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// Special pshuf* cases: folding (bit_convert (loadv2i64 addr)).
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def : Pat<(v4i32 (vector_shuffle (bc_v4i32 (loadv2i64 addr:$src1)), (undef),
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PSHUFD_shuffle_mask:$src2)),
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(PSHUFDmi addr:$src1, PSHUFD_shuffle_mask:$src2)>,
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Requires<[HasSSE2]>;
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def : Pat<(v8i16 (vector_shuffle (bc_v8i16 (loadv2i64 addr:$src1)), (undef),
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PSHUFHW_shuffle_mask:$src2)),
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(PSHUFHWmi addr:$src1, PSHUFHW_shuffle_mask:$src2)>,
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Requires<[HasSSE2]>;
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def : Pat<(v8i16 (vector_shuffle (bc_v8i16 (loadv2i64 addr:$src1)), (undef),
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PSHUFLW_shuffle_mask:$src2)),
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(PSHUFLWmi addr:$src1, PSHUFHW_shuffle_mask:$src2)>,
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Requires<[HasSSE2]>;
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// Special SHUFPSrr case: looks like a PSHUFD, like make both operands src1.
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// FIXME: when we want non two-address code, then we should use PSHUFD!
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def : Pat<(vector_shuffle (v4f32 VR128:$src1), (undef),
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def : Pat<(vector_shuffle (v4f32 VR128:$src1), (undef),
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PSHUFD_fp_shuffle_mask:$sm),
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PSHUFD_fp_shuffle_mask:$sm),
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(v4f32 (PSHUFDri VR128:$src1, PSHUFD_fp_shuffle_mask:$sm))>,
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(v4f32 (SHUFPSrr VR128:$src1, VR128:$src1, PSHUFD_fp_shuffle_mask:$sm))>,
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Requires<[HasSSE2]>;
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Requires<[HasSSE1]>;
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// Shuffle v4f32 with PSHUF* if others do not match.
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def : Pat<(vector_shuffle (loadv4f32 addr:$src1), (undef),
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def : Pat<(vector_shuffle (loadv4f32 addr:$src1), (undef),
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PSHUFD_fp_shuffle_mask:$sm),
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PSHUFD_fp_shuffle_mask:$sm),
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(v4f32 (PSHUFDmi addr:$src1, PSHUFD_fp_shuffle_mask:$sm))>,
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(v4f32 (PSHUFDmi addr:$src1, PSHUFD_fp_shuffle_mask:$sm))>,
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