forked from OSchip/llvm-project
Refactor extendsfdf2.
Patch by: GuanHong Liu Differential Revision: http://reviews.llvm.org/D3887 llvm-svn: 209781
This commit is contained in:
Joerg Sonnenberger
parent
96e239f564
commit
7610e8c822
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@ -7,132 +7,13 @@
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements a fairly generic conversion from a narrower to a wider
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// IEEE-754 floating-point type. The constants and types defined following the
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// includes below parameterize the conversion.
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//
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// This routine can be trivially adapted to support conversions from
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// half-precision or to quad-precision. It does not support types that don't
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// use the usual IEEE-754 interchange formats; specifically, some work would be
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// needed to adapt it to (for example) the Intel 80-bit format or PowerPC
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// double-double format.
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//
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// Note please, however, that this implementation is only intended to support
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// *widening* operations; if you need to convert to a *narrower* floating-point
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// type (e.g. double -> float), then this routine will not do what you want it
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// to.
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//
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// It also requires that integer types at least as large as both formats
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// are available on the target platform; this may pose a problem when trying
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// to add support for quad on some 32-bit systems, for example. You also may
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// run into trouble finding an appropriate CLZ function for wide source types;
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// you will likely need to roll your own on some platforms.
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//
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// Finally, the following assumptions are made:
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//
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// 1. floating-point types and integer types have the same endianness on the
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// target platform
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//
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// 2. quiet NaNs, if supported, are indicated by the leading bit of the
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// significand field being set
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//
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//===----------------------------------------------------------------------===//
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#include "int_lib.h"
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typedef float src_t;
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typedef uint32_t src_rep_t;
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#define SRC_REP_C UINT32_C
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static const int srcSigBits = 23;
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#define src_rep_t_clz __builtin_clz
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typedef double dst_t;
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typedef uint64_t dst_rep_t;
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#define DST_REP_C UINT64_C
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static const int dstSigBits = 52;
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// End of specialization parameters. Two helper routines for conversion to and
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// from the representation of floating-point data as integer values follow.
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static inline src_rep_t srcToRep(src_t x) {
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const union { src_t f; src_rep_t i; } rep = {.f = x};
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return rep.i;
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}
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static inline dst_t dstFromRep(dst_rep_t x) {
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const union { dst_t f; dst_rep_t i; } rep = {.i = x};
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return rep.f;
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}
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// End helper routines. Conversion implementation follows.
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#define SRC_SINGLE
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#define DST_DOUBLE
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#include "fp_extend_impl.inc"
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ARM_EABI_FNALIAS(f2d, extendsfdf2)
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COMPILER_RT_ABI dst_t
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__extendsfdf2(src_t a) {
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// Various constants whose values follow from the type parameters.
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// Any reasonable optimizer will fold and propagate all of these.
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const int srcBits = sizeof(src_t)*CHAR_BIT;
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const int srcExpBits = srcBits - srcSigBits - 1;
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const int srcInfExp = (1 << srcExpBits) - 1;
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const int srcExpBias = srcInfExp >> 1;
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const src_rep_t srcMinNormal = SRC_REP_C(1) << srcSigBits;
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const src_rep_t srcInfinity = (src_rep_t)srcInfExp << srcSigBits;
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const src_rep_t srcSignMask = SRC_REP_C(1) << (srcSigBits + srcExpBits);
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const src_rep_t srcAbsMask = srcSignMask - 1;
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const src_rep_t srcQNaN = SRC_REP_C(1) << (srcSigBits - 1);
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const src_rep_t srcNaNCode = srcQNaN - 1;
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const int dstBits = sizeof(dst_t)*CHAR_BIT;
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const int dstExpBits = dstBits - dstSigBits - 1;
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const int dstInfExp = (1 << dstExpBits) - 1;
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const int dstExpBias = dstInfExp >> 1;
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const dst_rep_t dstMinNormal = DST_REP_C(1) << dstSigBits;
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// Break a into a sign and representation of the absolute value
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const src_rep_t aRep = srcToRep(a);
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const src_rep_t aAbs = aRep & srcAbsMask;
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const src_rep_t sign = aRep & srcSignMask;
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dst_rep_t absResult;
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if (aAbs - srcMinNormal < srcInfinity - srcMinNormal) {
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// a is a normal number.
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// Extend to the destination type by shifting the significand and
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// exponent into the proper position and rebiasing the exponent.
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absResult = (dst_rep_t)aAbs << (dstSigBits - srcSigBits);
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absResult += (dst_rep_t)(dstExpBias - srcExpBias) << dstSigBits;
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}
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else if (aAbs >= srcInfinity) {
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// a is NaN or infinity.
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// Conjure the result by beginning with infinity, then setting the qNaN
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// bit (if needed) and right-aligning the rest of the trailing NaN
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// payload field.
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absResult = (dst_rep_t)dstInfExp << dstSigBits;
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absResult |= (dst_rep_t)(aAbs & srcQNaN) << (dstSigBits - srcSigBits);
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absResult |= aAbs & srcNaNCode;
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}
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else if (aAbs) {
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// a is denormal.
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// renormalize the significand and clear the leading bit, then insert
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// the correct adjusted exponent in the destination type.
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const int scale = src_rep_t_clz(aAbs) - src_rep_t_clz(srcMinNormal);
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absResult = (dst_rep_t)aAbs << (dstSigBits - srcSigBits + scale);
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absResult ^= dstMinNormal;
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const int resultExponent = dstExpBias - srcExpBias - scale + 1;
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absResult |= (dst_rep_t)resultExponent << dstSigBits;
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}
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else {
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// a is zero.
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absResult = 0;
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}
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// Apply the signbit to (dst_t)abs(a).
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const dst_rep_t result = absResult | (dst_rep_t)sign << (dstBits - srcBits);
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return dstFromRep(result);
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COMPILER_RT_ABI double __extendsfdf2(float a) {
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return __extendXfYf2__(a);
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}
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@ -0,0 +1,76 @@
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//===-lib/fp_extend.h - low precision -> high precision conversion -*- C -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is dual licensed under the MIT and the University of Illinois Open
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// Source Licenses. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// Set source and destination setting
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//
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//===----------------------------------------------------------------------===//
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#ifndef FP_EXTEND_HEADER
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#define FP_EXTEND_HEADER
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#include "int_lib.h"
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#if defined SRC_SINGLE
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typedef float src_t;
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typedef uint32_t src_rep_t;
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#define SRC_REP_C UINT32_C
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static const int srcSigBits = 23;
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#define src_rep_t_clz __builtin_clz
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#elif defined SRC_DOUBLE
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typedef double src_t;
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typedef uint64_t src_rep_t;
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#define SRC_REP_C UINT64_C
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static const int srcSigBits = 52;
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static inline int src_rep_t_clz(src_rep_t a) {
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#if defined __LP64__
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return __builtin_clzl(a);
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#else
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if (a & REP_C(0xffffffff00000000))
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return __builtin_clz(a >> 32);
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else
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return 32 + __builtin_clz(a & REP_C(0xffffffff));
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#endif
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}
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#else
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#error Source should be single precision or double precision!
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#endif //end source precision
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#if defined DST_DOUBLE
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typedef double dst_t;
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typedef uint64_t dst_rep_t;
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#define DST_REP_C UINT64_C
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static const int dstSigBits = 52;
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#elif defined DST_QUAD
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typedef long double dst_t;
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typedef __uint128_t dst_rep_t;
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#define DST_REP_C (__uint128_t)
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static const int dstSigBits = 112;
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#else
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#error Destination should be double precision or quad precision!
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#endif //end destination precision
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// End of specialization parameters. Two helper routines for conversion to and
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// from the representation of floating-point data as integer values follow.
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static inline src_rep_t srcToRep(src_t x) {
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const union { src_t f; src_rep_t i; } rep = {.f = x};
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return rep.i;
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}
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static inline dst_t dstFromRep(dst_rep_t x) {
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const union { dst_t f; dst_rep_t i; } rep = {.i = x};
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return rep.f;
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}
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// End helper routines. Conversion implementation follows.
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#endif //FP_EXTEND_HEADER
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@ -0,0 +1,106 @@
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//=-lib/fp_extend_impl.inc - low precision -> high precision conversion -*-- -//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is dual licensed under the MIT and the University of Illinois Open
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// Source Licenses. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements a fairly generic conversion from a narrower to a wider
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// IEEE-754 floating-point type. The constants and types defined following the
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// includes below parameterize the conversion.
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//
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// It does not support types that don't use the usual IEEE-754 interchange
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// formats; specifically, some work would be needed to adapt it to
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// (for example) the Intel 80-bit format or PowerPC double-double format.
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//
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// Note please, however, that this implementation is only intended to support
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// *widening* operations; if you need to convert to a *narrower* floating-point
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// type (e.g. double -> float), then this routine will not do what you want it
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// to.
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//
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// It also requires that integer types at least as large as both formats
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// are available on the target platform; this may pose a problem when trying
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// to add support for quad on some 32-bit systems, for example. You also may
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// run into trouble finding an appropriate CLZ function for wide source types;
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// you will likely need to roll your own on some platforms.
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//
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// Finally, the following assumptions are made:
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//
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// 1. floating-point types and integer types have the same endianness on the
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// target platform
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//
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// 2. quiet NaNs, if supported, are indicated by the leading bit of the
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// significand field being set
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//
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//===----------------------------------------------------------------------===//
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#include "fp_extend.h"
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static inline dst_t __extendXfYf2__(src_t a) {
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// Various constants whose values follow from the type parameters.
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// Any reasonable optimizer will fold and propagate all of these.
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const int srcBits = sizeof(src_t)*CHAR_BIT;
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const int srcExpBits = srcBits - srcSigBits - 1;
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const int srcInfExp = (1 << srcExpBits) - 1;
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const int srcExpBias = srcInfExp >> 1;
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const src_rep_t srcMinNormal = SRC_REP_C(1) << srcSigBits;
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const src_rep_t srcInfinity = (src_rep_t)srcInfExp << srcSigBits;
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const src_rep_t srcSignMask = SRC_REP_C(1) << (srcSigBits + srcExpBits);
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const src_rep_t srcAbsMask = srcSignMask - 1;
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const src_rep_t srcQNaN = SRC_REP_C(1) << (srcSigBits - 1);
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const src_rep_t srcNaNCode = srcQNaN - 1;
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const int dstBits = sizeof(dst_t)*CHAR_BIT;
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const int dstExpBits = dstBits - dstSigBits - 1;
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const int dstInfExp = (1 << dstExpBits) - 1;
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const int dstExpBias = dstInfExp >> 1;
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const dst_rep_t dstMinNormal = DST_REP_C(1) << dstSigBits;
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// Break a into a sign and representation of the absolute value
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const src_rep_t aRep = srcToRep(a);
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const src_rep_t aAbs = aRep & srcAbsMask;
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const src_rep_t sign = aRep & srcSignMask;
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dst_rep_t absResult;
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if (aAbs - srcMinNormal < srcInfinity - srcMinNormal) {
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// a is a normal number.
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// Extend to the destination type by shifting the significand and
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// exponent into the proper position and rebiasing the exponent.
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absResult = (dst_rep_t)aAbs << (dstSigBits - srcSigBits);
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absResult += (dst_rep_t)(dstExpBias - srcExpBias) << dstSigBits;
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}
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else if (aAbs >= srcInfinity) {
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// a is NaN or infinity.
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// Conjure the result by beginning with infinity, then setting the qNaN
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// bit (if needed) and right-aligning the rest of the trailing NaN
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// payload field.
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absResult = (dst_rep_t)dstInfExp << dstSigBits;
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absResult |= (dst_rep_t)(aAbs & srcQNaN) << (dstSigBits - srcSigBits);
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absResult |= (dst_rep_t)(aAbs & srcNaNCode) << (dstSigBits - srcSigBits);
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}
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else if (aAbs) {
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// a is denormal.
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// renormalize the significand and clear the leading bit, then insert
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// the correct adjusted exponent in the destination type.
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const int scale = src_rep_t_clz(aAbs) - src_rep_t_clz(srcMinNormal);
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absResult = (dst_rep_t)aAbs << (dstSigBits - srcSigBits + scale);
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absResult ^= dstMinNormal;
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const int resultExponent = dstExpBias - srcExpBias - scale + 1;
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absResult |= (dst_rep_t)resultExponent << dstSigBits;
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}
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else {
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// a is zero.
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absResult = 0;
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}
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// Apply the signbit to (dst_t)abs(a).
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const dst_rep_t result = absResult | (dst_rep_t)sign << (dstBits - srcBits);
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return dstFromRep(result);
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}
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