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Simplify the fast-patch interval spilling by using MachineRegisterInfo::reg_iterator. 

llvm-svn: 54930
This commit is contained in:
Owen Anderson 2008-08-18 18:38:12 +00:00
parent fe18a8d9f1
commit 75e27d2402
1 changed files with 50 additions and 72 deletions
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64
llvm/lib/CodeGen/LiveIntervalAnalysis.cpp
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@ -1618,47 +1618,23 @@ addIntervalsForSpillsFast(const LiveInterval &li,
const TargetRegisterClass* rc = mri_->getRegClass(li.reg);
for (LiveInterval::Ranges::const_iterator
i = li.ranges.begin(), e = li.ranges.end(); i != e; ++i) {
unsigned index = getBaseIndex(i->start);
unsigned end = getBaseIndex(i->end-1) + InstrSlots::NUM;
for (; index != end; index += InstrSlots::NUM) {
// skip deleted instructions
while (index != end && !getInstructionFromIndex(index))
index += InstrSlots::NUM;
if (index == end) break;
DenseMap<MachineInstr*, unsigned> VRegMap;
DenseMap<MachineInstr*, VNInfo*> VNMap;
MachineInstr *MI = getInstructionFromIndex(index);
for (unsigned i = 0; i != MI->getNumOperands(); ++i) {
MachineOperand& mop = MI->getOperand(i);
if (mop.isRegister() && mop.getReg() == li.reg) {
for (MachineRegisterInfo::reg_iterator RI = mri_->reg_begin(li.reg),
RE = mri_->reg_end(); RI != RE; ) {
// Create a new virtual register for the spill interval.
unsigned NewVReg = mri_->createVirtualRegister(rc);
MachineOperand& MO = RI.getOperand();
unsigned NewVReg = 0;
if (!VRegMap.count(MO.getParent()))
VRegMap[MO.getParent()] = NewVReg = mri_->createVirtualRegister(rc);
else
NewVReg = VRegMap[MO.getParent()];
// Scan all of the operands of this instruction rewriting operands
// to use NewVReg instead of li.reg as appropriate. We do this for
// two reasons:
//
// 1. If the instr reads the same spilled vreg multiple times, we
// want to reuse the NewVReg.
// 2. If the instr is a two-addr instruction, we are required to
// keep the src/dst regs pinned.
//
// Keep track of whether we replace a use and/or def so that we can
// create the spill interval with the appropriate range.
mop.setReg(NewVReg);
// Increment iterator to avoid invalidation.
++RI;
bool HasUse = mop.isUse();
bool HasDef = mop.isDef();
for (unsigned j = i+1, e = MI->getNumOperands(); j != e; ++j) {
if (MI->getOperand(j).isReg() &&
MI->getOperand(j).getReg() == li.reg) {
MI->getOperand(j).setReg(NewVReg);
HasUse |= MI->getOperand(j).isUse();
HasDef |= MI->getOperand(j).isDef();
}
}
MO.setReg(NewVReg);
// create a new register for this spill
vrm.grow();
@ -1670,15 +1646,20 @@ addIntervalsForSpillsFast(const LiveInterval &li,
// cannot be spilled again
nI.weight = HUGE_VALF;
unsigned index = getInstructionIndex(MO.getParent());
bool HasUse = MO.isUse();
bool HasDef = MO.isDef();
if (!VNMap.count(MO.getParent()))
VNMap[MO.getParent()] = nI.getNextValue(~0U, 0, getVNInfoAllocator());
if (HasUse) {
LiveRange LR(getLoadIndex(index), getUseIndex(index),
nI.getNextValue(~0U, 0, getVNInfoAllocator()));
VNMap[MO.getParent()]);
DOUT << " +" << LR;
nI.addRange(LR);
}
if (HasDef) {
LiveRange LR(getDefIndex(index), getStoreIndex(index),
nI.getNextValue(~0U, 0, getVNInfoAllocator()));
VNMap[MO.getParent()]);
DOUT << " +" << LR;
nI.addRange(LR);
}
@ -1687,15 +1668,12 @@ addIntervalsForSpillsFast(const LiveInterval &li,
// update live variables if it is available
if (lv_)
lv_->addVirtualRegisterKilled(NewVReg, MI);
lv_->addVirtualRegisterKilled(NewVReg, MO.getParent());
DOUT << "\t\t\t\tadded new interval: ";
DEBUG(nI.dump());
DOUT << '\n';
}
}
}
}
SSWeight = HUGE_VALF;