forked from OSchip/llvm-project
Add PseudoSourceValues for constpool stuff on ELF (Darwin should use something similar)
and register spills. llvm-svn: 83435
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6ba26317ce
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75b59fb055
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@ -21,6 +21,8 @@
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineJumpTableInfo.h"
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#include "llvm/CodeGen/MachineMemOperand.h"
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#include "llvm/CodeGen/PseudoSourceValue.h"
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#include "llvm/MC/MCAsmInfo.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/ErrorHandling.h"
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@ -665,27 +667,35 @@ storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
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const TargetRegisterClass *RC) const {
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DebugLoc DL = DebugLoc::getUnknownLoc();
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if (I != MBB.end()) DL = I->getDebugLoc();
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MachineFunction &MF = *MBB.getParent();
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MachineFrameInfo &MFI = *MF.getFrameInfo();
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MachineMemOperand *MMO =
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MF.getMachineMemOperand(PseudoSourceValue::getFixedStack(FI),
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MachineMemOperand::MOStore, 0,
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MFI.getObjectSize(FI),
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MFI.getObjectAlignment(FI));
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if (RC == ARM::GPRRegisterClass) {
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AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::STR))
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.addReg(SrcReg, getKillRegState(isKill))
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.addFrameIndex(FI).addReg(0).addImm(0));
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.addFrameIndex(FI).addReg(0).addImm(0).addMemOperand(MMO));
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} else if (RC == ARM::DPRRegisterClass ||
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RC == ARM::DPR_VFP2RegisterClass ||
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RC == ARM::DPR_8RegisterClass) {
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AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::FSTD))
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.addReg(SrcReg, getKillRegState(isKill))
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.addFrameIndex(FI).addImm(0));
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.addFrameIndex(FI).addImm(0).addMemOperand(MMO));
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} else if (RC == ARM::SPRRegisterClass) {
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AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::FSTS))
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.addReg(SrcReg, getKillRegState(isKill))
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.addFrameIndex(FI).addImm(0));
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.addFrameIndex(FI).addImm(0).addMemOperand(MMO));
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} else {
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assert((RC == ARM::QPRRegisterClass ||
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RC == ARM::QPR_VFP2RegisterClass) && "Unknown regclass!");
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// FIXME: Neon instructions should support predicates
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BuildMI(MBB, I, DL, get(ARM::VSTRQ)).addReg(SrcReg, getKillRegState(isKill))
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.addFrameIndex(FI).addImm(0);
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.addFrameIndex(FI).addImm(0).addMemOperand(MMO);
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}
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}
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@ -695,23 +705,31 @@ loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
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const TargetRegisterClass *RC) const {
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DebugLoc DL = DebugLoc::getUnknownLoc();
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if (I != MBB.end()) DL = I->getDebugLoc();
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MachineFunction &MF = *MBB.getParent();
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MachineFrameInfo &MFI = *MF.getFrameInfo();
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MachineMemOperand *MMO =
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MF.getMachineMemOperand(PseudoSourceValue::getFixedStack(FI),
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MachineMemOperand::MOLoad, 0,
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MFI.getObjectSize(FI),
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MFI.getObjectAlignment(FI));
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if (RC == ARM::GPRRegisterClass) {
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AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::LDR), DestReg)
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.addFrameIndex(FI).addReg(0).addImm(0));
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.addFrameIndex(FI).addReg(0).addImm(0).addMemOperand(MMO));
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} else if (RC == ARM::DPRRegisterClass ||
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RC == ARM::DPR_VFP2RegisterClass ||
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RC == ARM::DPR_8RegisterClass) {
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AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::FLDD), DestReg)
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.addFrameIndex(FI).addImm(0));
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.addFrameIndex(FI).addImm(0).addMemOperand(MMO));
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} else if (RC == ARM::SPRRegisterClass) {
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AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::FLDS), DestReg)
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.addFrameIndex(FI).addImm(0));
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.addFrameIndex(FI).addImm(0).addMemOperand(MMO));
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} else {
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assert((RC == ARM::QPRRegisterClass ||
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RC == ARM::QPR_VFP2RegisterClass) && "Unknown regclass!");
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// FIXME: Neon instructions should support predicates
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BuildMI(MBB, I, DL, get(ARM::VLDRQ), DestReg).addFrameIndex(FI).addImm(0);
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BuildMI(MBB, I, DL, get(ARM::VLDRQ), DestReg).addFrameIndex(FI).addImm(0).addMemOperand(MMO);
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}
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}
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@ -1303,17 +1303,20 @@ SDValue ARMTargetLowering::LowerGlobalAddressELF(SDValue Op,
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SDValue CPAddr = DAG.getTargetConstantPool(CPV, PtrVT, 4);
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CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr);
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SDValue Result = DAG.getLoad(PtrVT, dl, DAG.getEntryNode(),
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CPAddr, NULL, 0);
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CPAddr,
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PseudoSourceValue::getConstantPool(), 0);
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SDValue Chain = Result.getValue(1);
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SDValue GOT = DAG.getGLOBAL_OFFSET_TABLE(PtrVT);
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Result = DAG.getNode(ISD::ADD, dl, PtrVT, Result, GOT);
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if (!UseGOTOFF)
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Result = DAG.getLoad(PtrVT, dl, Chain, Result, NULL, 0);
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Result = DAG.getLoad(PtrVT, dl, Chain, Result,
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PseudoSourceValue::getGOT(), 0);
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return Result;
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} else {
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SDValue CPAddr = DAG.getTargetConstantPool(GV, PtrVT, 4);
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CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr);
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return DAG.getLoad(PtrVT, dl, DAG.getEntryNode(), CPAddr, NULL, 0);
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return DAG.getLoad(PtrVT, dl, DAG.getEntryNode(), CPAddr,
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PseudoSourceValue::getConstantPool(), 0);
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}
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}
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@ -1360,7 +1363,8 @@ SDValue ARMTargetLowering::LowerGLOBAL_OFFSET_TABLE(SDValue Op,
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ARMPCLabelIndex, PCAdj);
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SDValue CPAddr = DAG.getTargetConstantPool(CPV, PtrVT, 4);
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CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr);
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SDValue Result = DAG.getLoad(PtrVT, dl, DAG.getEntryNode(), CPAddr, NULL, 0);
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SDValue Result = DAG.getLoad(PtrVT, dl, DAG.getEntryNode(), CPAddr,
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PseudoSourceValue::getConstantPool(), 0);
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SDValue PICLabel = DAG.getConstant(ARMPCLabelIndex++, MVT::i32);
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return DAG.getNode(ARMISD::PIC_ADD, dl, PtrVT, Result, PICLabel);
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}
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