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[PowerPC] Always use aggressive interleaving on the A2 

On the A2, with an eye toward QPX unaligned-load merging, we should always use
aggressive interleaving. It is generally superior to only using concatenation
unrolling.

llvm-svn: 246819
This commit is contained in:
Hal Finkel 2015-09-03 23:23:00 +00:00
parent b47128aaf3
commit 75afa2b6b6
2 changed files with 47 additions and 0 deletions
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7
llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
View File

@ -197,6 +197,13 @@ void PPCTTIImpl::getUnrollingPreferences(Loop *L,
}
bool PPCTTIImpl::enableAggressiveInterleaving(bool LoopHasReductions) {
// On the A2, always unroll aggressively. For QPX unaligned loads, we depend
// on combining the loads generated for consecutive accesses, and failure to
// do so is particularly expensive. This makes it much more likely (compared
// to only using concatenation unrolling).
if (ST->getDarwinDirective() == PPC::DIR_A2)
return true;
return LoopHasReductions;
}

40
llvm/test/Transforms/LoopVectorize/PowerPC/agg-interleave-a2.ll Normal file
View File

@ -0,0 +1,40 @@
; RUN: opt -S -basicaa -loop-vectorize < %s | FileCheck %s
target datalayout = "E-m:e-i64:64-n32:64"
target triple = "powerpc64-unknown-linux-gnu"
; Function Attrs: nounwind
define void @foo(double* noalias nocapture %a, double* noalias nocapture readonly %b, double* noalias nocapture readonly %c) #0 {
entry:
br label %for.body
; CHECK-LABEL: @foo
; CHECK: fmul <4 x double> %{{[^,]+}}, <double 2.000000e+00, double 2.000000e+00, double 2.000000e+00, double 2.000000e+00>
; CHECK-NEXT: fmul <4 x double> %{{[^,]+}}, <double 2.000000e+00, double 2.000000e+00, double 2.000000e+00, double 2.000000e+00>
for.cond.cleanup: ; preds = %for.body
ret void
for.body: ; preds = %for.body, %entry
%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
%arrayidx = getelementptr inbounds double, double* %b, i64 %indvars.iv
%0 = load double, double* %arrayidx, align 8
%mul = fmul double %0, 2.000000e+00
%mul3 = fmul double %0, %mul
%arrayidx5 = getelementptr inbounds double, double* %c, i64 %indvars.iv
%1 = load double, double* %arrayidx5, align 8
%mul6 = fmul double %1, 3.000000e+00
%mul9 = fmul double %1, %mul6
%add = fadd double %mul3, %mul9
%mul12 = fmul double %0, 4.000000e+00
%mul15 = fmul double %mul12, %1
%add16 = fadd double %mul15, %add
%add17 = fadd double %add16, 1.000000e+00
%arrayidx19 = getelementptr inbounds double, double* %a, i64 %indvars.iv
store double %add17, double* %arrayidx19, align 8
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond = icmp eq i64 %indvars.iv.next, 1600
br i1 %exitcond, label %for.cond.cleanup, label %for.body
}
attributes #0 = { nounwind "target-cpu"="a2q" }