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[AMDGPU][NFC] Validate G_MERGE_VALUES as we match zero-extended 32-bit scalars. 

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D130001
This commit is contained in:
Ivan Kosarev 2022-07-21 14:25:09 +01:00
parent 241f62d8d3
commit 75950be836
1 changed files with 2 additions and 0 deletions
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2
llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
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@ -3245,6 +3245,8 @@ static Register matchZeroExtendFromS32(MachineRegisterInfo &MRI, Register Reg) {
if (Def->getOpcode() != AMDGPU::G_MERGE_VALUES)
return Register();
assert(Def->getNumOperands() == 3 &&
MRI.getType(Def->getOperand(0).getReg()) == LLT::scalar(64));
if (mi_match(Def->getOperand(2).getReg(), MRI, m_ZeroInt())) {
return Def->getOperand(1).getReg();
}