forked from OSchip/llvm-project
GlobalISel: add specialized buildCopy function to MachineInstrBuilder.
NFC. llvm-svn: 276763
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@ -183,6 +183,15 @@ public:
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/// \return The newly created instruction.
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MachineInstr *buildBr(MachineBasicBlock &BB);
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/// Build and insert \p Res<def> = COPY Op
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///
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/// Register-to-register COPY sets \p Res to \p Op.
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///
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/// \pre setBasicBlock or setMI must have been called.
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///
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/// \return The newly created instruction.
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MachineInstr *buildCopy(unsigned Res, unsigned Op);
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/// Build and insert `Res0<def>, ... = G_EXTRACT Ty Src, Idx0, ...`.
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///
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/// If \p Ty has size N bits, G_EXTRACT sets \p Res[0] to bits `[Idxs[0],
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@ -102,7 +102,7 @@ bool IRTranslator::translateBr(const Instruction &Inst) {
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bool IRTranslator::translateBitCast(const CastInst &CI) {
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if (LLT{*CI.getDestTy()} == LLT{*CI.getSrcTy()}) {
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MIRBuilder.buildInstr(TargetOpcode::COPY, getOrCreateVReg(CI),
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MIRBuilder.buildCopy(getOrCreateVReg(CI),
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getOrCreateVReg(*CI.getOperand(0)));
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return true;
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}
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@ -90,6 +90,10 @@ MachineInstr *MachineIRBuilder::buildBr(MachineBasicBlock &Dest) {
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return NewMI;
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}
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MachineInstr *MachineIRBuilder::buildCopy(unsigned Res, unsigned Op) {
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return buildInstr(TargetOpcode::COPY, Res, Op);
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}
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MachineInstr *MachineIRBuilder::buildExtract(LLT Ty, ArrayRef<unsigned> Results,
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unsigned Src,
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ArrayRef<unsigned> Indexes) {
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@ -126,7 +126,7 @@ void RegBankSelect::repairReg(
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"We are about to create several defs for Dst");
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// Build the instruction used to repair, then clone it at the right places.
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MachineInstr *MI = MIRBuilder.buildInstr(TargetOpcode::COPY, Dst, Src);
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MachineInstr *MI = MIRBuilder.buildCopy(Dst, Src);
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MI->removeFromParent();
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DEBUG(dbgs() << "Copy: " << PrintReg(Src) << " to: " << PrintReg(Dst)
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<< '\n');
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