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Fixed typos in tests: s/CEHCK/CHECK/ 

Reviewers: ilya-biryukov

Subscribers: sanjoy, sdardis, javed.absar, jrtc27, atanasyan, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D58608

llvm-svn: 354781
This commit is contained in:
Dmitri Gribenko 2019-02-25 13:12:33 +00:00
parent 4bfa716f7c
commit 751c5fbf6a
10 changed files with 15 additions and 15 deletions
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2
llvm/test/Analysis/ScalarEvolution/pr18606-min-zeros.ll
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@ -2,7 +2,7 @@
; CHECK: @test ; CHECK: @test
; CHECK: %5 = add i32 %local_6_, %local_0_ ; CHECK: %5 = add i32 %local_6_, %local_0_
; CEHCK: %37 = mul i32 %36, %36 ; CHECK: %37 = mul i32 %36, %36
define i32 @test(i32, i32) { define i32 @test(i32, i32) {
bci_0: bci_0:

2
llvm/test/Analysis/ScalarEvolution/pr18606.ll
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@ -2,7 +2,7 @@
; CHECK: @main ; CHECK: @main
; CHECK: %mul.lcssa5 = phi i32 [ %a.promoted4, %entry ], [ %mul.30, %for.body3 ] ; CHECK: %mul.lcssa5 = phi i32 [ %a.promoted4, %entry ], [ %mul.30, %for.body3 ]
; CEHCK: %mul = mul nsw i32 %mul.lcssa5, %mul.lcssa5 ; CHECK: %mul = mul nsw i32 %mul.lcssa5, %mul.lcssa5
; CHECK: %mul.30 = mul nsw i32 %mul.29, %mul.29 ; CHECK: %mul.30 = mul nsw i32 %mul.29, %mul.29
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"

6
llvm/test/CodeGen/AArch64/sponentry.ll
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@ -17,7 +17,7 @@ define dso_local void @bar() {
; CHECK: bar: ; CHECK: bar:
; CHECK: mov x29, sp ; CHECK: mov x29, sp
; CHECK: add x1, x29, #16 ; CHECK: add x1, x29, #16
; CEHCK: bl _setjmpex ; CHECK: bl _setjmpex
; NOFP: str x30, [sp, #-16]! ; NOFP: str x30, [sp, #-16]!
; NOFP: add x1, sp, #16 ; NOFP: add x1, sp, #16
@ -40,7 +40,7 @@ define dso_local void @foo([24 x i64]*) {
; CHECK: sub sp, sp, #448 ; CHECK: sub sp, sp, #448
; CHECK: add x29, sp, #432 ; CHECK: add x29, sp, #432
; CHECK: add x1, x29, #16 ; CHECK: add x1, x29, #16
; CEHCK: bl _setjmpex ; CHECK: bl _setjmpex
; NOFP: sub sp, sp, #432 ; NOFP: sub sp, sp, #432
; NOFP: add x1, sp, #432 ; NOFP: add x1, sp, #432
@ -70,7 +70,7 @@ define dso_local void @var_args(i8*, ...) {
; CHECK: sub sp, sp, #96 ; CHECK: sub sp, sp, #96
; CHECK: add x29, sp, #16 ; CHECK: add x29, sp, #16
; CHECK: add x1, x29, #80 ; CHECK: add x1, x29, #80
; CEHCK: bl _setjmpex ; CHECK: bl _setjmpex
; NOFP: sub sp, sp, #96 ; NOFP: sub sp, sp, #96
; NOFP: add x1, sp, #96 ; NOFP: add x1, sp, #96

2
llvm/test/CodeGen/ARM/macho-embedded-float.ll
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@ -12,7 +12,7 @@ define float @test_default_cc(float %a, float %b) {
; CHECK-SOFT-DAG: vmov [[A:s[0-9]+]], r0 ; CHECK-SOFT-DAG: vmov [[A:s[0-9]+]], r0
; CHECK-SOFT-DAG: vmov [[B:s[0-9]+]], r1 ; CHECK-SOFT-DAG: vmov [[B:s[0-9]+]], r1
; CHECK-SOFT: vadd.f32 [[RES:s[0-9]+]], [[A]], [[B]] ; CHECK-SOFT: vadd.f32 [[RES:s[0-9]+]], [[A]], [[B]]
; CEHCK-SOFT: vmov r0, [[RES]] ; CHECK-SOFT: vmov r0, [[RES]]
%res = fadd float %a, %b %res = fadd float %a, %b
ret float %res ret float %res

2
llvm/test/CodeGen/ARM/pr32578.ll
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@ -4,7 +4,7 @@ target triple = "armv7"
; CHECK-LABEL: func: ; CHECK-LABEL: func:
; CHECK: push {r11, lr} ; CHECK: push {r11, lr}
; CHECK: vpush {d8} ; CHECK: vpush {d8}
; CEHCK: b .LBB0_2 ; CHECK: b .LBB0_2
define arm_aapcscc double @func() { define arm_aapcscc double @func() {
br label %tailrecurse br label %tailrecurse

2
llvm/test/CodeGen/X86/taildup-crash.ll
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@ -5,7 +5,7 @@ target triple = "x86_64--"
; block. ; block.
; CHECK-LABEL: func: ; CHECK-LABEL: func:
; CHECK: testb ; CHECK: testb
; CEHCK: je ; CHECK: je
; CHECK: retq ; CHECK: retq
; CHECK: jmp ; CHECK: jmp
define hidden void @func() { define hidden void @func() {

2
llvm/test/MC/ARM/bkpt.s
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@ -27,6 +27,6 @@ normal_bkpt:
arm_default_bkpt: arm_default_bkpt:
bkpt bkpt
@ CEHCK-LABEL: arm_default_bkpt @ CHECK-LABEL: arm_default_bkpt
@ CHECK: bkpt #0 @ CHECK: bkpt #0

4
llvm/test/MC/Disassembler/Mips/mips64/valid-mips64-el.txt
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@ -148,8 +148,8 @@
0x00 0x38 0x06 0x44 # CHECK: mfc1 $6, $f7 0x00 0x38 0x06 0x44 # CHECK: mfc1 $6, $f7
0x10 0x28 0x00 0x00 # CHECK: mfhi $5 0x10 0x28 0x00 0x00 # CHECK: mfhi $5
0x12 0x28 0x00 0x00 # CHECK: mflo $5 0x12 0x28 0x00 0x00 # CHECK: mflo $5
0x25 0x78 0xe0 0x03 # CEHCK: move $15, $ra 0x25 0x78 0xe0 0x03 # CHECK: move $15, $ra
0x2d 0x78 0xe0 0x03 # CEHCK: move $15, $ra 0x2d 0x78 0xe0 0x03 # CHECK: move $15, $ra
0x86 0x41 0x20 0x46 # CHECK: mov.d $f6, $f8 0x86 0x41 0x20 0x46 # CHECK: mov.d $f6, $f8
0x86 0x39 0x00 0x46 # CHECK: mov.s $f6, $f7 0x86 0x39 0x00 0x46 # CHECK: mov.s $f6, $f7
0x04 0x00 0xc7 0x70 # CHECK: msub $6, $7 0x04 0x00 0xc7 0x70 # CHECK: msub $6, $7

4
llvm/test/MC/Disassembler/Mips/mips64r3/valid-mips64r3-el.txt
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@ -166,8 +166,8 @@
0x10 0x28 0x00 0x00 # CHECK: mfhi $5 0x10 0x28 0x00 0x00 # CHECK: mfhi $5
0x00 0xc0 0x7e 0x44 # CHECK: mfhc1 $fp, $f24 0x00 0xc0 0x7e 0x44 # CHECK: mfhc1 $fp, $f24
0x12 0x28 0x00 0x00 # CHECK: mflo $5 0x12 0x28 0x00 0x00 # CHECK: mflo $5
0x25 0x78 0xe0 0x03 # CEHCK: move $15, $ra 0x25 0x78 0xe0 0x03 # CHECK: move $15, $ra
0x2d 0x78 0xe0 0x03 # CEHCK: move $15, $ra 0x2d 0x78 0xe0 0x03 # CHECK: move $15, $ra
0x86 0x41 0x20 0x46 # CHECK: mov.d $f6, $f8 0x86 0x41 0x20 0x46 # CHECK: mov.d $f6, $f8
0x86 0x39 0x00 0x46 # CHECK: mov.s $f6, $f7 0x86 0x39 0x00 0x46 # CHECK: mov.s $f6, $f7
0x04 0x00 0xc7 0x70 # CHECK: msub $6, $7 0x04 0x00 0xc7 0x70 # CHECK: msub $6, $7

4
llvm/test/MC/Disassembler/Mips/mips64r5/valid-mips64r5-el.txt
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@ -166,8 +166,8 @@
0x10 0x28 0x00 0x00 # CHECK: mfhi $5 0x10 0x28 0x00 0x00 # CHECK: mfhi $5
0x00 0xc0 0x7e 0x44 # CHECK: mfhc1 $fp, $f24 0x00 0xc0 0x7e 0x44 # CHECK: mfhc1 $fp, $f24
0x12 0x28 0x00 0x00 # CHECK: mflo $5 0x12 0x28 0x00 0x00 # CHECK: mflo $5
0x25 0x78 0xe0 0x03 # CEHCK: move $15, $ra 0x25 0x78 0xe0 0x03 # CHECK: move $15, $ra
0x2d 0x78 0xe0 0x03 # CEHCK: move $15, $ra 0x2d 0x78 0xe0 0x03 # CHECK: move $15, $ra
0x86 0x41 0x20 0x46 # CHECK: mov.d $f6, $f8 0x86 0x41 0x20 0x46 # CHECK: mov.d $f6, $f8
0x86 0x39 0x00 0x46 # CHECK: mov.s $f6, $f7 0x86 0x39 0x00 0x46 # CHECK: mov.s $f6, $f7
0x04 0x00 0xc7 0x70 # CHECK: msub $6, $7 0x04 0x00 0xc7 0x70 # CHECK: msub $6, $7