forked from OSchip/llvm-project
AMDGPU: Add more tests for d16 loads
Also fix a few cases that weren't testing what they were supposed to. llvm-svn: 355724
This commit is contained in:
parent
f587fd9ce1
commit
74c9c305e0
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@ -2,6 +2,75 @@
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; RUN: llc -march=amdgcn -mcpu=gfx906 -amdgpu-sroa=0 -mattr=-promote-alloca -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX906,NO-D16-HI %s
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; RUN: llc -march=amdgcn -mcpu=fiji -amdgpu-sroa=0 -mattr=-promote-alloca -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX803,NO-D16-HI %s
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; GCN-LABEL: {{^}}load_local_lo_hi_v2i16_multi_use_lo:
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; GFX900: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX900-NEXT: ds_read_u16 v2, v0
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; GFX900-NEXT: v_mov_b32_e32 v3, 0
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; GFX900-NEXT: s_waitcnt lgkmcnt(0)
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; GFX900-NEXT: v_mov_b32_e32 v1, v2
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; GFX900-NEXT: ds_read_u16_d16_hi v1, v0 offset:16
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; GFX900-NEXT: ds_write_b16 v3, v2
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; GFX900-NEXT: s_waitcnt lgkmcnt(1)
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; GFX900-NEXT: v_mov_b32_e32 v0, v1
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; GFX900-NEXT: s_waitcnt lgkmcnt(0)
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; GFX900-NEXT: s_setpc_b64 s[30:31]
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define <2 x i16> @load_local_lo_hi_v2i16_multi_use_lo(i16 addrspace(3)* noalias %in) #0 {
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entry:
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%gep = getelementptr inbounds i16, i16 addrspace(3)* %in, i32 8
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%load.lo = load i16, i16 addrspace(3)* %in
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%load.hi = load i16, i16 addrspace(3)* %gep
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store i16 %load.lo, i16 addrspace(3)* null
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%build0 = insertelement <2 x i16> undef, i16 %load.lo, i32 0
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%build1 = insertelement <2 x i16> %build0, i16 %load.hi, i32 1
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ret <2 x i16> %build1
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}
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; GCN-LABEL: {{^}}load_local_lo_hi_v2i16_multi_use_hi:
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; GFX900: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX900-NEXT: ds_read_u16 v1, v0
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; GFX900-NEXT: ds_read_u16 v0, v0 offset:16
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; GFX900-NEXT: v_mov_b32_e32 v2, 0
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; GFX900-NEXT: s_waitcnt lgkmcnt(1)
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; GFX900-NEXT: v_and_b32_e32 v1, 0xffff, v1
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; GFX900-NEXT: s_waitcnt lgkmcnt(0)
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; GFX900-NEXT: ds_write_b16 v2, v0
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; GFX900-NEXT: v_lshl_or_b32 v0, v0, 16, v1
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; GFX900-NEXT: s_waitcnt lgkmcnt(0)
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; GFX900-NEXT: s_setpc_b64 s[30:31]
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define <2 x i16> @load_local_lo_hi_v2i16_multi_use_hi(i16 addrspace(3)* noalias %in) #0 {
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entry:
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%gep = getelementptr inbounds i16, i16 addrspace(3)* %in, i32 8
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%load.lo = load i16, i16 addrspace(3)* %in
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%load.hi = load i16, i16 addrspace(3)* %gep
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store i16 %load.hi, i16 addrspace(3)* null
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%build0 = insertelement <2 x i16> undef, i16 %load.lo, i32 0
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%build1 = insertelement <2 x i16> %build0, i16 %load.hi, i32 1
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ret <2 x i16> %build1
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}
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; GCN-LABEL: {{^}}load_local_lo_hi_v2i16_multi_use_lohi:
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; GFX900: ds_read_u16 v3, v0
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; GFX900-NEXT: ds_read_u16 v0, v0 offset:16
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; GFX900-NEXT: s_waitcnt lgkmcnt(1)
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; GFX900-NEXT: ds_write_b16 v1, v3
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; GFX900-NEXT: s_waitcnt lgkmcnt(1)
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; GFX900-NEXT: ds_write_b16 v2, v0
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; GFX900-NEXT: v_and_b32_e32 v1, 0xffff, v3
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; GFX900-NEXT: v_lshl_or_b32 v0, v0, 16, v1
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; GFX900-NEXT: s_waitcnt lgkmcnt(0)
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; GFX900-NEXT: s_setpc_b64 s[30:31]
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define <2 x i16> @load_local_lo_hi_v2i16_multi_use_lohi(i16 addrspace(3)* noalias %in, i16 addrspace(3)* noalias %out0, i16 addrspace(3)* noalias %out1) #0 {
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entry:
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%gep = getelementptr inbounds i16, i16 addrspace(3)* %in, i32 8
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%load.lo = load i16, i16 addrspace(3)* %in
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%load.hi = load i16, i16 addrspace(3)* %gep
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store i16 %load.lo, i16 addrspace(3)* %out0
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store i16 %load.hi, i16 addrspace(3)* %out1
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%build0 = insertelement <2 x i16> undef, i16 %load.lo, i32 0
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%build1 = insertelement <2 x i16> %build0, i16 %load.hi, i32 1
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ret <2 x i16> %build1
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}
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; GCN-LABEL: {{^}}load_local_hi_v2i16_undeflo:
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; GCN: s_waitcnt
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; GFX900-NEXT: ds_read_u16_d16_hi v0, v0
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@ -141,6 +210,48 @@ entry:
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ret void
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}
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; GCN-LABEL: {{^}}load_local_hi_v2f16_reglo_vreg_zexti8:
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; GCN: s_waitcnt
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; GFX900-NEXT: ds_read_u8_d16_hi v1, v0
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; GFX900-NEXT: s_waitcnt
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; GFX900-NEXT: global_store_dword v[0:1], v1, off{{$}}
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; GFX900-NEXT: s_waitcnt
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; GFX900-NEXT: s_setpc_b64
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; NO-D16-HI: ds_read_u8 v
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define void @load_local_hi_v2f16_reglo_vreg_zexti8(i8 addrspace(3)* %in, half %reg) #0 {
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entry:
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%load = load i8, i8 addrspace(3)* %in
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%ext = zext i8 %load to i16
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%bitcast = bitcast i16 %ext to half
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%build0 = insertelement <2 x half> undef, half %reg, i32 0
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%build1 = insertelement <2 x half> %build0, half %bitcast, i32 1
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store <2 x half> %build1, <2 x half> addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: {{^}}load_local_hi_v2f16_reglo_vreg_sexti8:
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; GCN: s_waitcnt
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; GFX900-NEXT: ds_read_i8_d16_hi v1, v0
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; GFX900-NEXT: s_waitcnt
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; GFX900-NEXT: global_store_dword v[0:1], v1, off{{$}}
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; GFX900-NEXT: s_waitcnt
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; GFX900-NEXT: s_setpc_b64
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; NO-D16-HI: ds_read_i8 v
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define void @load_local_hi_v2f16_reglo_vreg_sexti8(i8 addrspace(3)* %in, half %reg) #0 {
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entry:
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%load = load i8, i8 addrspace(3)* %in
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%ext = sext i8 %load to i16
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%bitcast = bitcast i16 %ext to half
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%build0 = insertelement <2 x half> undef, half %reg, i32 0
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%build1 = insertelement <2 x half> %build0, half %bitcast, i32 1
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store <2 x half> %build1, <2 x half> addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: {{^}}load_global_hi_v2i16_reglo_vreg:
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; GCN: s_waitcnt
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; GFX900-NEXT: global_load_short_d16_hi v2, v[0:1], off offset:-4094
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ret void
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}
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; GCN-LABEL: {{^}}load_global_hi_v2f16_reglo_vreg_sexti8:
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; GCN: s_waitcnt
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; GFX900-NEXT: global_load_sbyte_d16_hi v2, v[0:1], off offset:-4095
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; GFX900-NEXT: s_waitcnt
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; GFX900-NEXT: global_store_dword
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; GFX900-NEXT: s_waitcnt
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; GFX900-NEXT: s_setpc_b64
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define void @load_global_hi_v2f16_reglo_vreg_sexti8(i8 addrspace(1)* %in, half %reg) #0 {
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entry:
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%gep = getelementptr inbounds i8, i8 addrspace(1)* %in, i64 -4095
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%load = load i8, i8 addrspace(1)* %gep
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%ext = sext i8 %load to i16
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%bitcast = bitcast i16 %ext to half
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%build0 = insertelement <2 x half> undef, half %reg, i32 0
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%build1 = insertelement <2 x half> %build0, half %bitcast, i32 1
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store <2 x half> %build1, <2 x half> addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: {{^}}load_global_hi_v2f16_reglo_vreg_zexti8:
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; GCN: s_waitcnt
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; GFX900-NEXT: global_load_ubyte_d16_hi v2, v[0:1], off offset:-4095
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; GFX900-NEXT: s_waitcnt
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; GFX900-NEXT: global_store_dword
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; GFX900-NEXT: s_waitcnt
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; GFX900-NEXT: s_setpc_b64
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define void @load_global_hi_v2f16_reglo_vreg_zexti8(i8 addrspace(1)* %in, half %reg) #0 {
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entry:
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%gep = getelementptr inbounds i8, i8 addrspace(1)* %in, i64 -4095
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%load = load i8, i8 addrspace(1)* %gep
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%ext = zext i8 %load to i16
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%bitcast = bitcast i16 %ext to half
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%build0 = insertelement <2 x half> undef, half %reg, i32 0
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%build1 = insertelement <2 x half> %build0, half %bitcast, i32 1
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store <2 x half> %build1, <2 x half> addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: load_flat_hi_v2i16_reglo_vreg:
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; GCN: s_waitcnt
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; GFX900-NEXT: flat_load_short_d16_hi v2, v[0:1]
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ret void
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}
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; GCN-LABEL: {{^}}load_flat_hi_v2f16_reglo_vreg_zexti8:
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; GCN: s_waitcnt
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; GFX900-NEXT: flat_load_ubyte_d16_hi v2, v[0:1]
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; GFX900-NEXT: s_waitcnt
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; GFX900-NEXT: global_store_dword v[0:1], v2
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; GFX900-NEXT: s_waitcnt
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; GFX900-NEXT: s_setpc_b64
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; NO-D16-HI: flat_load_ubyte v{{[0-9]+}}
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; GFX803: v_lshlrev_b32_e32 v{{[0-9]+}}, 16,
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; GFX803: v_or_b32_sdwa
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; GFX906: v_lshl_or_b32 v{{[0-9]+}}, v{{[0-9]+}}, 16,
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define void @load_flat_hi_v2f16_reglo_vreg_zexti8(i8* %in, half %reg) #0 {
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entry:
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%load = load i8, i8* %in
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%ext = zext i8 %load to i16
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%bitcast = bitcast i16 %ext to half
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%build0 = insertelement <2 x half> undef, half %reg, i32 0
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%build1 = insertelement <2 x half> %build0, half %bitcast, i32 1
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store <2 x half> %build1, <2 x half> addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: {{^}}load_flat_hi_v2f16_reglo_vreg_sexti8:
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; GCN: s_waitcnt
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; GFX900-NEXT: flat_load_sbyte_d16_hi v2, v[0:1]
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; GFX900-NEXT: s_waitcnt
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; GFX900-NEXT: global_store_dword v[0:1], v2
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; GFX900-NEXT: s_waitcnt
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; GFX900-NEXT: s_setpc_b64
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; NO-D16-HI: flat_load_sbyte v{{[0-9]+}}
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; GFX803: v_lshlrev_b32_e32 v{{[0-9]+}}, 16,
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; GFX803: v_or_b32_sdwa
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; GFX906: v_lshl_or_b32 v{{[0-9]+}}, v{{[0-9]+}}, 16,
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define void @load_flat_hi_v2f16_reglo_vreg_sexti8(i8* %in, half %reg) #0 {
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entry:
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%load = load i8, i8* %in
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%ext = sext i8 %load to i16
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%bitcast = bitcast i16 %ext to half
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%build0 = insertelement <2 x half> undef, half %reg, i32 0
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%build1 = insertelement <2 x half> %build0, half %bitcast, i32 1
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store <2 x half> %build1, <2 x half> addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: {{^}}load_private_hi_v2i16_reglo_vreg:
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; GCN: s_waitcnt
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; GFX900: buffer_load_short_d16_hi v0, off, s[0:3], s5 offset:4094{{$}}
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@ -391,6 +586,48 @@ entry:
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ret void
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}
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; GCN-LABEL: {{^}}load_private_hi_v2f16_reglo_vreg_zexti8:
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; GCN: s_waitcnt
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; GFX900: buffer_load_ubyte_d16_hi v0, off, s[0:3], s5 offset:4095{{$}}
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; GFX900-NEXT: s_waitcnt
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; GFX900-NEXT: global_store_dword v{{\[[0-9]+:[0-9]+\]}}, v0
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; GFX900-NEXT: s_waitcnt
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; GFX900-NEXT: s_setpc_b64
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; NO-D16-HI: buffer_load_ubyte v{{[0-9]+}}, off, s[0:3], s5 offset:4095{{$}}
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define void @load_private_hi_v2f16_reglo_vreg_zexti8(i8 addrspace(5)* byval %in, half %reg) #0 {
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entry:
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%gep = getelementptr inbounds i8, i8 addrspace(5)* %in, i64 4091
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%load = load i8, i8 addrspace(5)* %gep
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%ext = zext i8 %load to i16
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%bitcast = bitcast i16 %ext to half
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%build0 = insertelement <2 x half> undef, half %reg, i32 0
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%build1 = insertelement <2 x half> %build0, half %bitcast, i32 1
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store <2 x half> %build1, <2 x half> addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: {{^}}load_private_hi_v2f16_reglo_vreg_sexti8:
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; GCN: s_waitcnt
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; GFX900: buffer_load_sbyte_d16_hi v0, off, s[0:3], s5 offset:4095{{$}}
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; GFX900-NEXT: s_waitcnt
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; GFX900-NEXT: global_store_dword v{{\[[0-9]+:[0-9]+\]}}, v0
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; GFX900-NEXT: s_waitcnt
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; GFX900-NEXT: s_setpc_b64
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; NO-D16-HI: buffer_load_sbyte v{{[0-9]+}}, off, s[0:3], s5 offset:4095{{$}}
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define void @load_private_hi_v2f16_reglo_vreg_sexti8(i8 addrspace(5)* byval %in, half %reg) #0 {
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entry:
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%gep = getelementptr inbounds i8, i8 addrspace(5)* %in, i64 4091
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%load = load i8, i8 addrspace(5)* %gep
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%ext = sext i8 %load to i16
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%bitcast = bitcast i16 %ext to half
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%build0 = insertelement <2 x half> undef, half %reg, i32 0
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%build1 = insertelement <2 x half> %build0, half %bitcast, i32 1
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store <2 x half> %build1, <2 x half> addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: {{^}}load_private_hi_v2i16_reglo_vreg_sexti8:
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; GCN: s_waitcnt
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; GFX900: buffer_load_sbyte_d16_hi v0, off, s[0:3], s5 offset:4095{{$}}
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@ -509,6 +746,44 @@ entry:
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ret void
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}
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; GCN-LABEL: {{^}}load_constant_hi_v2f16_reglo_vreg_sexti8:
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; GCN: s_waitcnt
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; GFX900-NEXT: global_load_sbyte_d16_hi v2, v[0:1], off offset:-4095
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; GFX900-NEXT: s_waitcnt
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; GFX900-NEXT: global_store_dword
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; GFX900-NEXT: s_waitcnt
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; GFX900-NEXT: s_setpc_b64
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define void @load_constant_hi_v2f16_reglo_vreg_sexti8(i8 addrspace(4)* %in, half %reg) #0 {
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entry:
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%gep = getelementptr inbounds i8, i8 addrspace(4)* %in, i64 -4095
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%load = load i8, i8 addrspace(4)* %gep
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%ext = sext i8 %load to i16
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%bitcast = bitcast i16 %ext to half
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%build0 = insertelement <2 x half> undef, half %reg, i32 0
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%build1 = insertelement <2 x half> %build0, half %bitcast, i32 1
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store <2 x half> %build1, <2 x half> addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: {{^}}load_constant_hi_v2f16_reglo_vreg_zexti8:
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; GCN: s_waitcnt
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; GFX900-NEXT: global_load_ubyte_d16_hi v2, v[0:1], off offset:-4095
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; GFX900-NEXT: s_waitcnt
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; GFX900-NEXT: global_store_dword
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; GFX900-NEXT: s_waitcnt
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; GFX900-NEXT: s_setpc_b64
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define void @load_constant_hi_v2f16_reglo_vreg_zexti8(i8 addrspace(4)* %in, half %reg) #0 {
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entry:
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%gep = getelementptr inbounds i8, i8 addrspace(4)* %in, i64 -4095
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%load = load i8, i8 addrspace(4)* %gep
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%ext = zext i8 %load to i16
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%bitcast = bitcast i16 %ext to half
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%build0 = insertelement <2 x half> undef, half %reg, i32 0
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%build1 = insertelement <2 x half> %build0, half %bitcast, i32 1
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store <2 x half> %build1, <2 x half> addrspace(1)* undef
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ret void
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}
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; Local object gives known offset, so requires converting from offen
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; to offset variant.
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@ -567,7 +842,7 @@ entry:
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; FIXME: Remove m0 init and waitcnt between reads
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; FIXME: Is there a cost to using the extload over not?
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; GCN-LABEL: {{^}}load_local_v2i16_split:
|
||||
; GCN-LABEL: {{^}}load_local_v2i16_split_multi_chain:
|
||||
; GCN: s_waitcnt
|
||||
; GFX900-NEXT: ds_read_u16 v1, v0
|
||||
; GFX900-NEXT: s_waitcnt
|
||||
|
@ -575,7 +850,7 @@ entry:
|
|||
; GFX900-NEXT: s_waitcnt
|
||||
; GFX900-NEXT: v_mov_b32_e32 v0, v1
|
||||
; GFX900-NEXT: s_setpc_b64
|
||||
define <2 x i16> @load_local_v2i16_split(i16 addrspace(3)* %in) #0 {
|
||||
define <2 x i16> @load_local_v2i16_split_multi_chain(i16 addrspace(3)* %in) #0 {
|
||||
entry:
|
||||
%gep = getelementptr inbounds i16, i16 addrspace(3)* %in, i32 1
|
||||
%load0 = load volatile i16, i16 addrspace(3)* %in
|
||||
|
@ -585,6 +860,45 @@ entry:
|
|||
ret <2 x i16> %build1
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}load_local_lo_hi_v2i16_samechain:
|
||||
; GFX900: ds_read_u16 v1, v0
|
||||
; GFX900-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX900-NEXT: ds_read_u16_d16_hi v1, v0 offset:16
|
||||
; GFX900-NEXT: s_waitcnt lgkmcnt(0)
|
||||
; GFX900-NEXT: v_mov_b32_e32 v0, v1
|
||||
; GFX900-NEXT: s_setpc_b64
|
||||
|
||||
; NO-D16-HI: ds_read_u16
|
||||
; NO-D16-HI: ds_read_u16
|
||||
define <2 x i16> @load_local_lo_hi_v2i16_samechain(i16 addrspace(3)* %in) #0 {
|
||||
entry:
|
||||
%gep = getelementptr inbounds i16, i16 addrspace(3)* %in, i32 8
|
||||
%load.lo = load i16, i16 addrspace(3)* %in
|
||||
%load.hi = load i16, i16 addrspace(3)* %gep
|
||||
%build0 = insertelement <2 x i16> undef, i16 %load.lo, i32 0
|
||||
%build1 = insertelement <2 x i16> %build0, i16 %load.hi, i32 1
|
||||
ret <2 x i16> %build1
|
||||
}
|
||||
|
||||
; GCN-LABEL: {{^}}load_local_lo_hi_v2i16_side_effect:
|
||||
; GFX900: ds_read_u16 [[LOAD0:v[0-9]+]], v0
|
||||
; GFX900: ds_write_b16
|
||||
; GFX900: ds_read_u16_d16_hi [[LOAD0]], v0 offset:16
|
||||
|
||||
; NO-D16-HI: ds_read_u16
|
||||
; NO-D16-HI: ds_write_b16
|
||||
; NO-D16-HI: ds_read_u16
|
||||
define <2 x i16> @load_local_lo_hi_v2i16_side_effect(i16 addrspace(3)* %in, i16 addrspace(3)* %may.alias) #0 {
|
||||
entry:
|
||||
%gep = getelementptr inbounds i16, i16 addrspace(3)* %in, i32 8
|
||||
%load.lo = load i16, i16 addrspace(3)* %in
|
||||
store i16 123, i16 addrspace(3)* %may.alias
|
||||
%load.hi = load i16, i16 addrspace(3)* %gep
|
||||
%build0 = insertelement <2 x i16> undef, i16 %load.lo, i32 0
|
||||
%build1 = insertelement <2 x i16> %build0, i16 %load.hi, i32 1
|
||||
ret <2 x i16> %build1
|
||||
}
|
||||
|
||||
; FIXME: Remove waitcnt between reads
|
||||
; GCN-LABEL: {{^}}load_global_v2i16_split:
|
||||
; GCN: s_waitcnt
|
||||
|
|
File diff suppressed because it is too large
Load Diff
Loading…
Reference in New Issue