forked from OSchip/llvm-project
Make Test More Thorough
Check that all ADD patters are processed. Add a SUB test. llvm-svn: 141314
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@ -83,9 +83,12 @@ def Decls : decls;
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// Define intrinsics
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def int_x86_sse2_add_ps : Intrinsic<"addps">;
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def int_x86_sse2_add_pd : Intrinsic<"addpd">;
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def int_x86_sse2_sub_ps : Intrinsic<"subps">;
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def int_x86_sse2_sub_pd : Intrinsic<"subpd">;
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def INTRINSIC : Intrinsic<"Dummy">;
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def bitconvert;
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def add;
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def sub;
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class MakePatImpl<list<dag> patterns> : Pat<patterns[0], patterns[1]>;
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class MakePat<list<dag> patterns,
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@ -126,3 +129,12 @@ defm ADD : arith<0x58, "add", "int_x86_sse2_addSUFFIX",
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// CHECK: [(set VR128:$dst, (int_x86_sse2_add_pd VR128:$src1, VR128:$src2))]
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// CHECK: [(set VR128:$dst, (int_x86_sse2_add_ps VR128:$src1, VR128:$src2))]
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// CHECK: (set VR128:$dst, (add (int_x86_sse2_add_ps VR128:$src1, VR128:$src2)))
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// CHECK: (set VR128:$dst, (add (int_x86_sse2_add_pd VR128:$src1, VR128:$src2)))
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defm SUB : arith<0x59, "sub", "int_x86_sse2_subSUFFIX",
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// rr Patterns
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[[(set REGCLASS:$dst, (INTRINSIC REGCLASS:$src1, REGCLASS:$src2))]]>;
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// CHECK: [(set VR128:$dst, (int_x86_sse2_sub_pd VR128:$src1, VR128:$src2))]
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// CHECK: [(set VR128:$dst, (int_x86_sse2_sub_ps VR128:$src1, VR128:$src2))]
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