forked from OSchip/llvm-project
[RISCV] Add '32bit' feature to rv32 only builtins.
The backend now has a 32bit feature as part of the recent mtune patch. We can now use that make our rv32-only builtin error checking work the same way as rv64-only errors. Reviewed By: kito-cheng Differential Revision: https://reviews.llvm.org/D132192
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parent
f3502afe85
commit
7440e2274f
clang
include/clang/Basic
lib
test
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@ -77,12 +77,12 @@ TARGET_BUILTIN(__builtin_riscv_fsr_64, "WiWiWiWi", "nc", "experimental-zbt,64bit
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// Zbkb extension
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TARGET_BUILTIN(__builtin_riscv_brev8, "LiLi", "nc", "zbkb")
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TARGET_BUILTIN(__builtin_riscv_zip_32, "ZiZi", "nc", "zbkb")
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TARGET_BUILTIN(__builtin_riscv_unzip_32, "ZiZi", "nc", "zbkb")
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TARGET_BUILTIN(__builtin_riscv_zip_32, "ZiZi", "nc", "zbkb,32bit")
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TARGET_BUILTIN(__builtin_riscv_unzip_32, "ZiZi", "nc", "zbkb,32bit")
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// Zknd extension
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TARGET_BUILTIN(__builtin_riscv_aes32dsi_32, "ZiZiZiIUc", "nc", "zknd")
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TARGET_BUILTIN(__builtin_riscv_aes32dsmi_32, "ZiZiZiIUc", "nc", "zknd")
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TARGET_BUILTIN(__builtin_riscv_aes32dsi_32, "ZiZiZiIUc", "nc", "zknd,32bit")
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TARGET_BUILTIN(__builtin_riscv_aes32dsmi_32, "ZiZiZiIUc", "nc", "zknd,32bit")
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TARGET_BUILTIN(__builtin_riscv_aes64ds_64, "WiWiWi", "nc", "zknd,64bit")
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TARGET_BUILTIN(__builtin_riscv_aes64dsm_64, "WiWiWi", "nc", "zknd,64bit")
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TARGET_BUILTIN(__builtin_riscv_aes64im_64, "WiWi", "nc", "zknd,64bit")
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@ -92,8 +92,8 @@ TARGET_BUILTIN(__builtin_riscv_aes64ks1i_64, "WiWiIUi", "nc", "zknd|zkne,64bit")
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TARGET_BUILTIN(__builtin_riscv_aes64ks2_64, "WiWiWi", "nc", "zknd|zkne,64bit")
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// Zkne extension
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TARGET_BUILTIN(__builtin_riscv_aes32esi_32, "ZiZiZiIUc", "nc", "zkne")
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TARGET_BUILTIN(__builtin_riscv_aes32esmi_32, "ZiZiZiIUc", "nc", "zkne")
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TARGET_BUILTIN(__builtin_riscv_aes32esi_32, "ZiZiZiIUc", "nc", "zkne,32bit")
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TARGET_BUILTIN(__builtin_riscv_aes32esmi_32, "ZiZiZiIUc", "nc", "zkne,32bit")
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TARGET_BUILTIN(__builtin_riscv_aes64es_64, "WiWiWi", "nc", "zkne,64bit")
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TARGET_BUILTIN(__builtin_riscv_aes64esm_64, "WiWiWi", "nc", "zkne,64bit")
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@ -103,12 +103,12 @@ TARGET_BUILTIN(__builtin_riscv_sha256sig1, "LiLi", "nc", "zknh")
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TARGET_BUILTIN(__builtin_riscv_sha256sum0, "LiLi", "nc", "zknh")
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TARGET_BUILTIN(__builtin_riscv_sha256sum1, "LiLi", "nc", "zknh")
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TARGET_BUILTIN(__builtin_riscv_sha512sig0h_32, "ZiZiZi", "nc", "zknh")
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TARGET_BUILTIN(__builtin_riscv_sha512sig0l_32, "ZiZiZi", "nc", "zknh")
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TARGET_BUILTIN(__builtin_riscv_sha512sig1h_32, "ZiZiZi", "nc", "zknh")
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TARGET_BUILTIN(__builtin_riscv_sha512sig1l_32, "ZiZiZi", "nc", "zknh")
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TARGET_BUILTIN(__builtin_riscv_sha512sum0r_32, "ZiZiZi", "nc", "zknh")
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TARGET_BUILTIN(__builtin_riscv_sha512sum1r_32, "ZiZiZi", "nc", "zknh")
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TARGET_BUILTIN(__builtin_riscv_sha512sig0h_32, "ZiZiZi", "nc", "zknh,32bit")
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TARGET_BUILTIN(__builtin_riscv_sha512sig0l_32, "ZiZiZi", "nc", "zknh,32bit")
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TARGET_BUILTIN(__builtin_riscv_sha512sig1h_32, "ZiZiZi", "nc", "zknh,32bit")
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TARGET_BUILTIN(__builtin_riscv_sha512sig1l_32, "ZiZiZi", "nc", "zknh,32bit")
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TARGET_BUILTIN(__builtin_riscv_sha512sum0r_32, "ZiZiZi", "nc", "zknh,32bit")
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TARGET_BUILTIN(__builtin_riscv_sha512sum1r_32, "ZiZiZi", "nc", "zknh,32bit")
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TARGET_BUILTIN(__builtin_riscv_sha512sig0_64, "WiWi", "nc", "zknh,64bit")
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TARGET_BUILTIN(__builtin_riscv_sha512sig1_64, "WiWi", "nc", "zknh,64bit")
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TARGET_BUILTIN(__builtin_riscv_sha512sum0_64, "WiWi", "nc", "zknh,64bit")
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@ -221,6 +221,8 @@ bool RISCVTargetInfo::initFeatureMap(
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if (getTriple().getArch() == llvm::Triple::riscv64) {
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Features["64bit"] = true;
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XLen = 64;
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} else {
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Features["32bit"] = true;
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}
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auto ParseResult = llvm::RISCVISAInfo::parseFeatures(XLen, FeaturesVec);
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@ -251,6 +253,7 @@ bool RISCVTargetInfo::hasFeature(StringRef Feature) const {
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.Case("riscv", true)
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.Case("riscv32", !Is64Bit)
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.Case("riscv64", Is64Bit)
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.Case("32bit", !Is64Bit)
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.Case("64bit", Is64Bit)
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.Default(None);
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if (Result)
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@ -4324,27 +4324,6 @@ bool Sema::CheckRISCVLMUL(CallExpr *TheCall, unsigned ArgNum) {
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<< Arg->getSourceRange();
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}
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static bool isRISCV32Builtin(unsigned BuiltinID) {
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// These builtins only work on riscv32 targets.
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switch (BuiltinID) {
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case RISCV::BI__builtin_riscv_zip_32:
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case RISCV::BI__builtin_riscv_unzip_32:
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case RISCV::BI__builtin_riscv_aes32dsi_32:
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case RISCV::BI__builtin_riscv_aes32dsmi_32:
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case RISCV::BI__builtin_riscv_aes32esi_32:
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case RISCV::BI__builtin_riscv_aes32esmi_32:
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case RISCV::BI__builtin_riscv_sha512sig0h_32:
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case RISCV::BI__builtin_riscv_sha512sig0l_32:
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case RISCV::BI__builtin_riscv_sha512sig1h_32:
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case RISCV::BI__builtin_riscv_sha512sig1l_32:
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case RISCV::BI__builtin_riscv_sha512sum0r_32:
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case RISCV::BI__builtin_riscv_sha512sum1r_32:
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return true;
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}
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return false;
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}
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bool Sema::CheckRISCVBuiltinFunctionCall(const TargetInfo &TI,
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unsigned BuiltinID,
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CallExpr *TheCall) {
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@ -4355,12 +4334,6 @@ bool Sema::CheckRISCVBuiltinFunctionCall(const TargetInfo &TI,
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StringRef Features = Context.BuiltinInfo.getRequiredFeatures(BuiltinID);
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Features.split(ReqFeatures, ',');
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// Check for 32-bit only builtins on a 64-bit target.
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const llvm::Triple &TT = TI.getTriple();
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if (TT.getArch() != llvm::Triple::riscv32 && isRISCV32Builtin(BuiltinID))
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return Diag(TheCall->getCallee()->getBeginLoc(),
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diag::err_32_bit_builtin_64_bit_tgt);
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// Check if each required feature is included
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for (StringRef F : ReqFeatures) {
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SmallVector<StringRef> ReqOpFeatures;
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@ -4380,6 +4353,8 @@ bool Sema::CheckRISCVBuiltinFunctionCall(const TargetInfo &TI,
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// the diagnostic.
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if (OF == "64bit")
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OF = "RV64";
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if (OF == "32bit")
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OF = "RV32";
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// Convert features like "zbr" and "experimental-zbr" to "Zbr".
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OF.consume_front("experimental-");
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@ -0,0 +1,12 @@
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// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
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// RUN: %clang_cc1 -triple riscv64 -target-feature +zbkb -verify %s -o -
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int zip(int rs1)
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{
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return __builtin_riscv_zip_32(rs1); // expected-error {{builtin requires at least one of the following extensions support to be enabled : 'RV32'}}
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}
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int unzip(int rs1)
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{
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return __builtin_riscv_unzip_32(rs1); // expected-error {{builtin requires at least one of the following extensions support to be enabled : 'RV32'}}
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}
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@ -1,7 +1,7 @@
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// RUN: %clang --target=riscv32-unknown-elf -S -emit-llvm %s -o - | FileCheck %s -check-prefix=RV32
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// RUN: %clang --target=riscv64-unknown-elf -S -emit-llvm %s -o - | FileCheck %s -check-prefix=RV64
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// RV32: "target-features"="+a,+c,+m,+relax,-save-restore"
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// RV32: "target-features"="+32bit,+a,+c,+m,+relax,-save-restore"
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// RV64: "target-features"="+64bit,+a,+c,+m,+relax,-save-restore"
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// Dummy function
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