forked from OSchip/llvm-project
Emit relocations for the global variable using instructions. This gets us
LA, LOADHiAddr, CALLpcrel, and MovePCtoLR working, though the constant pool probably is not right. llvm-svn: 18144
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743a43424f
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@ -12,8 +12,8 @@
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//
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//===----------------------------------------------------------------------===//
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#include "PPC32JITInfo.h"
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#include "PPC32TargetMachine.h"
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#include "PPC32Relocations.h"
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#include "PowerPC.h"
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#include "llvm/Module.h"
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#include "llvm/CodeGen/MachineCodeEmitter.h"
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@ -28,6 +28,10 @@ namespace {
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TargetMachine &TM;
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MachineCodeEmitter &MCE;
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/// MovePCtoLROffset - When/if we see a MovePCtoLR instruction, we record
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/// its address in the function into this pointer.
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void *MovePCtoLROffset;
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// Tracks which instruction references which BasicBlock
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std::vector<std::pair<const BasicBlock*,
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std::pair<unsigned*,MachineInstr*> > > BBRefs;
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@ -36,9 +40,7 @@ namespace {
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/// getMachineOpValue - evaluates the MachineOperand of a given MachineInstr
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///
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int64_t getMachineOpValue(MachineInstr &MI, MachineOperand &MO);
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unsigned getAddressOfExternalFunction(Function *F);
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int getMachineOpValue(MachineInstr &MI, MachineOperand &MO);
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public:
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PPC32CodeEmitter(TargetMachine &T, MachineCodeEmitter &M)
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@ -78,9 +80,6 @@ namespace {
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///
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bool PPC32TargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
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MachineCodeEmitter &MCE) {
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// Keep as `true' until this is a functional JIT to allow llvm-gcc to build
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return true;
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// Machine code emitter pass for PowerPC
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PM.add(new PPC32CodeEmitter(*this, MCE));
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// Delete machine code for this function after emitting it
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@ -89,6 +88,7 @@ bool PPC32TargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
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}
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bool PPC32CodeEmitter::runOnMachineFunction(MachineFunction &MF) {
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MovePCtoLROffset = 0;
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MCE.startFunction(MF);
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MCE.emitConstantPool(MF.getConstantPool());
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for (MachineFunction::iterator BB = MF.begin(), E = MF.end(); BB != E; ++BB)
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@ -97,11 +97,11 @@ bool PPC32CodeEmitter::runOnMachineFunction(MachineFunction &MF) {
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// Resolve branches to BasicBlocks for the entire function
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for (unsigned i = 0, e = BBRefs.size(); i != e; ++i) {
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long Location = BBLocations[BBRefs[i].first];
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intptr_t Location = BBLocations[BBRefs[i].first];
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unsigned *Ref = BBRefs[i].second.first;
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MachineInstr *MI = BBRefs[i].second.second;
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DEBUG(std::cerr << "Fixup @ " << std::hex << Ref << " to 0x" << Location
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<< " in instr: " << std::dec << *MI);
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DEBUG(std::cerr << "Fixup @ " << (void*)Ref << " to " << (void*)Location
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<< " in instr: " << *MI);
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for (unsigned ii = 0, ee = MI->getNumOperands(); ii != ee; ++ii) {
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MachineOperand &op = MI->getOperand(ii);
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if (op.isPCRelativeDisp()) {
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@ -129,28 +129,22 @@ void PPC32CodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) {
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for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ++I){
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MachineInstr &MI = *I;
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unsigned Opcode = MI.getOpcode();
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if (Opcode == PPC::IMPLICIT_DEF)
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continue; // pseudo opcode, no side effects
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else if (Opcode == PPC::MovePCtoLR) {
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// This can be simplified: the resulting 32-bit code is 0x48000005
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MachineInstr *MI = BuildMI(PPC::BL, 1).addImm(1);
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emitWord(getBinaryCodeForInstr(*MI));
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delete MI;
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} else
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switch (MI.getOpcode()) {
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default:
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emitWord(getBinaryCodeForInstr(*I));
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break;
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case PPC::IMPLICIT_DEF:
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break; // pseudo opcode, no side effects
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case PPC::MovePCtoLR:
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assert(MovePCtoLROffset == 0 &&
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"Multiple MovePCtoLR instructions in the function?");
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MovePCtoLROffset = (void*)(intptr_t)MCE.getCurrentPCValue();
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emitWord(0x48000005); // bl 1
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break;
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}
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}
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}
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unsigned PPC32CodeEmitter::getAddressOfExternalFunction(Function *F) {
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static std::map<Function*, unsigned> ExternalFn2Addr;
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std::map<Function*, unsigned>::iterator Addr = ExternalFn2Addr.find(F);
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// FIXME: this needs to be rewritten.
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if (Addr == ExternalFn2Addr.end())
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ExternalFn2Addr[F] = 0; //MCE.forceCompilationOf(F);
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return ExternalFn2Addr[F];
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}
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static unsigned enumRegToMachineReg(unsigned enumReg) {
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switch (enumReg) {
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case PPC::R0 : case PPC::F0 : return 0;
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@ -191,18 +185,28 @@ static unsigned enumRegToMachineReg(unsigned enumReg) {
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}
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}
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int64_t PPC32CodeEmitter::getMachineOpValue(MachineInstr &MI,
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MachineOperand &MO) {
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int64_t rv = 0; // Return value; defaults to 0 for unhandled cases
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int PPC32CodeEmitter::getMachineOpValue(MachineInstr &MI, MachineOperand &MO) {
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int rv = 0; // Return value; defaults to 0 for unhandled cases
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// or things that get fixed up later by the JIT.
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if (MO.isRegister()) {
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rv = enumRegToMachineReg(MO.getReg());
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} else if (MO.isImmediate()) {
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rv = MO.getImmedValue();
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} else if (MO.isGlobalAddress()) {
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//GlobalValue *GV = MO.getGlobal();
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// FIXME: Emit a relocation here.
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rv = 0;
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unsigned Reloc;
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if (MI.getOpcode() == PPC::CALLpcrel)
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Reloc = PPC::reloc_pcrel_bx;
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else if (MI.getOpcode() == PPC::LOADHiAddr) {
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Reloc = PPC::reloc_absolute_loadhi;
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} else if (MI.getOpcode() == PPC::LA) {
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Reloc = PPC::reloc_absolute_la;
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} else {
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assert(0 && "Unknown instruction for relocation!");
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}
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MCE.addRelocation(MachineRelocation(MCE.getCurrentPCOffset(),
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Reloc, MO.getGlobal(),
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-((intptr_t)MovePCtoLROffset+4)));
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} else if (MO.isMachineBasicBlock()) {
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const BasicBlock *BB = MO.getMachineBasicBlock()->getBasicBlock();
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unsigned* CurrPC = (unsigned*)(intptr_t)MCE.getCurrentPCValue();
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} else if (MO.isConstantPoolIndex()) {
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unsigned index = MO.getConstantPoolIndex();
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rv = MCE.getConstantPoolEntryAddress(index);
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} else if (MO.isFrameIndex()) {
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std::cerr << "PPC32CodeEmitter: error: Frame index unhandled!\n";
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abort();
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} else {
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std::cerr << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
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abort();
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// Special treatment for global symbols: constants and vars
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if (MO.isConstantPoolIndex() || MO.isGlobalAddress()) {
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unsigned Opcode = MI.getOpcode();
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int64_t MBBLoc = BBLocations[MI.getParent()->getBasicBlock()];
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assert(MovePCtoLROffset && "MovePCtoLR not seen yet?");
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if (Opcode == PPC::LOADHiAddr) {
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// LoadHiAddr wants hi16(addr - mbb)
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rv = (rv - MBBLoc) >> 16;
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// LoadHiAddr wants hi16(addr - &MovePCtoLR)
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rv >>= 16;
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} else if (Opcode == PPC::LWZ || Opcode == PPC::LA ||
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Opcode == PPC::LFS || Opcode == PPC::LFD) {
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// These load opcodes want lo16(addr - mbb)
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rv = (rv - MBBLoc) & 0xffff;
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// These load opcodes want lo16(addr - &MovePCtoLR)
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rv &= 0xffff;
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}
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}
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return rv;
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}
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void PPC32JITInfo::replaceMachineCodeForFunction (void *Old, void *New) {
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std::cerr << "PPC32JITInfo::replaceMachineCodeForFunction not implemented\n";
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abort();
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}
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#include "PPC32GenCodeEmitter.inc"
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