forked from OSchip/llvm-project
Revert "ARMFrameLowering: Reserve emergency spill slot for large arguments"
This reverts commit r300639, as it broke self-hosting on ARM. PR32709. llvm-svn: 300668
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1be800c511
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@ -322,24 +322,6 @@ static void emitAligningInstructions(MachineFunction &MF, ARMFunctionInfo *AFI,
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}
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}
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/// We need the offset of the frame pointer relative to other MachineFrameInfo
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/// offsets which are encoded relative to SP at function begin.
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/// See also emitPrologue() for how the FP is set up.
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/// Unfortunately we cannot determine this value in determineCalleeSaves() yet
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/// as assignCalleeSavedSpillSlots() hasn't run at this point. Instead we use
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/// this to produce a conservative estimate that we check in an assert() later.
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static int getMaxFPOffset(const Function &F, const ARMFunctionInfo &AFI) {
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// We may end up saving a lot of registers that are higher numbered than the
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// r7 used for FP in thumb.
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if (F.hasFnAttribute("interrupt") ||
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F.getCallingConv() == CallingConv::CXX_FAST_TLS)
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return -AFI.getArgRegsSaveSize() - (8 * 4);
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// Usually it is just the link register and the FP itself (and in rare cases
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// r12?) saved to reach FP.
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return -AFI.getArgRegsSaveSize() - 12;
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}
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void ARMFrameLowering::emitPrologue(MachineFunction &MF,
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MachineBasicBlock &MBB) const {
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MachineBasicBlock::iterator MBBI = MBB.begin();
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@ -450,10 +432,8 @@ void ARMFrameLowering::emitPrologue(MachineFunction &MF,
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unsigned DPRCSOffset = GPRCS2Offset - DPRGapSize - DPRCSSize;
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int FramePtrOffsetInPush = 0;
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if (HasFP) {
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int FPOffset = MFI.getObjectOffset(FramePtrSpillFI);
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assert(getMaxFPOffset(*MF.getFunction(), *AFI) <= FPOffset &&
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"Max FP estimation is wrong");
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FramePtrOffsetInPush = FPOffset + ArgRegsSaveSize;
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FramePtrOffsetInPush =
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MFI.getObjectOffset(FramePtrSpillFI) + ArgRegsSaveSize;
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AFI->setFramePtrSpillOffset(MFI.getObjectOffset(FramePtrSpillFI) +
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NumBytes);
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}
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@ -1720,14 +1700,6 @@ void ARMFrameLowering::determineCalleeSaves(MachineFunction &MF,
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// worth the effort and added fragility?
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unsigned EstimatedStackSize =
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MFI.estimateStackSize(MF) + 4 * (NumGPRSpills + NumFPRSpills);
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// Determine biggest (positive) SP offset in MachineFrameInfo.
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int MaxFixedOffset = 0;
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for (int I = MFI.getObjectIndexBegin(); I < 0; ++I) {
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int MaxObjectOffset = MFI.getObjectOffset(I) + MFI.getObjectSize(I);
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MaxFixedOffset = std::max(MaxFixedOffset, MaxObjectOffset);
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}
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bool HasFP = hasFP(MF);
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if (HasFP) {
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if (AFI->hasStackFrame())
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@ -1735,20 +1707,15 @@ void ARMFrameLowering::determineCalleeSaves(MachineFunction &MF,
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} else {
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// If FP is not used, SP will be used to access arguments, so count the
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// size of arguments into the estimation.
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EstimatedStackSize += MaxFixedOffset;
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EstimatedStackSize += AFI->getArgumentStackSize();
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}
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EstimatedStackSize += 16; // For possible paddings.
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unsigned EstimatedRSStackSizeLimit = estimateRSStackSizeLimit(MF, this);
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int MaxFPOffset = getMaxFPOffset(*MF.getFunction(), *AFI);
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bool BigFrameOffsets = EstimatedStackSize >= EstimatedRSStackSizeLimit ||
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MFI.hasVarSizedObjects() ||
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(MFI.adjustsStack() && !canSimplifyCallFramePseudos(MF)) ||
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// For large argument stacks fp relative addressed may overflow.
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(HasFP && (MaxFixedOffset - MaxFPOffset) >= (int)EstimatedRSStackSizeLimit);
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bool BigStack = EstimatedStackSize >= estimateRSStackSizeLimit(MF, this) ||
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MFI.hasVarSizedObjects() ||
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(MFI.adjustsStack() && !canSimplifyCallFramePseudos(MF));
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bool ExtraCSSpill = false;
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if (BigFrameOffsets ||
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!CanEliminateFrame || RegInfo->cannotEliminateFrame(MF)) {
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if (BigStack || !CanEliminateFrame || RegInfo->cannotEliminateFrame(MF)) {
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AFI->setHasStackFrame(true);
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if (HasFP) {
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@ -1932,7 +1899,7 @@ void ARMFrameLowering::determineCalleeSaves(MachineFunction &MF,
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// callee-saved register or reserve a special spill slot to facilitate
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// register scavenging. Thumb1 needs a spill slot for stack pointer
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// adjustments also, even when the frame itself is small.
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if (BigFrameOffsets && !ExtraCSSpill) {
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if (BigStack && !ExtraCSSpill) {
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// If any non-reserved CS register isn't spilled, just spill one or two
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// extra. That should take care of it!
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unsigned NumExtras = TargetAlign / 4;
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@ -1,94 +0,0 @@
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# RUN: llc -o - %s -mtriple=thumbv7-- -run-pass=stack-protector -run-pass=prologepilog | FileCheck %s
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---
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# This should trigger an emergency spill in the register scavenger because the
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# frame offset into the large argument is too large.
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# CHECK-LABEL: name: func0
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# CHECK: t2STRi12 killed %r7, %sp, 0, 14, _ :: (store 4 into %stack.0)
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# CHECK: %r7 = t2ADDri killed %sp, 4096, 14, _, _
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# CHECK: %r11 = t2LDRi12 killed %r7, 36, 14, _ :: (load 4)
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# CHECK: %r7 = t2LDRi12 %sp, 0, 14, _ :: (load 4 from %stack.0)
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name: func0
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tracksRegLiveness: true
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fixedStack:
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- { id: 0, offset: 4084, size: 4, alignment: 4, isImmutable: true,
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isAliased: false }
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- { id: 1, offset: -12, size: 4096, alignment: 4, isImmutable: false,
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isAliased: false }
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body: |
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bb.0:
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%r0 = IMPLICIT_DEF
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%r1 = IMPLICIT_DEF
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%r2 = IMPLICIT_DEF
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%r3 = IMPLICIT_DEF
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%r4 = IMPLICIT_DEF
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%r5 = IMPLICIT_DEF
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%r6 = IMPLICIT_DEF
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%r8 = IMPLICIT_DEF
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%r9 = IMPLICIT_DEF
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%r10 = IMPLICIT_DEF
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%r11 = IMPLICIT_DEF
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%r12 = IMPLICIT_DEF
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%lr = IMPLICIT_DEF
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%r11 = t2LDRi12 %fixed-stack.0, 0, 14, _ :: (load 4)
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KILL %r0
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KILL %r1
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KILL %r2
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KILL %r3
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KILL %r4
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KILL %r5
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KILL %r6
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KILL %r8
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KILL %r9
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KILL %r10
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KILL %r11
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KILL %r12
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KILL %lr
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...
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---
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# This should not trigger an emergency spill yet.
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# CHECK-LABEL: name: func1
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# CHECK-NOT: t2STRi12
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# CHECK-NOT: t2ADDri
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# CHECK: %r11 = t2LDRi12 %sp, 4092, 14, _ :: (load 4)
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# CHECK-NOT: t2LDRi12
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name: func1
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tracksRegLiveness: true
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fixedStack:
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- { id: 0, offset: 4044, size: 4, alignment: 4, isImmutable: true,
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isAliased: false }
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- { id: 1, offset: -12, size: 4056, alignment: 4, isImmutable: false,
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isAliased: false }
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body: |
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bb.0:
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%r0 = IMPLICIT_DEF
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%r1 = IMPLICIT_DEF
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%r2 = IMPLICIT_DEF
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%r3 = IMPLICIT_DEF
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%r4 = IMPLICIT_DEF
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%r5 = IMPLICIT_DEF
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%r6 = IMPLICIT_DEF
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%r8 = IMPLICIT_DEF
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%r9 = IMPLICIT_DEF
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%r10 = IMPLICIT_DEF
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%r11 = IMPLICIT_DEF
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%r12 = IMPLICIT_DEF
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%lr = IMPLICIT_DEF
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%r11 = t2LDRi12 %fixed-stack.0, 0, 14, _ :: (load 4)
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KILL %r0
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KILL %r1
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KILL %r2
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KILL %r3
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KILL %r4
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KILL %r5
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KILL %r6
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KILL %r8
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KILL %r9
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KILL %r10
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KILL %r11
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KILL %r12
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KILL %lr
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...
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