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[ARM] Handle +t2dsp feature as an ArchExtKind in ARMTargetParser.def 

Currently, the availability of DSP instructions (ACLE 6.4.7) is handled in
a hand-rolled tricky condition block in lib/Basic/Targets.cpp, with a FIXME:
attached.

http://reviews.llvm.org/D12937 moved the handling of +t2dsp over to
ARMTargetParser.def in LLVM, to be in line with other architecture extensions.

This is the corresponding patch to clang, to clear the FIXME: and update
the tests.

Differential Revision: http://reviews.llvm.org/D12938

llvm-svn: 248154
This commit is contained in:
Artyom Skrobov 2015-09-21 13:19:25 +00:00
parent 415af0184c
commit 7428f1ef64
2 changed files with 19 additions and 17 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
clang/lib/Basic/Targets.cpp
View File

@ -4121,6 +4121,7 @@ class ARMTargetInfo : public TargetInfo {
unsigned CRC : 1;
unsigned Crypto : 1;
unsigned T2DSP : 1;
unsigned Unaligned : 1;
enum {
@ -4472,6 +4473,7 @@ public:
FPU = 0;
CRC = 0;
Crypto = 0;
T2DSP = 0;
Unaligned = 1;
SoftFloat = SoftFloatABI = false;
HWDiv = 0;
@ -4507,6 +4509,8 @@ public:
CRC = 1;
} else if (Feature == "+crypto") {
Crypto = 1;
} else if (Feature == "+t2dsp") {
T2DSP = 1;
} else if (Feature == "+fp-only-sp") {
HW_FP_remove |= HW_FP_DP | HW_FP_HP;
} else if (Feature == "+strict-align") {
@ -4743,11 +4747,7 @@ public:
// ACLE 6.4.7 DSP instructions
bool hasDSP = false;
bool is5EOrAbove = (ArchVersion >= 6 ||
(ArchVersion == 5 && CPUAttr.count('E')));
// FIXME: We are not getting all 32-bit ARM architectures
bool is32Bit = (!isThumb() || supportsThumb2());
if (is5EOrAbove && is32Bit && (CPUProfile != "M" || CPUAttr == "7EM")) {
if (T2DSP) {
Builder.defineMacro("__ARM_FEATURE_DSP", "1");
hasDSP = true;
}

26
clang/test/CodeGen/arm-target-features.c
View File

@ -1,15 +1,15 @@
// REQUIRES: arm-registered-target
// RUN: %clang_cc1 -triple thumbv7-linux-gnueabihf -target-cpu cortex-a8 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP3
// CHECK-VFP3: "target-features"="+neon,+vfp3"
// CHECK-VFP3: "target-features"="+neon,+t2dsp,+vfp3"
// RUN: %clang_cc1 -triple thumbv7-linux-gnueabi -target-cpu cortex-a9 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP3-FP16
// CHECK-VFP3-FP16: "target-features"="+fp16,+neon,+vfp3"
// CHECK-VFP3-FP16: "target-features"="+fp16,+neon,+t2dsp,+vfp3"
// RUN: %clang_cc1 -triple thumbv7-linux-gnueabihf -target-cpu cortex-a5 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP4
// CHECK-VFP4: "target-features"="+neon,+vfp4"
// CHECK-VFP4: "target-features"="+neon,+t2dsp,+vfp4"
// RUN: %clang_cc1 -triple thumbv7-linux-gnueabihf -target-cpu cortex-a7 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP4-DIV
@ -18,39 +18,41 @@
// RUN: %clang_cc1 -triple armv7-linux-gnueabihf -target-cpu cortex-a17 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP4-DIV
// RUN: %clang_cc1 -triple thumbv7s-linux-gnueabi -target-cpu swift -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP4-DIV
// RUN: %clang_cc1 -triple thumbv7-linux-gnueabihf -target-cpu krait -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP4-DIV
// CHECK-VFP4-DIV: "target-features"="+hwdiv,+hwdiv-arm,+neon,+vfp4"
// CHECK-VFP4-DIV: "target-features"="+hwdiv,+hwdiv-arm,+neon,+t2dsp,+vfp4"
// RUN: %clang_cc1 -triple thumbv7s-apple-ios7.0 -target-cpu cyclone -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-BASIC-V8
// RUN: %clang_cc1 -triple armv8-linux-gnueabi -target-cpu cortex-a53 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-BASIC-V8
// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu cortex-a57 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-BASIC-V8
// RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu cortex-a72 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-BASIC-V8
// CHECK-BASIC-V8: "target-features"="+crc,+crypto,+fp-armv8,+hwdiv,+hwdiv-arm,+neon"
// CHECK-BASIC-V8: "target-features"="+crc,+crypto,+fp-armv8,+hwdiv,+hwdiv-arm,+neon,+t2dsp"
// RUN: %clang_cc1 -triple thumbv7-linux-gnueabi -target-cpu cortex-r5 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP3-D16-DIV
// CHECK-VFP3-D16-DIV: "target-features"="+d16,+hwdiv,+hwdiv-arm,+vfp3"
// CHECK-VFP3-D16-DIV: "target-features"="+d16,+hwdiv,+hwdiv-arm,+t2dsp,+vfp3"
// RUN: %clang_cc1 -triple armv7-linux-gnueabi -target-cpu cortex-r4f -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP3-D16-THUMB-DIV
// CHECK-VFP3-D16-THUMB-DIV: "target-features"="+d16,+hwdiv,+vfp3"
// CHECK-VFP3-D16-THUMB-DIV: "target-features"="+d16,+hwdiv,+t2dsp,+vfp3"
// RUN: %clang_cc1 -triple thumbv7-linux-gnueabi -target-cpu cortex-r7 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP3-D16-FP16-DIV
// CHECK-VFP3-D16-FP16-DIV: "target-features"="+d16,+fp16,+hwdiv,+hwdiv-arm,+vfp3"
// CHECK-VFP3-D16-FP16-DIV: "target-features"="+d16,+fp16,+hwdiv,+hwdiv-arm,+t2dsp,+vfp3"
// RUN: %clang_cc1 -triple thumbv7-linux-gnueabi -target-cpu cortex-m4 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP4-D16-SP-THUMB-DIV
// CHECK-VFP4-D16-SP-THUMB-DIV: "target-features"="+d16,+fp-only-sp,+hwdiv,+vfp4"
// CHECK-VFP4-D16-SP-THUMB-DIV: "target-features"="+d16,+fp-only-sp,+hwdiv,+t2dsp,+vfp4"
// RUN: %clang_cc1 -triple thumbv7-linux-gnueabi -target-cpu cortex-m7 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP5-D16-THUMB-DIV
// CHECK-VFP5-D16-THUMB-DIV: "target-features"="+d16,+fp-armv8,+hwdiv"
// CHECK-VFP5-D16-THUMB-DIV: "target-features"="+d16,+fp-armv8,+hwdiv,+t2dsp"
// RUN: %clang_cc1 -triple armv7-linux-gnueabi -target-cpu cortex-r4 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-THUMB-DIV
// RUN: %clang_cc1 -triple thumbv7-linux-gnueabi -target-cpu cortex-m3 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-THUMB-DIV
// CHECK-THUMB-DIV: "target-features"="+hwdiv"
// CHECK-THUMB-DIV: "target-features"="+hwdiv,+t2dsp"
// RUN: %clang_cc1 -triple thumbv7-linux-gnueabi -target-cpu cortex-m3 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-THUMB-DIV-M3
// CHECK-THUMB-DIV-M3: "target-features"="+hwdiv"
void foo() {}