Add a new MC bit for NaCl (Native Client) mode. NaCl requires that certain

instructions are more aligned than the CPU requires, and adds some additional
directives, to follow in future patches. Patch by David Meyer!

llvm-svn: 139125
This commit is contained in:
Nick Lewycky 2011-09-05 21:51:43 +00:00
parent df06b6e069
commit 73df7e3830
10 changed files with 55 additions and 3 deletions

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@ -23,6 +23,9 @@ include "llvm/Target/Target.td"
def ModeThumb : SubtargetFeature<"thumb-mode", "InThumbMode", "true",
"Thumb mode">;
def ModeNaCl : SubtargetFeature<"nacl-mode", "InNaClMode", "true",
"Native client mode">;
//===----------------------------------------------------------------------===//
// ARM Subtarget features.
//

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@ -209,6 +209,8 @@ def IsARM : Predicate<"!Subtarget->isThumb()">,
AssemblerPredicate<"!ModeThumb">;
def IsDarwin : Predicate<"Subtarget->isTargetDarwin()">;
def IsNotDarwin : Predicate<"!Subtarget->isTargetDarwin()">;
def IsNaCl : Predicate<"Subtarget->isTargetNaCl()">,
AssemblerPredicate<"ModeNaCl">;
// FIXME: Eventually this will be just "hasV6T2Ops".
def UseMovt : Predicate<"Subtarget->useMovt()">;

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@ -53,6 +53,7 @@ ARMSubtarget::ARMSubtarget(const std::string &TT, const std::string &CPU,
, HasVMLxForwarding(false)
, SlowFPBrcc(false)
, InThumbMode(false)
, InNaClMode(false)
, HasThumb2(false)
, NoARM(false)
, PostRAScheduler(false)

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@ -70,6 +70,9 @@ protected:
/// InThumbMode - True if compiling for Thumb, false for ARM.
bool InThumbMode;
/// InNaClMode - True if targeting Native Client
bool InNaClMode;
/// HasThumb2 - True if Thumb2 instructions are supported.
bool HasThumb2;
@ -209,6 +212,9 @@ protected:
const Triple &getTargetTriple() const { return TargetTriple; }
bool isTargetDarwin() const { return TargetTriple.isOSDarwin(); }
bool isTargetNaCl() const {
return TargetTriple.getOS() == Triple::NativeClient;
}
bool isTargetELF() const { return !isTargetDarwin(); }
bool isAPCS_ABI() const { return TargetABI == ARM_ABI_APCS; }

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@ -86,6 +86,14 @@ std::string ARM_MC::ParseARMTriple(StringRef TT) {
ARMArchFeature += ",+thumb-mode";
}
Triple TheTriple(TT);
if (TheTriple.getOS() == Triple::NativeClient) {
if (ARMArchFeature.empty())
ARMArchFeature = "+nacl-mode";
else
ARMArchFeature += ",+nacl-mode";
}
return ARMArchFeature;
}

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@ -40,9 +40,16 @@ using namespace llvm;
std::string X86_MC::ParseX86Triple(StringRef TT) {
Triple TheTriple(TT);
std::string FS;
if (TheTriple.getArch() == Triple::x86_64)
return "+64bit-mode";
return "-64bit-mode";
FS = "+64bit-mode";
else
FS = "-64bit-mode";
if (TheTriple.getOS() == Triple::NativeClient)
FS += ",+nacl-mode";
else
FS += ",-nacl-mode";
return FS;
}
/// GetCpuIDAndInfo - Execute the specified cpuid and return the 4 values in the

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@ -23,6 +23,9 @@ include "llvm/Target/Target.td"
def Mode64Bit : SubtargetFeature<"64bit-mode", "In64BitMode", "true",
"64-bit mode (x86_64)">;
def ModeNaCl : SubtargetFeature<"nacl-mode", "InNaClMode", "true",
"Native Client mode">;
//===----------------------------------------------------------------------===//
// X86 Subtarget features.
//===----------------------------------------------------------------------===//

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@ -482,6 +482,14 @@ def In64BitMode : Predicate<"Subtarget->is64Bit()">,
AssemblerPredicate<"Mode64Bit">;
def IsWin64 : Predicate<"Subtarget->isTargetWin64()">;
def NotWin64 : Predicate<"!Subtarget->isTargetWin64()">;
def IsNaCl : Predicate<"Subtarget->isTargetNaCl()">,
AssemblerPredicate<"ModeNaCl">;
def IsNaCl32 : Predicate<"Subtarget->isTargetNaCl32()">,
AssemblerPredicate<"ModeNaCl,!Mode64Bit">;
def IsNaCl64 : Predicate<"Subtarget->isTargetNaCl64()">,
AssemblerPredicate<"ModeNaCl,Mode64Bit">;
def NotNaCl : Predicate<"!Subtarget->isTargetNaCl()">,
AssemblerPredicate<"!ModeNaCl">;
def SmallCode : Predicate<"TM.getCodeModel() == CodeModel::Small">;
def KernelCode : Predicate<"TM.getCodeModel() == CodeModel::Kernel">;
def FarData : Predicate<"TM.getCodeModel() != CodeModel::Small &&"

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@ -260,7 +260,8 @@ X86Subtarget::X86Subtarget(const std::string &TT, const std::string &CPU,
// FIXME: this is a known good value for Yonah. How about others?
, MaxInlineSizeThreshold(128)
, TargetTriple(TT)
, In64BitMode(is64Bit) {
, In64BitMode(is64Bit)
, InNaClMode(false) {
// Determine default and user specified characteristics
if (!FS.empty() || !CPU.empty()) {
std::string CPUName = CPU;
@ -306,6 +307,11 @@ X86Subtarget::X86Subtarget(const std::string &TT, const std::string &CPU,
if (In64BitMode)
ToggleFeature(X86::Mode64Bit);
if (isTargetNaCl()) {
InNaClMode = true;
ToggleFeature(X86::ModeNaCl);
}
if (HasAVX)
X86SSELevel = NoMMXSSE;

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@ -119,6 +119,9 @@ private:
/// In64BitMode - True if compiling for 64-bit, false for 32-bit.
bool In64BitMode;
/// InNaClMode - True if compiling for Native Client target.
bool InNaClMode;
public:
/// This constructor initializes the data members to match that
@ -190,6 +193,11 @@ public:
return !isTargetDarwin() && !isTargetWindows() && !isTargetCygMing();
}
bool isTargetLinux() const { return TargetTriple.getOS() == Triple::Linux; }
bool isTargetNaCl() const {
return TargetTriple.getOS() == Triple::NativeClient;
}
bool isTargetNaCl32() const { return isTargetNaCl() && !is64Bit(); }
bool isTargetNaCl64() const { return isTargetNaCl() && is64Bit(); }
bool isTargetWindows() const { return TargetTriple.getOS() == Triple::Win32; }
bool isTargetMingw() const { return TargetTriple.getOS() == Triple::MinGW32; }