forked from OSchip/llvm-project
[PowerPC][NFC] Regenerate test using script
This test case ended up as a hybrid of generated checks and manually inserted checks. Regenerate using script to make it consistent. llvm-svn: 366659
This commit is contained in:
Nemanja Ivanovic
parent
e6cd20ba53
commit
73d641a23c
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@ -1,3 +1,4 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mcpu=pwr9 -O3 -verify-machineinstrs -ppc-vsr-nums-as-vr \
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; RUN: -ppc-asm-full-reg-names -mtriple=powerpc64le-unknown-linux-gnu \
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; RUN: < %s | FileCheck %s
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@ -29,7 +30,8 @@ define signext i32 @test_pre_inc_disable_1(i8* nocapture readonly %pix1, i32 sig
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; CHECK-NEXT: xvnegsp v0, v1
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; CHECK-NEXT: .p2align 4
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; CHECK-NEXT: .LBB0_1: # %for.cond1.preheader
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; CHECK: lfd f0, 0(r3)
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; CHECK-NEXT: #
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; CHECK-NEXT: lfd f0, 0(r3)
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; CHECK-NEXT: xxpermdi v1, f0, f0, 2
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; CHECK-NEXT: vperm v6, v1, v3, v4
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; CHECK-NEXT: vperm v1, v3, v1, v2
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@ -87,7 +89,8 @@ define signext i32 @test_pre_inc_disable_1(i8* nocapture readonly %pix1, i32 sig
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; P9BE-NEXT: xvnegsp v0, v1
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; P9BE-NEXT: .p2align 4
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; P9BE-NEXT: .LBB0_1: # %for.cond1.preheader
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; P9BE: lfd f0, 0(r3)
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; P9BE-NEXT: #
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; P9BE-NEXT: lfd f0, 0(r3)
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; P9BE-NEXT: xxlor v1, vs0, vs0
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; P9BE-NEXT: vperm v6, v3, v1, v4
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; P9BE-NEXT: vperm v1, v3, v1, v2
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@ -280,6 +283,51 @@ entry:
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;}
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define void @test32(i8* nocapture readonly %pix2, i32 signext %i_pix2) {
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; CHECK-LABEL: test32:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: add r5, r3, r4
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; CHECK-NEXT: lfiwzx f0, r3, r4
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; CHECK-NEXT: addis r3, r2, .LCPI2_0@toc@ha
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; CHECK-NEXT: addi r3, r3, .LCPI2_0@toc@l
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; CHECK-NEXT: lxvx v4, 0, r3
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; CHECK-NEXT: li r3, 4
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; CHECK-NEXT: xxpermdi v2, f0, f0, 2
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; CHECK-NEXT: lfiwzx f0, r5, r3
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; CHECK-NEXT: xxlxor v3, v3, v3
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; CHECK-NEXT: vperm v2, v2, v3, v4
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; CHECK-NEXT: xxpermdi v5, f0, f0, 2
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; CHECK-NEXT: vperm v3, v5, v3, v4
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; CHECK-NEXT: vspltisw v4, 8
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; CHECK-NEXT: vnegw v3, v3
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; CHECK-NEXT: vadduwm v4, v4, v4
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; CHECK-NEXT: vslw v3, v3, v4
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; CHECK-NEXT: vsubuwm v2, v3, v2
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; CHECK-NEXT: xxswapd vs0, v2
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; CHECK-NEXT: stxvx vs0, 0, r3
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; CHECK-NEXT: blr
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;
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; P9BE-LABEL: test32:
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; P9BE: # %bb.0: # %entry
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; P9BE-NEXT: add r5, r3, r4
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; P9BE-NEXT: lfiwzx f0, r3, r4
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; P9BE-NEXT: addis r3, r2, .LCPI2_0@toc@ha
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; P9BE-NEXT: addi r3, r3, .LCPI2_0@toc@l
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; P9BE-NEXT: lxvx v4, 0, r3
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; P9BE-NEXT: li r3, 4
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; P9BE-NEXT: xxsldwi v2, f0, f0, 1
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; P9BE-NEXT: lfiwzx f0, r5, r3
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; P9BE-NEXT: xxlxor v3, v3, v3
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; P9BE-NEXT: vperm v2, v3, v2, v4
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; P9BE-NEXT: xxsldwi v5, f0, f0, 1
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; P9BE-NEXT: vperm v3, v3, v5, v4
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; P9BE-NEXT: vspltisw v4, 8
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; P9BE-NEXT: vnegw v3, v3
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; P9BE-NEXT: vadduwm v4, v4, v4
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; P9BE-NEXT: vslw v3, v3, v4
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; P9BE-NEXT: vsubuwm v2, v3, v2
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; P9BE-NEXT: xxswapd vs0, v2
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; P9BE-NEXT: stxvx vs0, 0, r3
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; P9BE-NEXT: blr
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entry:
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%idx.ext63 = sext i32 %i_pix2 to i64
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%add.ptr64 = getelementptr inbounds i8, i8* %pix2, i64 %idx.ext63
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@ -302,19 +350,62 @@ entry:
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%13 = shufflevector <4 x i32> %12, <4 x i32> undef, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
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store <4 x i32> %13, <4 x i32>* undef, align 16
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ret void
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; CHECK-LABEL: test32:
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; CHECK-NOT: lwzux
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; CHECK-NOT: mtvsrws
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; CHECK: lfiwzx
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; CHECK: lfiwzx
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; P9BE-CHECK-LABEL: test32:
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; P9BE-CHECK-NOT: lwzux
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; P9BE-CHECK-NOT: mtvsrws
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; P9BE-CHECK: lfiwzx
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; P9BE-CHECK: lfiwzx
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}
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define void @test16(i16* nocapture readonly %sums, i32 signext %delta, i32 signext %thresh) {
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; CHECK-LABEL: test16:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: sldi r4, r4, 1
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; CHECK-NEXT: lxsihzx v2, r3, r4
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; CHECK-NEXT: vsplth v2, v2, 3
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; CHECK-NEXT: xxlxor v3, v3, v3
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; CHECK-NEXT: vmrglh v2, v3, v2
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; CHECK-NEXT: vsplth v4, v3, 7
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; CHECK-NEXT: add r6, r3, r4
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; CHECK-NEXT: li r3, 16
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; CHECK-NEXT: vmrglw v2, v2, v4
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; CHECK-NEXT: lxsihzx v4, r6, r3
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; CHECK-NEXT: addis r3, r2, .LCPI3_0@toc@ha
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; CHECK-NEXT: addi r3, r3, .LCPI3_0@toc@l
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; CHECK-NEXT: vsplth v4, v4, 3
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; CHECK-NEXT: vmrglh v3, v3, v4
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; CHECK-NEXT: lxvx v4, 0, r3
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; CHECK-NEXT: li r3, 0
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; CHECK-NEXT: vperm v2, v3, v2, v4
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; CHECK-NEXT: xxspltw v3, v2, 2
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; CHECK-NEXT: vadduwm v2, v2, v3
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; CHECK-NEXT: vextuwrx r3, r3, v2
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; CHECK-NEXT: cmpw cr0, r3, r5
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; CHECK-NEXT: bgelr+ cr0
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; CHECK-NEXT: # %bb.1: # %if.then
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;
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; P9BE-LABEL: test16:
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; P9BE: # %bb.0: # %entry
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; P9BE-NEXT: sldi r4, r4, 1
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; P9BE-NEXT: add r6, r3, r4
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; P9BE-NEXT: li r7, 16
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; P9BE-NEXT: lxsihzx v2, r6, r7
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; P9BE-NEXT: vsplth v2, v2, 3
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; P9BE-NEXT: lxsihzx v4, r3, r4
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; P9BE-NEXT: li r6, 0
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; P9BE-NEXT: sldi r6, r6, 48
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; P9BE-NEXT: mtvsrd v3, r6
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; P9BE-NEXT: addis r3, r2, .LCPI3_0@toc@ha
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; P9BE-NEXT: addi r3, r3, .LCPI3_0@toc@l
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; P9BE-NEXT: vmrghh v2, v3, v2
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; P9BE-NEXT: vsplth v4, v4, 3
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; P9BE-NEXT: vmrghh v4, v3, v4
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; P9BE-NEXT: vsplth v3, v3, 0
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; P9BE-NEXT: vmrghw v3, v3, v4
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; P9BE-NEXT: lxvx v4, 0, r3
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; P9BE-NEXT: li r3, 0
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; P9BE-NEXT: vperm v2, v3, v2, v4
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; P9BE-NEXT: xxspltw v3, v2, 1
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; P9BE-NEXT: vadduwm v2, v2, v3
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; P9BE-NEXT: vextuwlx r3, r3, v2
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; P9BE-NEXT: cmpw cr0, r3, r5
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; P9BE-NEXT: bgelr+ cr0
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; P9BE-NEXT: # %bb.1: # %if.then
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entry:
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%idxprom = sext i32 %delta to i64
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%add14 = add nsw i32 %delta, 8
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@ -345,17 +436,67 @@ if.then: ; preds = %for.body
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if.end: ; preds = %for.body
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ret void
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; CHECK-LABEL: test16:
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; CHECK-NOT: lhzux
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; CHECK: lxsihzx
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; CHECK: lxsihzx
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; P9BE-CHECK-LABEL: test16:
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; P9BE-CHECK-NOT: lhzux
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; P9BE-CHECK: lxsihzx
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; P9BE-CHECK: lxsihzx
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}
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define void @test8(i8* nocapture readonly %sums, i32 signext %delta, i32 signext %thresh) {
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; CHECK-LABEL: test8:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: lxsibzx v2, r3, r4
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; CHECK-NEXT: add r6, r3, r4
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; CHECK-NEXT: li r3, 0
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; CHECK-NEXT: mtvsrd f0, r3
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; CHECK-NEXT: li r3, 8
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; CHECK-NEXT: xxswapd v3, vs0
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; CHECK-NEXT: vspltb v2, v2, 7
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; CHECK-NEXT: lxsibzx v5, r6, r3
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; CHECK-NEXT: vspltb v5, v5, 7
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; CHECK-NEXT: vmrglb v2, v3, v2
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; CHECK-NEXT: vspltb v4, v3, 15
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; CHECK-NEXT: vmrglb v3, v3, v5
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; CHECK-NEXT: addis r3, r2, .LCPI4_0@toc@ha
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; CHECK-NEXT: vmrglh v2, v2, v4
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; CHECK-NEXT: addi r3, r3, .LCPI4_0@toc@l
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; CHECK-NEXT: vmrglw v2, v2, v4
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; CHECK-NEXT: vmrglh v3, v3, v4
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; CHECK-NEXT: vmrglw v3, v4, v3
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; CHECK-NEXT: lxvx v4, 0, r3
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; CHECK-NEXT: li r3, 0
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; CHECK-NEXT: vperm v2, v3, v2, v4
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; CHECK-NEXT: xxspltw v3, v2, 2
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; CHECK-NEXT: vadduwm v2, v2, v3
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; CHECK-NEXT: vextuwrx r3, r3, v2
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; CHECK-NEXT: cmpw cr0, r3, r5
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; CHECK-NEXT: bgelr+ cr0
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; CHECK-NEXT: # %bb.1: # %if.then
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;
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; P9BE-LABEL: test8:
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; P9BE: # %bb.0: # %entry
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; P9BE-NEXT: add r6, r3, r4
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; P9BE-NEXT: li r7, 8
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; P9BE-NEXT: lxsibzx v2, r6, r7
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; P9BE-NEXT: vspltb v2, v2, 7
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; P9BE-NEXT: lxsibzx v4, r3, r4
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; P9BE-NEXT: li r6, 0
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; P9BE-NEXT: sldi r6, r6, 56
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; P9BE-NEXT: mtvsrd v3, r6
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; P9BE-NEXT: vmrghb v2, v3, v2
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; P9BE-NEXT: addis r3, r2, .LCPI4_0@toc@ha
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; P9BE-NEXT: addi r3, r3, .LCPI4_0@toc@l
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; P9BE-NEXT: vspltb v4, v4, 7
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; P9BE-NEXT: vmrghb v4, v3, v4
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; P9BE-NEXT: vspltb v3, v3, 0
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; P9BE-NEXT: vmrghh v4, v4, v3
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; P9BE-NEXT: xxspltw v3, v3, 0
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; P9BE-NEXT: vmrghw v2, v4, v2
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; P9BE-NEXT: lxvx v4, 0, r3
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; P9BE-NEXT: li r3, 0
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; P9BE-NEXT: vperm v2, v3, v2, v4
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; P9BE-NEXT: xxspltw v3, v2, 1
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; P9BE-NEXT: vadduwm v2, v2, v3
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; P9BE-NEXT: vextuwlx r3, r3, v2
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; P9BE-NEXT: cmpw cr0, r3, r5
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; P9BE-NEXT: bgelr+ cr0
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; P9BE-NEXT: # %bb.1: # %if.then
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entry:
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%idxprom = sext i32 %delta to i64
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%add14 = add nsw i32 %delta, 8
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@ -386,12 +527,4 @@ if.then: ; preds = %for.body
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if.end: ; preds = %for.body
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ret void
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; CHECK-LABEL: test8:
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; CHECK-NOT: lbzux
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; CHECK: lxsibzx
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; CHECK: lxsibzx
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; P9BE-CHECK-LABEL: test8:
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; P9BE-CHECK-NOT: lbzux
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; P9BE-CHECK: lxsibzx
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; P9BE-CHECK: lxsibzx
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}
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