forked from OSchip/llvm-project
Remove comments that do not correspond to anything after recent refactoring.
llvm-svn: 45792
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1c8152ba03
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73d1017871
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@ -1209,6 +1209,34 @@ X86TargetLowering::LowerFORMAL_ARGUMENTS(SDOperand Op, SelectionDAG &DAG) {
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&ArgValues[0], ArgValues.size()).getValue(Op.ResNo);
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}
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SDOperand
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X86TargetLowering::LowerMemOpCallTo(SDOperand Op, SelectionDAG &DAG,
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const SDOperand &StackPtr,
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const CCValAssign &VA,
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SDOperand Chain,
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SDOperand Arg) {
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SDOperand PtrOff = DAG.getConstant(VA.getLocMemOffset(), getPointerTy());
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PtrOff = DAG.getNode(ISD::ADD, getPointerTy(), StackPtr, PtrOff);
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SDOperand FlagsOp = Op.getOperand(6+2*VA.getValNo());
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unsigned Flags = cast<ConstantSDNode>(FlagsOp)->getValue();
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if (Flags & ISD::ParamFlags::ByVal) {
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unsigned Align = 1 << ((Flags & ISD::ParamFlags::ByValAlign) >>
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ISD::ParamFlags::ByValAlignOffs);
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unsigned Size = (Flags & ISD::ParamFlags::ByValSize) >>
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ISD::ParamFlags::ByValSizeOffs;
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SDOperand AlignNode = DAG.getConstant(Align, MVT::i32);
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SDOperand SizeNode = DAG.getConstant(Size, MVT::i32);
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SDOperand AlwaysInline = DAG.getConstant(1, MVT::i32);
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return DAG.getMemcpy(Chain, PtrOff, Arg, SizeNode, AlignNode,
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AlwaysInline);
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} else {
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return DAG.getStore(Chain, Arg, PtrOff, NULL, 0);
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}
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}
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SDOperand X86TargetLowering::LowerCALL(SDOperand Op, SelectionDAG &DAG) {
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MachineFunction &MF = DAG.getMachineFunction();
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SDOperand Chain = Op.getOperand(0);
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@ -1523,47 +1551,6 @@ SDOperand X86TargetLowering::LowerCALL(SDOperand Op, SelectionDAG &DAG) {
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}
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//===----------------------------------------------------------------------===//
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// FastCall Calling Convention implementation
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//===----------------------------------------------------------------------===//
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//
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// The X86 'fastcall' calling convention passes up to two integer arguments in
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// registers (an appropriate portion of ECX/EDX), passes arguments in C order,
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// and requires that the callee pop its arguments off the stack (allowing proper
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// tail calls), and has the same return value conventions as C calling convs.
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//
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// This calling convention always arranges for the callee pop value to be 8n+4
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// bytes, which is needed for tail recursion elimination and stack alignment
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// reasons.
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SDOperand
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X86TargetLowering::LowerMemOpCallTo(SDOperand Op, SelectionDAG &DAG,
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const SDOperand &StackPtr,
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const CCValAssign &VA,
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SDOperand Chain,
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SDOperand Arg) {
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SDOperand PtrOff = DAG.getConstant(VA.getLocMemOffset(), getPointerTy());
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PtrOff = DAG.getNode(ISD::ADD, getPointerTy(), StackPtr, PtrOff);
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SDOperand FlagsOp = Op.getOperand(6+2*VA.getValNo());
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unsigned Flags = cast<ConstantSDNode>(FlagsOp)->getValue();
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if (Flags & ISD::ParamFlags::ByVal) {
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unsigned Align = 1 << ((Flags & ISD::ParamFlags::ByValAlign) >>
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ISD::ParamFlags::ByValAlignOffs);
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unsigned Size = (Flags & ISD::ParamFlags::ByValSize) >>
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ISD::ParamFlags::ByValSizeOffs;
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SDOperand AlignNode = DAG.getConstant(Align, MVT::i32);
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SDOperand SizeNode = DAG.getConstant(Size, MVT::i32);
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SDOperand AlwaysInline = DAG.getConstant(1, MVT::i32);
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return DAG.getMemcpy(Chain, PtrOff, Arg, SizeNode, AlignNode,
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AlwaysInline);
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} else {
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return DAG.getStore(Chain, Arg, PtrOff, NULL, 0);
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}
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}
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//===----------------------------------------------------------------------===//
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// Fast Calling Convention (tail call) implementation
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//===----------------------------------------------------------------------===//
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