forked from OSchip/llvm-project
[PowerPC, test] Fix use of undef FileCheck var
LLVM test CodeGen/PowerPC/ppc-disable-non-volatile-cr.ll tries to check for the absence of a sequence of instructions with several CHECK-NOT with one of those directives using a variable defined in another. However CHECK-NOT are checked independently so that is using a variable defined in a pattern that should not occur in the input. This commit changes occurence of the variable for the regex used in its definition, thereby making each CHECK-NOT independent. Reviewed By: NeHuang, nemanjai Differential Revision: https://reviews.llvm.org/D99880
This commit is contained in:
parent
e018698bec
commit
73a7d451a2
|
@ -8,8 +8,8 @@
|
|||
define dso_local signext i32 @DisableNonVolatileCR(i32 signext %a, i32 signext %b) {
|
||||
; CHECK-DISABLE-LABEL: DisableNonVolatileCR:
|
||||
; CHECK-DISABLE: # %bb.0: # %entry
|
||||
; CHECK-DISABLE-NOT: mfocrf [[REG1:r[0-9]+]]
|
||||
; CHECK-DISABLE-NOT: stw [[REG1]]
|
||||
; CHECK-DISABLE-NOT: mfocrf {{r[0-9]+}}
|
||||
; CHECK-DISABLE-NOT: stw {{r[0-9]+}}
|
||||
; CHECK-DISABLE: stdu r1
|
||||
; CHECK-DISABLE-DAG: mfocrf [[REG2:r[0-9]+]]
|
||||
; CHECK-DISABLE-DAG: stw [[REG2]]
|
||||
|
@ -20,8 +20,8 @@ define dso_local signext i32 @DisableNonVolatileCR(i32 signext %a, i32 signext %
|
|||
; CHECK-ENABLE-DAG: mfocrf [[REG1:r[0-9]+]]
|
||||
; CHECK-ENABLE-DAG: stw [[REG1]]
|
||||
; CHECK-ENABLE: stdu r1
|
||||
; CHECK-ENABLE-NOT: mfocrf [[REG2:r[0-9]+]]
|
||||
; CHECK-ENABLE-NOT: stw [[REG2]]
|
||||
; CHECK-ENABLE-NOT: mfocrf {{r[0-9]+}}
|
||||
; CHECK-ENABLE-NOT: stw {{r[0-9]+}}
|
||||
; CHECK-ENABLE: # %bb.1: # %if.then
|
||||
|
||||
entry:
|
||||
|
|
Loading…
Reference in New Issue