forked from OSchip/llvm-project
Update documentation to reflect:
* Changes in PHI node structure * Intentions for load instruction to work with structures llvm-svn: 22
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@ -1,7 +1,7 @@
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* Must update PHI node to have a pair between predecessor and value.
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* pred/succ iterators on basic blocks don't handle switch statements correctly
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* Enhance BB to make predecessor handling easier (to update PHI nodes)
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* Provide a pass that eliminates critical edges from the CFG
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* Provide a print hook to print out xvcg format files for vis
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* Provide a print pass to print out xvcg format files for vis
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* I need to provide an option to the bytecode loader to ignore memory
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dependance edges. Instead, the VM would just treat memory operations
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(load, store, getfield, putfield, call) as pinned instructions.
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@ -13,8 +13,8 @@
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structure size to 256 members. This can be fixed later by either:
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1. adding varient that takes ushort
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2. Splitting structures into nested structures each of half size
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<float> %f = loadfield *{int, {float}} Str, ubyte 1, ubyte 0
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storefield float %f, *{int, {float}} Str, ubyte 1, ubyte 0
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<float> %f = load *{int, {float}} Str, 1, 0
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store float %f, *{int, {float}} Str, 1, 0
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* I'm noticing me writing a lot of code that looks like this (dtor material here):
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ConstPool.dropAllReferences();
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ConstPool.delete_all();
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@ -42,8 +42,6 @@
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* pointer int *
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* "packed format", like this: [4 x sbyte]: Packed SIMD datatype
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* Maybe 'tailcall' also?
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* It might be nice to support enumerations of some sort... especially for use
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as a compiler IR
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* Include a method level bytecode block that defines a mapping between values
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and registers that defines a minimally register allocated code. This can
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make me finally address how to encode extensions in assembly.
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@ -1045,6 +1045,7 @@ Memory is allocated, a pointer is returned. '<tt>alloca</tt>'d memory is automa
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<pre>
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<result> = load <ty>* <pointer> <i>; yields {ty}:result</i>
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<result> = load <ty>* <arrayptr>, uint <idx> <i>; yields {ty}:result</i>
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<result> = load <ty>* <structptr>{, <idx>}* <i>; yields field type</i>
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</pre>
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<h5>Overview:</h5>
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@ -1052,9 +1053,9 @@ The '<tt>load</tt>' instruction is used to read from memory.<p>
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<h5>Arguments:</h5>
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There are two forms of the '<tt>load</tt>' instruction: one for reading from a general pointer, and one for reading from a pointer to an array.<p>
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There are three forms of the '<tt>load</tt>' instruction: one for reading from a general pointer, one for reading from a pointer to an array, and one for reading from a pointer to a structure.<p>
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In the first form, '<tt><ty></tt>' may be any pointer type. If it is a pointer to an array, the first (zeroth) element is read from). In the second form, '<tt><ty></tt>' must be a pointer to an array. No bounds checking is performed on array reads.<p>
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In the first form, '<tt><ty></tt>' may be any pointer type. If it is a pointer to an array, the first (zeroth) element is read from). In the second form, '<tt><ty></tt>' must be a pointer to an array. No bounds checking is performed on array reads. In the third form, the pointer must point to a (possibly nested) structure. There shall be one ubyte argument for each level of dereferencing involved.<p>
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<h5>Semantics:</h5>
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@ -1070,7 +1071,7 @@ In the first form, '<tt><ty></tt>' may be any pointer type. If it is a po
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<a href="#i_store">store</a> [4 x ubyte]* %array,
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uint 4, ubyte 124
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%val = load [4 x ubyte]* %array, uint 4 <i>; yields {ubyte}:val = ubyte 124</i>
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%val = load {{int, float}}* %stptr, 0, 1 <i>; yields {float}:val</i>
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</pre>
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@ -1370,7 +1371,7 @@ more...
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<address><a href="mailto:sabre@nondot.org">Chris Lattner</a></address>
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<!-- Created: Tue Jan 23 15:19:28 CST 2001 -->
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<!-- hhmts start -->
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Last modified: Thu May 31 17:36:39 CDT 2001
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Last modified: Mon Jun 11 09:30:45 CDT 2001
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<!-- hhmts end -->
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</font>
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</body></html>
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