forked from OSchip/llvm-project
[SCEV] Recognize binary `xor` as bit-wise `add`
https://alive2.llvm.org/ce/z/ULuZxB We could transparently handle wider bitwidths, by effectively casting iN to <N x i1> and performing the `add` bit/element -wise, the expression will be rather large, so let's not do that for now.
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@ -5067,6 +5067,9 @@ static Optional<BinaryOp> MatchBinaryOp(Value *V, DominatorTree &DT) {
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// Instcombine turns add of signmask into xor as a strength reduction step.
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if (RHSC->getValue().isSignMask())
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return BinaryOp(Instruction::Add, Op->getOperand(0), Op->getOperand(1));
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// Binary `xor` is a bit-wise `add`.
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if (V->getType()->isIntegerTy(1))
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return BinaryOp(Instruction::Add, Op->getOperand(0), Op->getOperand(1));
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return BinaryOp(Op);
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case Instruction::LShr:
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@ -86,7 +86,7 @@ define i1 @binary_xor.i1(i1 %x, i1 %y) {
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; CHECK-LABEL: 'binary_xor.i1'
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; CHECK-NEXT: Classifying expressions for: @binary_xor.i1
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; CHECK-NEXT: %r = xor i1 %x, %y
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; CHECK-NEXT: --> %r U: full-set S: full-set
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; CHECK-NEXT: --> (%x + %y) U: full-set S: full-set
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; CHECK-NEXT: Determining loop execution counts for: @binary_xor.i1
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;
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%r = xor i1 %x, %y
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@ -108,11 +108,11 @@ define i1 @binary_xor.4ops.i1(i1 %x, i1 %y, i1 %z, i1 %a) {
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; CHECK-LABEL: 'binary_xor.4ops.i1'
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; CHECK-NEXT: Classifying expressions for: @binary_xor.4ops.i1
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; CHECK-NEXT: %t0 = xor i1 %x, %y
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; CHECK-NEXT: --> %t0 U: full-set S: full-set
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; CHECK-NEXT: --> (%x + %y) U: full-set S: full-set
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; CHECK-NEXT: %t1 = xor i1 %z, %a
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; CHECK-NEXT: --> %t1 U: full-set S: full-set
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; CHECK-NEXT: --> (%z + %a) U: full-set S: full-set
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; CHECK-NEXT: %r = xor i1 %t0, %t1
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; CHECK-NEXT: --> %r U: full-set S: full-set
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; CHECK-NEXT: --> (%x + %y + %z + %a) U: full-set S: full-set
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; CHECK-NEXT: Determining loop execution counts for: @binary_xor.4ops.i1
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;
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%t0 = xor i1 %x, %y
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