forked from OSchip/llvm-project
[InstSimplify] Extract abs intrinsic tests into separate file (NFC)
Also move some tests from InstCombine to InstSimplify, as they are already handled by InstSimplify.
This commit is contained in:
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7397a019b8
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@ -4,47 +4,6 @@
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declare i32 @llvm.abs.i32(i32, i1)
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declare <4 x i32> @llvm.abs.v4i32(<4 x i32>, i1)
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define i1 @abs_nsw_must_be_positive(i32 %x) {
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; CHECK-LABEL: @abs_nsw_must_be_positive(
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; CHECK-NEXT: ret i1 true
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;
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%abs = call i32 @llvm.abs.i32(i32 %x, i1 true)
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%c2 = icmp sge i32 %abs, 0
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ret i1 %c2
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}
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define <4 x i1> @abs_nsw_must_be_positive_vec(<4 x i32> %x) {
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; CHECK-LABEL: @abs_nsw_must_be_positive_vec(
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; CHECK-NEXT: ret <4 x i1> <i1 true, i1 true, i1 true, i1 true>
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;
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%abs = call <4 x i32> @llvm.abs.v4i32(<4 x i32> %x, i1 true)
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%c2 = icmp sge <4 x i32> %abs, zeroinitializer
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ret <4 x i1> %c2
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}
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; Negative test, no nsw provides no information about the sign bit of the result.
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define i1 @abs_nonsw(i32 %x) {
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; CHECK-LABEL: @abs_nonsw(
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; CHECK-NEXT: [[ABS:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
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; CHECK-NEXT: [[C2:%.*]] = icmp sgt i32 [[ABS]], -1
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; CHECK-NEXT: ret i1 [[C2]]
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;
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%abs = call i32 @llvm.abs.i32(i32 %x, i1 false)
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%c2 = icmp sge i32 %abs, 0
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ret i1 %c2
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}
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define <4 x i1> @abs_nonsw_vec(<4 x i32> %x) {
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; CHECK-LABEL: @abs_nonsw_vec(
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; CHECK-NEXT: [[ABS:%.*]] = call <4 x i32> @llvm.abs.v4i32(<4 x i32> [[X:%.*]], i1 false)
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; CHECK-NEXT: [[C2:%.*]] = icmp sgt <4 x i32> [[ABS]], <i32 -1, i32 -1, i32 -1, i32 -1>
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; CHECK-NEXT: ret <4 x i1> [[C2]]
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;
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%abs = call <4 x i32> @llvm.abs.v4i32(<4 x i32> %x, i1 false)
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%c2 = icmp sge <4 x i32> %abs, zeroinitializer
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ret <4 x i1> %c2
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}
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; abs preserves trailing zeros so the second and is unneeded
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define i32 @abs_trailing_zeros(i32 %x) {
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; CHECK-LABEL: @abs_trailing_zeros(
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@ -126,46 +85,6 @@ define <4 x i32> @abs_signbits_vec(<4 x i30> %x) {
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ret <4 x i32> %add
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}
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define i1 @abs_known_positive_input_compare(i31 %x) {
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; CHECK-LABEL: @abs_known_positive_input_compare(
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; CHECK-NEXT: ret i1 true
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;
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%zext = zext i31 %x to i32
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%abs = call i32 @llvm.abs.i32(i32 %zext, i1 false)
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%c2 = icmp sge i32 %abs, 0
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ret i1 %c2
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}
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define <4 x i1> @abs_known_positive_input_compare_vec(<4 x i31> %x) {
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; CHECK-LABEL: @abs_known_positive_input_compare_vec(
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; CHECK-NEXT: ret <4 x i1> <i1 true, i1 true, i1 true, i1 true>
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;
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%zext = zext <4 x i31> %x to <4 x i32>
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%abs = call <4 x i32> @llvm.abs.v4i32(<4 x i32> %zext, i1 false)
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%c2 = icmp sge <4 x i32> %abs, zeroinitializer
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ret <4 x i1> %c2
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}
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define i1 @abs_known_not_int_min(i32 %x) {
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; CHECK-LABEL: @abs_known_not_int_min(
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; CHECK-NEXT: ret i1 true
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;
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%or = or i32 %x, 1
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%abs = call i32 @llvm.abs.i32(i32 %or, i1 false)
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%c2 = icmp sge i32 %abs, 0
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ret i1 %c2
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}
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define <4 x i1> @abs_known_not_int_min_vec(<4 x i32> %x) {
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; CHECK-LABEL: @abs_known_not_int_min_vec(
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; CHECK-NEXT: ret <4 x i1> <i1 true, i1 true, i1 true, i1 true>
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;
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%or = or <4 x i32> %x, <i32 1, i32 1, i32 1, i32 1>
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%abs = call <4 x i32> @llvm.abs.v4i32(<4 x i32> %or, i1 false)
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%c2 = icmp sge <4 x i32> %abs, zeroinitializer
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ret <4 x i1> %c2
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}
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define i32 @abs_of_neg(i32 %x) {
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; CHECK-LABEL: @abs_of_neg(
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; CHECK-NEXT: [[B:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
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@ -0,0 +1,184 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instsimplify -S | FileCheck %s
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declare i32 @llvm.abs.i32(i32, i1)
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declare <3 x i82> @llvm.abs.v3i82(<3 x i82>, i1)
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declare <4 x i32> @llvm.abs.v4i32(<4 x i32>, i1)
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define i32 @test_abs_abs_0(i32 %x) {
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; CHECK-LABEL: @test_abs_abs_0(
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; CHECK-NEXT: [[A:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
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; CHECK-NEXT: ret i32 [[A]]
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;
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%a = call i32 @llvm.abs.i32(i32 %x, i1 false)
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%b = call i32 @llvm.abs.i32(i32 %a, i1 false)
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ret i32 %b
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}
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define i32 @test_abs_abs_1(i32 %x) {
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; CHECK-LABEL: @test_abs_abs_1(
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; CHECK-NEXT: [[A:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
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; CHECK-NEXT: ret i32 [[A]]
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;
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%a = call i32 @llvm.abs.i32(i32 %x, i1 true)
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%b = call i32 @llvm.abs.i32(i32 %a, i1 false)
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ret i32 %b
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}
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define i32 @test_abs_abs_2(i32 %x) {
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; CHECK-LABEL: @test_abs_abs_2(
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; CHECK-NEXT: [[A:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
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; CHECK-NEXT: ret i32 [[A]]
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;
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%a = call i32 @llvm.abs.i32(i32 %x, i1 false)
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%b = call i32 @llvm.abs.i32(i32 %a, i1 true)
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ret i32 %b
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}
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define i32 @test_abs_abs_3(i32 %x) {
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; CHECK-LABEL: @test_abs_abs_3(
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; CHECK-NEXT: [[A:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
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; CHECK-NEXT: ret i32 [[A]]
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;
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%a = call i32 @llvm.abs.i32(i32 %x, i1 true)
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%b = call i32 @llvm.abs.i32(i32 %a, i1 true)
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ret i32 %b
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}
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; If the sign bit is known zero, the abs is not needed.
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define i32 @zext_abs(i31 %x) {
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; CHECK-LABEL: @zext_abs(
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; CHECK-NEXT: [[ZEXT:%.*]] = zext i31 [[X:%.*]] to i32
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; CHECK-NEXT: ret i32 [[ZEXT]]
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;
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%zext = zext i31 %x to i32
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%abs = call i32 @llvm.abs.i32(i32 %zext, i1 false)
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ret i32 %abs
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}
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define <3 x i82> @lshr_abs(<3 x i82> %x) {
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; CHECK-LABEL: @lshr_abs(
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; CHECK-NEXT: [[LSHR:%.*]] = lshr <3 x i82> [[X:%.*]], <i82 1, i82 1, i82 1>
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; CHECK-NEXT: ret <3 x i82> [[LSHR]]
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;
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%lshr = lshr <3 x i82> %x, <i82 1, i82 1, i82 1>
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%abs = call <3 x i82> @llvm.abs.v3i82(<3 x i82> %lshr, i1 true)
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ret <3 x i82> %abs
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}
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define i32 @and_abs(i32 %x) {
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; CHECK-LABEL: @and_abs(
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; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 2147483644
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; CHECK-NEXT: ret i32 [[AND]]
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;
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%and = and i32 %x, 2147483644
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%abs = call i32 @llvm.abs.i32(i32 %and, i1 true)
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ret i32 %abs
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}
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define <3 x i82> @select_abs(<3 x i1> %cond) {
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; CHECK-LABEL: @select_abs(
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; CHECK-NEXT: [[SEL:%.*]] = select <3 x i1> [[COND:%.*]], <3 x i82> zeroinitializer, <3 x i82> <i82 2147483647, i82 42, i82 1>
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; CHECK-NEXT: ret <3 x i82> [[SEL]]
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;
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%sel = select <3 x i1> %cond, <3 x i82> zeroinitializer, <3 x i82> <i82 2147483647, i82 42, i82 1>
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%abs = call <3 x i82> @llvm.abs.v3i82(<3 x i82> %sel, i1 false)
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ret <3 x i82> %abs
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}
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declare void @llvm.assume(i1)
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define i32 @assume_abs(i32 %x) {
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; CHECK-LABEL: @assume_abs(
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; CHECK-NEXT: [[ASSUME:%.*]] = icmp sge i32 [[X:%.*]], 0
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; CHECK-NEXT: call void @llvm.assume(i1 [[ASSUME]])
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; CHECK-NEXT: ret i32 [[X]]
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;
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%assume = icmp sge i32 %x, 0
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call void @llvm.assume(i1 %assume)
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%abs = call i32 @llvm.abs.i32(i32 %x, i1 true)
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ret i32 %abs
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}
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define i1 @abs_nsw_must_be_positive(i32 %x) {
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; CHECK-LABEL: @abs_nsw_must_be_positive(
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; CHECK-NEXT: ret i1 true
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;
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%abs = call i32 @llvm.abs.i32(i32 %x, i1 true)
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%c2 = icmp sge i32 %abs, 0
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ret i1 %c2
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}
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define <4 x i1> @abs_nsw_must_be_positive_vec(<4 x i32> %x) {
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; CHECK-LABEL: @abs_nsw_must_be_positive_vec(
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; CHECK-NEXT: ret <4 x i1> <i1 true, i1 true, i1 true, i1 true>
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;
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%abs = call <4 x i32> @llvm.abs.v4i32(<4 x i32> %x, i1 true)
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%c2 = icmp sge <4 x i32> %abs, zeroinitializer
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ret <4 x i1> %c2
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}
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; Negative test, no nsw provides no information about the sign bit of the result.
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define i1 @abs_nonsw(i32 %x) {
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; CHECK-LABEL: @abs_nonsw(
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; CHECK-NEXT: [[ABS:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
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; CHECK-NEXT: [[C2:%.*]] = icmp sge i32 [[ABS]], 0
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; CHECK-NEXT: ret i1 [[C2]]
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;
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%abs = call i32 @llvm.abs.i32(i32 %x, i1 false)
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%c2 = icmp sge i32 %abs, 0
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ret i1 %c2
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}
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define <4 x i1> @abs_nonsw_vec(<4 x i32> %x) {
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; CHECK-LABEL: @abs_nonsw_vec(
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; CHECK-NEXT: [[ABS:%.*]] = call <4 x i32> @llvm.abs.v4i32(<4 x i32> [[X:%.*]], i1 false)
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; CHECK-NEXT: [[C2:%.*]] = icmp sge <4 x i32> [[ABS]], zeroinitializer
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; CHECK-NEXT: ret <4 x i1> [[C2]]
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;
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%abs = call <4 x i32> @llvm.abs.v4i32(<4 x i32> %x, i1 false)
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%c2 = icmp sge <4 x i32> %abs, zeroinitializer
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ret <4 x i1> %c2
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}
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define i1 @abs_known_positive_input_compare(i31 %x) {
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; CHECK-LABEL: @abs_known_positive_input_compare(
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; CHECK-NEXT: ret i1 true
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;
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%zext = zext i31 %x to i32
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%abs = call i32 @llvm.abs.i32(i32 %zext, i1 false)
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%c2 = icmp sge i32 %abs, 0
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ret i1 %c2
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}
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define <4 x i1> @abs_known_positive_input_compare_vec(<4 x i31> %x) {
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; CHECK-LABEL: @abs_known_positive_input_compare_vec(
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; CHECK-NEXT: ret <4 x i1> <i1 true, i1 true, i1 true, i1 true>
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;
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%zext = zext <4 x i31> %x to <4 x i32>
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%abs = call <4 x i32> @llvm.abs.v4i32(<4 x i32> %zext, i1 false)
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%c2 = icmp sge <4 x i32> %abs, zeroinitializer
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ret <4 x i1> %c2
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}
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define i1 @abs_known_not_int_min(i32 %x) {
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; CHECK-LABEL: @abs_known_not_int_min(
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; CHECK-NEXT: ret i1 true
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;
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%or = or i32 %x, 1
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%abs = call i32 @llvm.abs.i32(i32 %or, i1 false)
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%c2 = icmp sge i32 %abs, 0
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ret i1 %c2
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}
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define <4 x i1> @abs_known_not_int_min_vec(<4 x i32> %x) {
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; CHECK-LABEL: @abs_known_not_int_min_vec(
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; CHECK-NEXT: ret <4 x i1> <i1 true, i1 true, i1 true, i1 true>
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;
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%or = or <4 x i32> %x, <i32 1, i32 1, i32 1, i32 1>
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%abs = call <4 x i32> @llvm.abs.v4i32(<4 x i32> %or, i1 false)
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%c2 = icmp sge <4 x i32> %abs, zeroinitializer
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ret <4 x i1> %c2
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}
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@ -2,105 +2,6 @@
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; RUN: opt < %s -instsimplify -S | FileCheck %s
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; RUN: opt < %s -passes=instsimplify -S | FileCheck %s
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declare i32 @llvm.abs.i32(i32, i1)
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declare <3 x i82> @llvm.abs.v3i82(<3 x i82>, i1)
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define i32 @test_abs_abs_0(i32 %x) {
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; CHECK-LABEL: @test_abs_abs_0(
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; CHECK-NEXT: [[A:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
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; CHECK-NEXT: ret i32 [[A]]
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;
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%a = call i32 @llvm.abs.i32(i32 %x, i1 false)
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%b = call i32 @llvm.abs.i32(i32 %a, i1 false)
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ret i32 %b
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}
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define i32 @test_abs_abs_1(i32 %x) {
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; CHECK-LABEL: @test_abs_abs_1(
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; CHECK-NEXT: [[A:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
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; CHECK-NEXT: ret i32 [[A]]
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;
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%a = call i32 @llvm.abs.i32(i32 %x, i1 true)
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%b = call i32 @llvm.abs.i32(i32 %a, i1 false)
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ret i32 %b
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}
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define i32 @test_abs_abs_2(i32 %x) {
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; CHECK-LABEL: @test_abs_abs_2(
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; CHECK-NEXT: [[A:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
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; CHECK-NEXT: ret i32 [[A]]
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;
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%a = call i32 @llvm.abs.i32(i32 %x, i1 false)
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%b = call i32 @llvm.abs.i32(i32 %a, i1 true)
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ret i32 %b
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}
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define i32 @test_abs_abs_3(i32 %x) {
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; CHECK-LABEL: @test_abs_abs_3(
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; CHECK-NEXT: [[A:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
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; CHECK-NEXT: ret i32 [[A]]
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;
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%a = call i32 @llvm.abs.i32(i32 %x, i1 true)
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%b = call i32 @llvm.abs.i32(i32 %a, i1 true)
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ret i32 %b
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}
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; If the sign bit is known zero, the abs is not needed.
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define i32 @zext_abs(i31 %x) {
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; CHECK-LABEL: @zext_abs(
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; CHECK-NEXT: [[ZEXT:%.*]] = zext i31 [[X:%.*]] to i32
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; CHECK-NEXT: ret i32 [[ZEXT]]
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;
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%zext = zext i31 %x to i32
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%abs = call i32 @llvm.abs.i32(i32 %zext, i1 false)
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ret i32 %abs
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}
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define <3 x i82> @lshr_abs(<3 x i82> %x) {
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; CHECK-LABEL: @lshr_abs(
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; CHECK-NEXT: [[LSHR:%.*]] = lshr <3 x i82> [[X:%.*]], <i82 1, i82 1, i82 1>
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; CHECK-NEXT: ret <3 x i82> [[LSHR]]
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;
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%lshr = lshr <3 x i82> %x, <i82 1, i82 1, i82 1>
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%abs = call <3 x i82> @llvm.abs.v3i82(<3 x i82> %lshr, i1 true)
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ret <3 x i82> %abs
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}
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define i32 @and_abs(i32 %x) {
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; CHECK-LABEL: @and_abs(
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; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 2147483644
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; CHECK-NEXT: ret i32 [[AND]]
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;
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%and = and i32 %x, 2147483644
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%abs = call i32 @llvm.abs.i32(i32 %and, i1 true)
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ret i32 %abs
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}
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define <3 x i82> @select_abs(<3 x i1> %cond) {
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; CHECK-LABEL: @select_abs(
|
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; CHECK-NEXT: [[SEL:%.*]] = select <3 x i1> [[COND:%.*]], <3 x i82> zeroinitializer, <3 x i82> <i82 2147483647, i82 42, i82 1>
|
||||
; CHECK-NEXT: ret <3 x i82> [[SEL]]
|
||||
;
|
||||
%sel = select <3 x i1> %cond, <3 x i82> zeroinitializer, <3 x i82> <i82 2147483647, i82 42, i82 1>
|
||||
%abs = call <3 x i82> @llvm.abs.v3i82(<3 x i82> %sel, i1 false)
|
||||
ret <3 x i82> %abs
|
||||
}
|
||||
|
||||
declare void @llvm.assume(i1)
|
||||
|
||||
define i32 @assume_abs(i32 %x) {
|
||||
; CHECK-LABEL: @assume_abs(
|
||||
; CHECK-NEXT: [[ASSUME:%.*]] = icmp sge i32 [[X:%.*]], 0
|
||||
; CHECK-NEXT: call void @llvm.assume(i1 [[ASSUME]])
|
||||
; CHECK-NEXT: ret i32 [[X]]
|
||||
;
|
||||
%assume = icmp sge i32 %x, 0
|
||||
call void @llvm.assume(i1 %assume)
|
||||
%abs = call i32 @llvm.abs.i32(i32 %x, i1 true)
|
||||
ret i32 %abs
|
||||
}
|
||||
|
||||
declare {i8, i1} @llvm.uadd.with.overflow.i8(i8 %a, i8 %b)
|
||||
declare {i8, i1} @llvm.sadd.with.overflow.i8(i8 %a, i8 %b)
|
||||
declare {i8, i1} @llvm.usub.with.overflow.i8(i8 %a, i8 %b)
|
||||
|
@ -1142,7 +1043,7 @@ define i32 @call_undef_musttail() {
|
|||
|
||||
define float @nobuiltin_fmax() {
|
||||
; CHECK-LABEL: @nobuiltin_fmax(
|
||||
; CHECK-NEXT: [[M:%.*]] = call float @fmaxf(float 0.000000e+00, float 1.000000e+00) #4
|
||||
; CHECK-NEXT: [[M:%.*]] = call float @fmaxf(float 0.000000e+00, float 1.000000e+00) #3
|
||||
; CHECK-NEXT: [[R:%.*]] = call float @llvm.fabs.f32(float [[M]])
|
||||
; CHECK-NEXT: ret float [[R]]
|
||||
;
|
||||
|
|
Loading…
Reference in New Issue