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[mips] Handle 'M' and 'L' operand codes for memory operands 

Both operand codes now work the same way in case of register or memory
operands. It print high-order or low-order word in a double-word
register or memory location.

llvm-svn: 324476
This commit is contained in:
Simon Atanasyan 2018-02-07 12:36:33 +00:00
parent 7deda4f5af
commit 737bec38d0
2 changed files with 37 additions and 7 deletions
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22
llvm/lib/Target/Mips/MipsAsmPrinter.cpp
View File

@ -576,17 +576,27 @@ bool MipsAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
assert(OffsetMO.isImm() && "Unexpected offset for inline asm memory operand.");
int Offset = OffsetMO.getImm();
// Currently we are expecting either no ExtraCode or 'D'
// Currently we are expecting either no ExtraCode or 'D','M','L'.
if (ExtraCode) {
if (ExtraCode[0] == 'D')
switch (ExtraCode[0]) {
case 'D':
Offset += 4;
else
break;
case 'M':
if (Subtarget->isLittle())
Offset += 4;
break;
case 'L':
if (!Subtarget->isLittle())
Offset += 4;
break;
default:
return true; // Unknown modifier.
// FIXME: M = high order bits
// FIXME: L = low order bits
}
}
O << Offset << "($" << MipsInstPrinter::getRegisterName(BaseMO.getReg()) << ")";
O << Offset << "($" << MipsInstPrinter::getRegisterName(BaseMO.getReg())
<< ")";
return false;
}

22
llvm/test/CodeGen/Mips/inlineasmmemop.ll
View File

@ -1,4 +1,7 @@
; RUN: llc -march=mipsel -relocation-model=pic < %s | FileCheck %s
; RUN: llc -march=mips -relocation-model=pic < %s \
; RUN: | FileCheck --check-prefixes=CHECK,EB %s
; RUN: llc -march=mipsel -relocation-model=pic < %s \
; RUN: | FileCheck --check-prefixes=CHECK,EL %s
; Simple memory
@g1 = external global i32
@ -35,6 +38,18 @@ entry:
; CHECK: lw ${{[0-9]+}}, 12(${{[0-9]+}})
; CHECK: #NO_APP
; "M": High-order word of a double word.
; CHECK: #APP
; EB: lw ${{[0-9]+}}, 12(${{[0-9]+}})
; EL: lw ${{[0-9]+}}, 16(${{[0-9]+}})
; CHECK: #NO_APP
; "L": Low-order word of a double word.
; CHECK: #APP
; EB: lw ${{[0-9]+}}, 16(${{[0-9]+}})
; EL: lw ${{[0-9]+}}, 12(${{[0-9]+}})
; CHECK: #NO_APP
@b = common global [20 x i32] zeroinitializer, align 4
define void @main() {
@ -43,5 +58,10 @@ entry:
tail call void asm sideeffect " lw $0, ${1:D}", "r,*m,~{$11}"(i32 undef, i32* getelementptr inbounds ([20 x i32], [20 x i32]* @b, i32 0, i32 3))
; First word. Notice, no 'D':
tail call void asm sideeffect " lw $0, ${1}", "r,*m,~{$11}"(i32 undef, i32* getelementptr inbounds ([20 x i32], [20 x i32]* @b, i32 0, i32 3))
; High-order part.
tail call void asm sideeffect " lw $0, ${1:M}", "r,*m,~{$11}"(i32 undef, i32* getelementptr inbounds ([20 x i32], [20 x i32]* @b, i32 0, i32 3))
; Low-order part.
tail call void asm sideeffect " lw $0, ${1:L}", "r,*m,~{$11}"(i32 undef, i32* getelementptr inbounds ([20 x i32], [20 x i32]* @b, i32 0, i32 3))
ret void
}