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[X86] Fold cmpeq/ne(trunc(x),0) --> cmpeq/ne(x,0) 

Relax the fold from rGbaadbe04bf75 to compare any op, not just logic ops, now that the movmsk regressions have been handled.
This commit is contained in:
Simon Pilgrim 2021-04-14 10:54:18 +01:00
parent 62af2af85d
commit 73737fe990
9 changed files with 151 additions and 159 deletions
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9
llvm/lib/Target/X86/X86ISelLowering.cpp
View File

@ -48224,21 +48224,18 @@ static SDValue combineSetCC(SDNode *N, SelectionDAG &DAG,
if (SDValue AndN = MatchAndCmpEq(RHS, LHS))
return DAG.getSetCC(DL, VT, AndN, DAG.getConstant(0, DL, OpVT), CC);
// cmpeq(trunc(logic(x)),0) --> cmpeq(logic(x),0)
// cmpne(trunc(logic(x)),0) --> cmpne(logic(x),0)
// cmpeq(trunc(x),0) --> cmpeq(x,0)
// cmpne(trunc(x),0) --> cmpne(x,0)
// iff x upper bits are zero.
// TODO: Remove the logic-op only limit?
// TODO: Add support for RHS to be truncate as well?
if (LHS.getOpcode() == ISD::TRUNCATE &&
LHS.getOperand(0).getScalarValueSizeInBits() >= 32 &&
isNullConstant(RHS) && !DCI.isBeforeLegalize()) {
unsigned LHSOpc = LHS.getOperand(0).getOpcode();
EVT SrcVT = LHS.getOperand(0).getValueType();
APInt UpperBits = APInt::getBitsSetFrom(SrcVT.getScalarSizeInBits(),
OpVT.getScalarSizeInBits());
const TargetLowering &TLI = DAG.getTargetLoweringInfo();
if ((LHSOpc == ISD::AND || LHSOpc == ISD::OR || LHSOpc == ISD::XOR) &&
DAG.MaskedValueIsZero(LHS.getOperand(0), UpperBits) &&
if (DAG.MaskedValueIsZero(LHS.getOperand(0), UpperBits) &&
TLI.isTypeLegal(LHS.getOperand(0).getValueType()))
return DAG.getSetCC(DL, VT, LHS.getOperand(0),
DAG.getConstant(0, DL, SrcVT), CC);

2
llvm/test/CodeGen/X86/div-rem-pair-recomposition-signed.ll
View File

@ -857,7 +857,7 @@ define i32 @multiple_bb(i32 %x, i32 %y, i32* %divdst, i1 zeroext %store_srem, i3
; X64-NEXT: cltd
; X64-NEXT: idivl %esi
; X64-NEXT: movl %eax, (%r9)
; X64-NEXT: testb %cl, %cl
; X64-NEXT: testl %ecx, %ecx
; X64-NEXT: je .LBB10_2
; X64-NEXT: # %bb.1: # %do_srem
; X64-NEXT: movl %eax, %ecx

2
llvm/test/CodeGen/X86/div-rem-pair-recomposition-unsigned.ll
View File

@ -857,7 +857,7 @@ define i32 @multiple_bb(i32 %x, i32 %y, i32* %divdst, i1 zeroext %store_urem, i3
; X64-NEXT: xorl %edx, %edx
; X64-NEXT: divl %esi
; X64-NEXT: movl %eax, (%r9)
; X64-NEXT: testb %cl, %cl
; X64-NEXT: testl %ecx, %ecx
; X64-NEXT: je .LBB10_2
; X64-NEXT: # %bb.1: # %do_urem
; X64-NEXT: movl %eax, %ecx

8
llvm/test/CodeGen/X86/hoist-and-by-const-from-lshr-in-eqcmp-zero.ll
View File

@ -762,7 +762,7 @@ define i1 @scalar_i32_x_is_const2_eq(i32 %y) nounwind {
; X86-BMI1-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-BMI1-NEXT: movl $1, %eax
; X86-BMI1-NEXT: shrl %cl, %eax
; X86-BMI1-NEXT: testb %al, %al
; X86-BMI1-NEXT: testl %eax, %eax
; X86-BMI1-NEXT: sete %al
; X86-BMI1-NEXT: retl
;
@ -771,7 +771,7 @@ define i1 @scalar_i32_x_is_const2_eq(i32 %y) nounwind {
; X86-BMI2-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-BMI2-NEXT: movl $1, %ecx
; X86-BMI2-NEXT: shrxl %eax, %ecx, %eax
; X86-BMI2-NEXT: testb %al, %al
; X86-BMI2-NEXT: testl %eax, %eax
; X86-BMI2-NEXT: sete %al
; X86-BMI2-NEXT: retl
;
@ -781,7 +781,7 @@ define i1 @scalar_i32_x_is_const2_eq(i32 %y) nounwind {
; X64-BMI1-NEXT: movl $1, %eax
; X64-BMI1-NEXT: # kill: def $cl killed $cl killed $ecx
; X64-BMI1-NEXT: shrl %cl, %eax
; X64-BMI1-NEXT: testb %al, %al
; X64-BMI1-NEXT: testl %eax, %eax
; X64-BMI1-NEXT: sete %al
; X64-BMI1-NEXT: retq
;
@ -789,7 +789,7 @@ define i1 @scalar_i32_x_is_const2_eq(i32 %y) nounwind {
; X64-BMI2: # %bb.0:
; X64-BMI2-NEXT: movl $1, %eax
; X64-BMI2-NEXT: shrxl %edi, %eax, %eax
; X64-BMI2-NEXT: testb %al, %al
; X64-BMI2-NEXT: testl %eax, %eax
; X64-BMI2-NEXT: sete %al
; X64-BMI2-NEXT: retq
%t0 = lshr i32 1, %y

108
llvm/test/CodeGen/X86/movmsk-cmp.ll
View File

@ -30,14 +30,14 @@ define i1 @allzeros_v16i8_sign(<16 x i8> %arg) {
; SSE-LABEL: allzeros_v16i8_sign:
; SSE: # %bb.0:
; SSE-NEXT: pmovmskb %xmm0, %eax
; SSE-NEXT: testw %ax, %ax
; SSE-NEXT: testl %eax, %eax
; SSE-NEXT: sete %al
; SSE-NEXT: retq
;
; AVX-LABEL: allzeros_v16i8_sign:
; AVX: # %bb.0:
; AVX-NEXT: vpmovmskb %xmm0, %eax
; AVX-NEXT: testw %ax, %ax
; AVX-NEXT: testl %eax, %eax
; AVX-NEXT: sete %al
; AVX-NEXT: retq
%tmp = icmp slt <16 x i8> %arg, zeroinitializer
@ -376,7 +376,7 @@ define i1 @allzeros_v16i16_sign(<16 x i16> %arg) {
; SSE: # %bb.0:
; SSE-NEXT: packsswb %xmm1, %xmm0
; SSE-NEXT: pmovmskb %xmm0, %eax
; SSE-NEXT: testw %ax, %ax
; SSE-NEXT: testl %eax, %eax
; SSE-NEXT: sete %al
; SSE-NEXT: retq
;
@ -385,7 +385,7 @@ define i1 @allzeros_v16i16_sign(<16 x i16> %arg) {
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX1-NEXT: vpacksswb %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: testw %ax, %ax
; AVX1-NEXT: testl %eax, %eax
; AVX1-NEXT: sete %al
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
@ -570,14 +570,14 @@ define i1 @allzeros_v4i32_sign(<4 x i32> %arg) {
; SSE-LABEL: allzeros_v4i32_sign:
; SSE: # %bb.0:
; SSE-NEXT: movmskps %xmm0, %eax
; SSE-NEXT: testb %al, %al
; SSE-NEXT: testl %eax, %eax
; SSE-NEXT: sete %al
; SSE-NEXT: retq
;
; AVX-LABEL: allzeros_v4i32_sign:
; AVX: # %bb.0:
; AVX-NEXT: vmovmskps %xmm0, %eax
; AVX-NEXT: testb %al, %al
; AVX-NEXT: testl %eax, %eax
; AVX-NEXT: sete %al
; AVX-NEXT: retq
%tmp = icmp slt <4 x i32> %arg, zeroinitializer
@ -621,7 +621,7 @@ define i1 @allzeros_v8i32_sign(<8 x i32> %arg) {
; AVX-LABEL: allzeros_v8i32_sign:
; AVX: # %bb.0:
; AVX-NEXT: vmovmskps %ymm0, %eax
; AVX-NEXT: testb %al, %al
; AVX-NEXT: testl %eax, %eax
; AVX-NEXT: sete %al
; AVX-NEXT: vzeroupper
; AVX-NEXT: retq
@ -698,7 +698,7 @@ define i1 @allzeros_v16i32_sign(<16 x i32> %arg) {
; SSE-NEXT: packssdw %xmm1, %xmm0
; SSE-NEXT: packsswb %xmm2, %xmm0
; SSE-NEXT: pmovmskb %xmm0, %eax
; SSE-NEXT: testw %ax, %ax
; SSE-NEXT: testl %eax, %eax
; SSE-NEXT: sete %al
; SSE-NEXT: retq
;
@ -710,7 +710,7 @@ define i1 @allzeros_v16i32_sign(<16 x i32> %arg) {
; AVX1-NEXT: vpackssdw %xmm2, %xmm0, %xmm0
; AVX1-NEXT: vpacksswb %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: testw %ax, %ax
; AVX1-NEXT: testl %eax, %eax
; AVX1-NEXT: sete %al
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
@ -776,14 +776,14 @@ define i1 @allzeros_v4i64_sign(<4 x i64> %arg) {
; SSE: # %bb.0:
; SSE-NEXT: packssdw %xmm1, %xmm0
; SSE-NEXT: movmskps %xmm0, %eax
; SSE-NEXT: testb %al, %al
; SSE-NEXT: testl %eax, %eax
; SSE-NEXT: sete %al
; SSE-NEXT: retq
;
; AVX-LABEL: allzeros_v4i64_sign:
; AVX: # %bb.0:
; AVX-NEXT: vmovmskpd %ymm0, %eax
; AVX-NEXT: testb %al, %al
; AVX-NEXT: testl %eax, %eax
; AVX-NEXT: sete %al
; AVX-NEXT: vzeroupper
; AVX-NEXT: retq
@ -875,7 +875,7 @@ define i1 @allzeros_v8i64_sign(<8 x i64> %arg) {
; AVX1-NEXT: vpackssdw %xmm2, %xmm1, %xmm1
; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVX1-NEXT: vmovmskps %ymm0, %eax
; AVX1-NEXT: testb %al, %al
; AVX1-NEXT: testl %eax, %eax
; AVX1-NEXT: sete %al
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
@ -884,7 +884,7 @@ define i1 @allzeros_v8i64_sign(<8 x i64> %arg) {
; AVX2: # %bb.0:
; AVX2-NEXT: vpackssdw %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vmovmskps %ymm0, %eax
; AVX2-NEXT: testb %al, %al
; AVX2-NEXT: testl %eax, %eax
; AVX2-NEXT: sete %al
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
@ -1191,7 +1191,7 @@ define i1 @allzeros_v16i8_and1(<16 x i8> %arg) {
; SSE: # %bb.0:
; SSE-NEXT: psllw $7, %xmm0
; SSE-NEXT: pmovmskb %xmm0, %eax
; SSE-NEXT: testw %ax, %ax
; SSE-NEXT: testl %eax, %eax
; SSE-NEXT: sete %al
; SSE-NEXT: retq
;
@ -1199,7 +1199,7 @@ define i1 @allzeros_v16i8_and1(<16 x i8> %arg) {
; AVX1OR2: # %bb.0:
; AVX1OR2-NEXT: vpsllw $7, %xmm0, %xmm0
; AVX1OR2-NEXT: vpmovmskb %xmm0, %eax
; AVX1OR2-NEXT: testw %ax, %ax
; AVX1OR2-NEXT: testl %eax, %eax
; AVX1OR2-NEXT: sete %al
; AVX1OR2-NEXT: retq
;
@ -1207,7 +1207,7 @@ define i1 @allzeros_v16i8_and1(<16 x i8> %arg) {
; KNL: # %bb.0:
; KNL-NEXT: vpsllw $7, %xmm0, %xmm0
; KNL-NEXT: vpmovmskb %xmm0, %eax
; KNL-NEXT: testw %ax, %ax
; KNL-NEXT: testl %eax, %eax
; KNL-NEXT: sete %al
; KNL-NEXT: retq
;
@ -1767,7 +1767,7 @@ define i1 @allzeros_v16i16_and1(<16 x i16> %arg) {
; SSE-NEXT: psllw $15, %xmm0
; SSE-NEXT: packsswb %xmm1, %xmm0
; SSE-NEXT: pmovmskb %xmm0, %eax
; SSE-NEXT: testw %ax, %ax
; SSE-NEXT: testl %eax, %eax
; SSE-NEXT: sete %al
; SSE-NEXT: retq
;
@ -1778,7 +1778,7 @@ define i1 @allzeros_v16i16_and1(<16 x i16> %arg) {
; AVX1-NEXT: vpsllw $15, %xmm0, %xmm0
; AVX1-NEXT: vpacksswb %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: testw %ax, %ax
; AVX1-NEXT: testl %eax, %eax
; AVX1-NEXT: sete %al
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
@ -1863,7 +1863,7 @@ define i1 @allzeros_v4i32_and1(<4 x i32> %arg) {
; SSE: # %bb.0:
; SSE-NEXT: pslld $31, %xmm0
; SSE-NEXT: movmskps %xmm0, %eax
; SSE-NEXT: testb %al, %al
; SSE-NEXT: testl %eax, %eax
; SSE-NEXT: sete %al
; SSE-NEXT: retq
;
@ -1871,7 +1871,7 @@ define i1 @allzeros_v4i32_and1(<4 x i32> %arg) {
; AVX1OR2: # %bb.0:
; AVX1OR2-NEXT: vpslld $31, %xmm0, %xmm0
; AVX1OR2-NEXT: vmovmskps %xmm0, %eax
; AVX1OR2-NEXT: testb %al, %al
; AVX1OR2-NEXT: testl %eax, %eax
; AVX1OR2-NEXT: sete %al
; AVX1OR2-NEXT: retq
;
@ -1973,7 +1973,7 @@ define i1 @allzeros_v8i32_and1(<8 x i32> %arg) {
; AVX1-NEXT: vpslld $31, %xmm0, %xmm0
; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; AVX1-NEXT: vmovmskps %ymm0, %eax
; AVX1-NEXT: testb %al, %al
; AVX1-NEXT: testl %eax, %eax
; AVX1-NEXT: sete %al
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
@ -1982,7 +1982,7 @@ define i1 @allzeros_v8i32_and1(<8 x i32> %arg) {
; AVX2: # %bb.0:
; AVX2-NEXT: vpslld $31, %ymm0, %ymm0
; AVX2-NEXT: vmovmskps %ymm0, %eax
; AVX2-NEXT: testb %al, %al
; AVX2-NEXT: testl %eax, %eax
; AVX2-NEXT: sete %al
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
@ -2083,7 +2083,7 @@ define i1 @allzeros_v16i32_and1(<16 x i32> %arg) {
; SSE-NEXT: packssdw %xmm1, %xmm0
; SSE-NEXT: packsswb %xmm2, %xmm0
; SSE-NEXT: pmovmskb %xmm0, %eax
; SSE-NEXT: testw %ax, %ax
; SSE-NEXT: testl %eax, %eax
; SSE-NEXT: sete %al
; SSE-NEXT: retq
;
@ -2099,7 +2099,7 @@ define i1 @allzeros_v16i32_and1(<16 x i32> %arg) {
; AVX1-NEXT: vpackssdw %xmm2, %xmm0, %xmm0
; AVX1-NEXT: vpacksswb %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: testw %ax, %ax
; AVX1-NEXT: testl %eax, %eax
; AVX1-NEXT: sete %al
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
@ -2178,7 +2178,7 @@ define i1 @allzeros_v2i64_and1(<2 x i64> %arg) {
; SSE: # %bb.0:
; SSE-NEXT: psllq $63, %xmm0
; SSE-NEXT: movmskpd %xmm0, %eax
; SSE-NEXT: testb %al, %al
; SSE-NEXT: testl %eax, %eax
; SSE-NEXT: sete %al
; SSE-NEXT: retq
;
@ -2186,7 +2186,7 @@ define i1 @allzeros_v2i64_and1(<2 x i64> %arg) {
; AVX1OR2: # %bb.0:
; AVX1OR2-NEXT: vpsllq $63, %xmm0, %xmm0
; AVX1OR2-NEXT: vmovmskpd %xmm0, %eax
; AVX1OR2-NEXT: testb %al, %al
; AVX1OR2-NEXT: testl %eax, %eax
; AVX1OR2-NEXT: sete %al
; AVX1OR2-NEXT: retq
;
@ -2278,7 +2278,7 @@ define i1 @allzeros_v4i64_and1(<4 x i64> %arg) {
; SSE-NEXT: psllq $63, %xmm0
; SSE-NEXT: packssdw %xmm1, %xmm0
; SSE-NEXT: movmskps %xmm0, %eax
; SSE-NEXT: testb %al, %al
; SSE-NEXT: testl %eax, %eax
; SSE-NEXT: sete %al
; SSE-NEXT: retq
;
@ -2289,7 +2289,7 @@ define i1 @allzeros_v4i64_and1(<4 x i64> %arg) {
; AVX1-NEXT: vpsllq $63, %xmm0, %xmm0
; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; AVX1-NEXT: vmovmskpd %ymm0, %eax
; AVX1-NEXT: testb %al, %al
; AVX1-NEXT: testl %eax, %eax
; AVX1-NEXT: sete %al
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
@ -2298,7 +2298,7 @@ define i1 @allzeros_v4i64_and1(<4 x i64> %arg) {
; AVX2: # %bb.0:
; AVX2-NEXT: vpsllq $63, %ymm0, %ymm0
; AVX2-NEXT: vmovmskpd %ymm0, %eax
; AVX2-NEXT: testb %al, %al
; AVX2-NEXT: testl %eax, %eax
; AVX2-NEXT: sete %al
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
@ -2427,7 +2427,7 @@ define i1 @allzeros_v8i64_and1(<8 x i64> %arg) {
; AVX1-NEXT: vpackssdw %xmm2, %xmm1, %xmm1
; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVX1-NEXT: vmovmskps %ymm0, %eax
; AVX1-NEXT: testb %al, %al
; AVX1-NEXT: testl %eax, %eax
; AVX1-NEXT: sete %al
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
@ -2438,7 +2438,7 @@ define i1 @allzeros_v8i64_and1(<8 x i64> %arg) {
; AVX2-NEXT: vpsllq $63, %ymm0, %ymm0
; AVX2-NEXT: vpackssdw %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vmovmskps %ymm0, %eax
; AVX2-NEXT: testb %al, %al
; AVX2-NEXT: testl %eax, %eax
; AVX2-NEXT: sete %al
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
@ -2509,7 +2509,7 @@ define i1 @allzeros_v16i8_and4(<16 x i8> %arg) {
; SSE: # %bb.0:
; SSE-NEXT: psllw $5, %xmm0
; SSE-NEXT: pmovmskb %xmm0, %eax
; SSE-NEXT: testw %ax, %ax
; SSE-NEXT: testl %eax, %eax
; SSE-NEXT: sete %al
; SSE-NEXT: retq
;
@ -2517,7 +2517,7 @@ define i1 @allzeros_v16i8_and4(<16 x i8> %arg) {
; AVX1OR2: # %bb.0:
; AVX1OR2-NEXT: vpsllw $5, %xmm0, %xmm0
; AVX1OR2-NEXT: vpmovmskb %xmm0, %eax
; AVX1OR2-NEXT: testw %ax, %ax
; AVX1OR2-NEXT: testl %eax, %eax
; AVX1OR2-NEXT: sete %al
; AVX1OR2-NEXT: retq
;
@ -2525,7 +2525,7 @@ define i1 @allzeros_v16i8_and4(<16 x i8> %arg) {
; KNL: # %bb.0:
; KNL-NEXT: vpsllw $5, %xmm0, %xmm0
; KNL-NEXT: vpmovmskb %xmm0, %eax
; KNL-NEXT: testw %ax, %ax
; KNL-NEXT: testl %eax, %eax
; KNL-NEXT: sete %al
; KNL-NEXT: retq
;
@ -3085,7 +3085,7 @@ define i1 @allzeros_v16i16_and4(<16 x i16> %arg) {
; SSE-NEXT: psllw $13, %xmm0
; SSE-NEXT: packsswb %xmm1, %xmm0
; SSE-NEXT: pmovmskb %xmm0, %eax
; SSE-NEXT: testw %ax, %ax
; SSE-NEXT: testl %eax, %eax
; SSE-NEXT: sete %al
; SSE-NEXT: retq
;
@ -3096,7 +3096,7 @@ define i1 @allzeros_v16i16_and4(<16 x i16> %arg) {
; AVX1-NEXT: vpsllw $13, %xmm0, %xmm0
; AVX1-NEXT: vpacksswb %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: testw %ax, %ax
; AVX1-NEXT: testl %eax, %eax
; AVX1-NEXT: sete %al
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
@ -3181,7 +3181,7 @@ define i1 @allzeros_v4i32_and4(<4 x i32> %arg) {
; SSE: # %bb.0:
; SSE-NEXT: pslld $29, %xmm0
; SSE-NEXT: movmskps %xmm0, %eax
; SSE-NEXT: testb %al, %al
; SSE-NEXT: testl %eax, %eax
; SSE-NEXT: sete %al
; SSE-NEXT: retq
;
@ -3189,7 +3189,7 @@ define i1 @allzeros_v4i32_and4(<4 x i32> %arg) {
; AVX1OR2: # %bb.0:
; AVX1OR2-NEXT: vpslld $29, %xmm0, %xmm0
; AVX1OR2-NEXT: vmovmskps %xmm0, %eax
; AVX1OR2-NEXT: testb %al, %al
; AVX1OR2-NEXT: testl %eax, %eax
; AVX1OR2-NEXT: sete %al
; AVX1OR2-NEXT: retq
;
@ -3291,7 +3291,7 @@ define i1 @allzeros_v8i32_and4(<8 x i32> %arg) {
; AVX1-NEXT: vpslld $29, %xmm0, %xmm0
; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; AVX1-NEXT: vmovmskps %ymm0, %eax
; AVX1-NEXT: testb %al, %al
; AVX1-NEXT: testl %eax, %eax
; AVX1-NEXT: sete %al
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
@ -3300,7 +3300,7 @@ define i1 @allzeros_v8i32_and4(<8 x i32> %arg) {
; AVX2: # %bb.0:
; AVX2-NEXT: vpslld $29, %ymm0, %ymm0
; AVX2-NEXT: vmovmskps %ymm0, %eax
; AVX2-NEXT: testb %al, %al
; AVX2-NEXT: testl %eax, %eax
; AVX2-NEXT: sete %al
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
@ -3401,7 +3401,7 @@ define i1 @allzeros_v16i32_and4(<16 x i32> %arg) {
; SSE-NEXT: packssdw %xmm1, %xmm0
; SSE-NEXT: packsswb %xmm2, %xmm0
; SSE-NEXT: pmovmskb %xmm0, %eax
; SSE-NEXT: testw %ax, %ax
; SSE-NEXT: testl %eax, %eax
; SSE-NEXT: sete %al
; SSE-NEXT: retq
;
@ -3417,7 +3417,7 @@ define i1 @allzeros_v16i32_and4(<16 x i32> %arg) {
; AVX1-NEXT: vpackssdw %xmm2, %xmm0, %xmm0
; AVX1-NEXT: vpacksswb %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: testw %ax, %ax
; AVX1-NEXT: testl %eax, %eax
; AVX1-NEXT: sete %al
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
@ -3496,7 +3496,7 @@ define i1 @allzeros_v2i64_and4(<2 x i64> %arg) {
; SSE: # %bb.0:
; SSE-NEXT: psllq $61, %xmm0
; SSE-NEXT: movmskpd %xmm0, %eax
; SSE-NEXT: testb %al, %al
; SSE-NEXT: testl %eax, %eax
; SSE-NEXT: sete %al
; SSE-NEXT: retq
;
@ -3504,7 +3504,7 @@ define i1 @allzeros_v2i64_and4(<2 x i64> %arg) {
; AVX1OR2: # %bb.0:
; AVX1OR2-NEXT: vpsllq $61, %xmm0, %xmm0
; AVX1OR2-NEXT: vmovmskpd %xmm0, %eax
; AVX1OR2-NEXT: testb %al, %al
; AVX1OR2-NEXT: testl %eax, %eax
; AVX1OR2-NEXT: sete %al
; AVX1OR2-NEXT: retq
;
@ -3596,7 +3596,7 @@ define i1 @allzeros_v4i64_and4(<4 x i64> %arg) {
; SSE-NEXT: psllq $61, %xmm0
; SSE-NEXT: packssdw %xmm1, %xmm0
; SSE-NEXT: movmskps %xmm0, %eax
; SSE-NEXT: testb %al, %al
; SSE-NEXT: testl %eax, %eax
; SSE-NEXT: sete %al
; SSE-NEXT: retq
;
@ -3607,7 +3607,7 @@ define i1 @allzeros_v4i64_and4(<4 x i64> %arg) {
; AVX1-NEXT: vpsllq $61, %xmm0, %xmm0
; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; AVX1-NEXT: vmovmskpd %ymm0, %eax
; AVX1-NEXT: testb %al, %al
; AVX1-NEXT: testl %eax, %eax
; AVX1-NEXT: sete %al
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
@ -3616,7 +3616,7 @@ define i1 @allzeros_v4i64_and4(<4 x i64> %arg) {
; AVX2: # %bb.0:
; AVX2-NEXT: vpsllq $61, %ymm0, %ymm0
; AVX2-NEXT: vmovmskpd %ymm0, %eax
; AVX2-NEXT: testb %al, %al
; AVX2-NEXT: testl %eax, %eax
; AVX2-NEXT: sete %al
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
@ -3745,7 +3745,7 @@ define i1 @allzeros_v8i64_and4(<8 x i64> %arg) {
; AVX1-NEXT: vpackssdw %xmm2, %xmm1, %xmm1
; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVX1-NEXT: vmovmskps %ymm0, %eax
; AVX1-NEXT: testb %al, %al
; AVX1-NEXT: testl %eax, %eax
; AVX1-NEXT: sete %al
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
@ -3756,7 +3756,7 @@ define i1 @allzeros_v8i64_and4(<8 x i64> %arg) {
; AVX2-NEXT: vpsllq $61, %ymm0, %ymm0
; AVX2-NEXT: vpackssdw %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vmovmskps %ymm0, %eax
; AVX2-NEXT: testb %al, %al
; AVX2-NEXT: testl %eax, %eax
; AVX2-NEXT: sete %al
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
@ -4156,7 +4156,7 @@ define i1 @movmsk_or_v2i64(<2 x i64> %x, <2 x i64> %y) {
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,0,3,2]
; SSE2-NEXT: pand %xmm0, %xmm1
; SSE2-NEXT: movmskpd %xmm1, %eax
; SSE2-NEXT: xorb $3, %al
; SSE2-NEXT: cmpl $3, %eax
; SSE2-NEXT: setne %al
; SSE2-NEXT: retq
;
@ -4164,7 +4164,7 @@ define i1 @movmsk_or_v2i64(<2 x i64> %x, <2 x i64> %y) {
; SSE41: # %bb.0:
; SSE41-NEXT: pcmpeqq %xmm1, %xmm0
; SSE41-NEXT: movmskpd %xmm0, %eax
; SSE41-NEXT: xorb $3, %al
; SSE41-NEXT: cmpl $3, %eax
; SSE41-NEXT: setne %al
; SSE41-NEXT: retq
;
@ -4172,7 +4172,7 @@ define i1 @movmsk_or_v2i64(<2 x i64> %x, <2 x i64> %y) {
; AVX1OR2: # %bb.0:
; AVX1OR2-NEXT: vpcmpeqq %xmm1, %xmm0, %xmm0
; AVX1OR2-NEXT: vmovmskpd %xmm0, %eax
; AVX1OR2-NEXT: xorb $3, %al
; AVX1OR2-NEXT: cmpl $3, %eax
; AVX1OR2-NEXT: setne %al
; AVX1OR2-NEXT: retq
;
@ -4295,7 +4295,7 @@ define i1 @movmsk_or_v2f64(<2 x double> %x, <2 x double> %y) {
; SSE: # %bb.0:
; SSE-NEXT: cmplepd %xmm0, %xmm1
; SSE-NEXT: movmskpd %xmm1, %eax
; SSE-NEXT: testb %al, %al
; SSE-NEXT: testl %eax, %eax
; SSE-NEXT: setne %al
; SSE-NEXT: retq
;
@ -4303,7 +4303,7 @@ define i1 @movmsk_or_v2f64(<2 x double> %x, <2 x double> %y) {
; AVX1OR2: # %bb.0:
; AVX1OR2-NEXT: vcmplepd %xmm0, %xmm1, %xmm0
; AVX1OR2-NEXT: vmovmskpd %xmm0, %eax
; AVX1OR2-NEXT: testb %al, %al
; AVX1OR2-NEXT: testl %eax, %eax
; AVX1OR2-NEXT: setne %al
; AVX1OR2-NEXT: retq
;

29
llvm/test/CodeGen/X86/pr32284.ll
View File

@ -40,9 +40,8 @@ define void @foo() {
; X64-NEXT: movzbl {{.*}}(%rip), %eax
; X64-NEXT: xorl %ecx, %ecx
; X64-NEXT: testl %eax, %eax
; X64-NEXT: setne %cl
; X64-NEXT: testb %al, %al
; X64-NEXT: setne -{{[0-9]+}}(%rsp)
; X64-NEXT: setne %cl
; X64-NEXT: xorl %edx, %edx
; X64-NEXT: cmpl %eax, %ecx
; X64-NEXT: setle %dl
@ -317,11 +316,9 @@ define void @f2() {
; X64-NEXT: xorl %ecx, %ecx
; X64-NEXT: testl %eax, %eax
; X64-NEXT: sete %cl
; X64-NEXT: xorl %eax, %ecx
; X64-NEXT: movw %cx, -{{[0-9]+}}(%rsp)
; X64-NEXT: xorl %ecx, %ecx
; X64-NEXT: testb %al, %al
; X64-NEXT: sete %cl
; X64-NEXT: movl %eax, %edx
; X64-NEXT: xorl %ecx, %edx
; X64-NEXT: movw %dx, -{{[0-9]+}}(%rsp)
; X64-NEXT: xorl %edx, %edx
; X64-NEXT: cmpl %eax, %ecx
; X64-NEXT: sete %dl
@ -364,17 +361,15 @@ define void @f2() {
; X86: # %bb.0: # %entry
; X86-NEXT: subl $2, %esp
; X86-NEXT: .cfi_def_cfa_offset 6
; X86-NEXT: movzbl var_7, %eax
; X86-NEXT: xorl %ecx, %ecx
; X86-NEXT: testl %eax, %eax
; X86-NEXT: sete %cl
; X86-NEXT: xorl %eax, %ecx
; X86-NEXT: movw %cx, (%esp)
; X86-NEXT: xorl %ecx, %ecx
; X86-NEXT: testb %al, %al
; X86-NEXT: sete %cl
; X86-NEXT: movzbl var_7, %ecx
; X86-NEXT: xorl %eax, %eax
; X86-NEXT: testl %ecx, %ecx
; X86-NEXT: sete %al
; X86-NEXT: movl %ecx, %edx
; X86-NEXT: xorl %eax, %edx
; X86-NEXT: movw %dx, (%esp)
; X86-NEXT: xorl %edx, %edx
; X86-NEXT: cmpl %eax, %ecx
; X86-NEXT: cmpl %ecx, %eax
; X86-NEXT: sete %dl
; X86-NEXT: movw %dx, (%eax)
; X86-NEXT: addl $2, %esp

2
llvm/test/CodeGen/X86/setcc-lowering.ll
View File

@ -53,7 +53,7 @@ define void @pr26232(i64 %a, <16 x i1> %b) {
; AVX-NEXT: vpand %xmm0, %xmm2, %xmm2
; AVX-NEXT: vpsllw $7, %xmm2, %xmm2
; AVX-NEXT: vpmovmskb %xmm2, %eax
; AVX-NEXT: testw %ax, %ax
; AVX-NEXT: testl %eax, %eax
; AVX-NEXT: jne .LBB1_1
; AVX-NEXT: # %bb.2: # %for_exit600
; AVX-NEXT: retq

44
llvm/test/CodeGen/X86/vector-compare-any_of.ll
View File

@ -784,7 +784,7 @@ define i1 @bool_reduction_v2f64(<2 x double> %x, <2 x double> %y) {
; SSE: # %bb.0:
; SSE-NEXT: cmpltpd %xmm0, %xmm1
; SSE-NEXT: movmskpd %xmm1, %eax
; SSE-NEXT: testb %al, %al
; SSE-NEXT: testl %eax, %eax
; SSE-NEXT: setne %al
; SSE-NEXT: retq
;
@ -792,7 +792,7 @@ define i1 @bool_reduction_v2f64(<2 x double> %x, <2 x double> %y) {
; AVX: # %bb.0:
; AVX-NEXT: vcmpltpd %xmm0, %xmm1, %xmm0
; AVX-NEXT: vmovmskpd %xmm0, %eax
; AVX-NEXT: testb %al, %al
; AVX-NEXT: testl %eax, %eax
; AVX-NEXT: setne %al
; AVX-NEXT: retq
;
@ -815,7 +815,7 @@ define i1 @bool_reduction_v4f32(<4 x float> %x, <4 x float> %y) {
; SSE: # %bb.0:
; SSE-NEXT: cmpeqps %xmm1, %xmm0
; SSE-NEXT: movmskps %xmm0, %eax
; SSE-NEXT: testb %al, %al
; SSE-NEXT: testl %eax, %eax
; SSE-NEXT: setne %al
; SSE-NEXT: retq
;
@ -823,7 +823,7 @@ define i1 @bool_reduction_v4f32(<4 x float> %x, <4 x float> %y) {
; AVX: # %bb.0:
; AVX-NEXT: vcmpeqps %xmm1, %xmm0, %xmm0
; AVX-NEXT: vmovmskps %xmm0, %eax
; AVX-NEXT: testb %al, %al
; AVX-NEXT: testl %eax, %eax
; AVX-NEXT: setne %al
; AVX-NEXT: retq
;
@ -850,7 +850,7 @@ define i1 @bool_reduction_v4f64(<4 x double> %x, <4 x double> %y) {
; SSE-NEXT: cmplepd %xmm0, %xmm2
; SSE-NEXT: packssdw %xmm3, %xmm2
; SSE-NEXT: movmskps %xmm2, %eax
; SSE-NEXT: testb %al, %al
; SSE-NEXT: testl %eax, %eax
; SSE-NEXT: setne %al
; SSE-NEXT: retq
;
@ -858,7 +858,7 @@ define i1 @bool_reduction_v4f64(<4 x double> %x, <4 x double> %y) {
; AVX: # %bb.0:
; AVX-NEXT: vcmplepd %ymm0, %ymm1, %ymm0
; AVX-NEXT: vmovmskpd %ymm0, %eax
; AVX-NEXT: testb %al, %al
; AVX-NEXT: testl %eax, %eax
; AVX-NEXT: setne %al
; AVX-NEXT: vzeroupper
; AVX-NEXT: retq
@ -895,7 +895,7 @@ define i1 @bool_reduction_v8f32(<8 x float> %x, <8 x float> %y) {
; AVX: # %bb.0:
; AVX-NEXT: vcmpneqps %ymm1, %ymm0, %ymm0
; AVX-NEXT: vmovmskps %ymm0, %eax
; AVX-NEXT: testb %al, %al
; AVX-NEXT: testl %eax, %eax
; AVX-NEXT: setne %al
; AVX-NEXT: vzeroupper
; AVX-NEXT: retq
@ -927,7 +927,7 @@ define i1 @bool_reduction_v2i64(<2 x i64> %x, <2 x i64> %y) {
; SSE-NEXT: pxor %xmm2, %xmm0
; SSE-NEXT: pcmpgtq %xmm1, %xmm0
; SSE-NEXT: movmskpd %xmm0, %eax
; SSE-NEXT: testb %al, %al
; SSE-NEXT: testl %eax, %eax
; SSE-NEXT: setne %al
; SSE-NEXT: retq
;
@ -938,7 +938,7 @@ define i1 @bool_reduction_v2i64(<2 x i64> %x, <2 x i64> %y) {
; AVX-NEXT: vpxor %xmm2, %xmm0, %xmm0
; AVX-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0
; AVX-NEXT: vmovmskpd %xmm0, %eax
; AVX-NEXT: testb %al, %al
; AVX-NEXT: testl %eax, %eax
; AVX-NEXT: setne %al
; AVX-NEXT: retq
;
@ -961,7 +961,7 @@ define i1 @bool_reduction_v4i32(<4 x i32> %x, <4 x i32> %y) {
; SSE: # %bb.0:
; SSE-NEXT: pcmpeqd %xmm1, %xmm0
; SSE-NEXT: movmskps %xmm0, %eax
; SSE-NEXT: xorb $15, %al
; SSE-NEXT: cmpl $15, %eax
; SSE-NEXT: setne %al
; SSE-NEXT: retq
;
@ -969,7 +969,7 @@ define i1 @bool_reduction_v4i32(<4 x i32> %x, <4 x i32> %y) {
; AVX: # %bb.0:
; AVX-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
; AVX-NEXT: vmovmskps %xmm0, %eax
; AVX-NEXT: xorb $15, %al
; AVX-NEXT: cmpl $15, %eax
; AVX-NEXT: setne %al
; AVX-NEXT: retq
;
@ -1029,7 +1029,7 @@ define i1 @bool_reduction_v16i8(<16 x i8> %x, <16 x i8> %y) {
; SSE: # %bb.0:
; SSE-NEXT: pcmpgtb %xmm1, %xmm0
; SSE-NEXT: pmovmskb %xmm0, %eax
; SSE-NEXT: testw %ax, %ax
; SSE-NEXT: testl %eax, %eax
; SSE-NEXT: setne %al
; SSE-NEXT: retq
;
@ -1037,7 +1037,7 @@ define i1 @bool_reduction_v16i8(<16 x i8> %x, <16 x i8> %y) {
; AVX: # %bb.0:
; AVX-NEXT: vpcmpgtb %xmm1, %xmm0, %xmm0
; AVX-NEXT: vpmovmskb %xmm0, %eax
; AVX-NEXT: testw %ax, %ax
; AVX-NEXT: testl %eax, %eax
; AVX-NEXT: setne %al
; AVX-NEXT: retq
;
@ -1067,7 +1067,7 @@ define i1 @bool_reduction_v4i64(<4 x i64> %x, <4 x i64> %y) {
; SSE-NEXT: pcmpgtq %xmm0, %xmm2
; SSE-NEXT: packssdw %xmm3, %xmm2
; SSE-NEXT: movmskps %xmm2, %eax
; SSE-NEXT: testb %al, %al
; SSE-NEXT: testl %eax, %eax
; SSE-NEXT: setne %al
; SSE-NEXT: retq
;
@ -1079,7 +1079,7 @@ define i1 @bool_reduction_v4i64(<4 x i64> %x, <4 x i64> %y) {
; AVX1-NEXT: vpcmpgtq %xmm0, %xmm1, %xmm0
; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
; AVX1-NEXT: vmovmskpd %ymm0, %eax
; AVX1-NEXT: testb %al, %al
; AVX1-NEXT: testl %eax, %eax
; AVX1-NEXT: setne %al
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
@ -1088,7 +1088,7 @@ define i1 @bool_reduction_v4i64(<4 x i64> %x, <4 x i64> %y) {
; AVX2: # %bb.0:
; AVX2-NEXT: vpcmpgtq %ymm0, %ymm1, %ymm0
; AVX2-NEXT: vmovmskpd %ymm0, %eax
; AVX2-NEXT: testb %al, %al
; AVX2-NEXT: testl %eax, %eax
; AVX2-NEXT: setne %al
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
@ -1133,7 +1133,7 @@ define i1 @bool_reduction_v8i32(<8 x i32> %x, <8 x i32> %y) {
; AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
; AVX1-NEXT: vmovmskps %ymm0, %eax
; AVX1-NEXT: testb %al, %al
; AVX1-NEXT: testl %eax, %eax
; AVX1-NEXT: setne %al
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
@ -1143,7 +1143,7 @@ define i1 @bool_reduction_v8i32(<8 x i32> %x, <8 x i32> %y) {
; AVX2-NEXT: vpminud %ymm1, %ymm0, %ymm1
; AVX2-NEXT: vpcmpeqd %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vmovmskps %ymm0, %eax
; AVX2-NEXT: testb %al, %al
; AVX2-NEXT: testl %eax, %eax
; AVX2-NEXT: setne %al
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
@ -1174,7 +1174,7 @@ define i1 @bool_reduction_v16i16(<16 x i16> %x, <16 x i16> %y) {
; SSE-NEXT: pcmpeqw %xmm2, %xmm0
; SSE-NEXT: packsswb %xmm1, %xmm0
; SSE-NEXT: pmovmskb %xmm0, %eax
; SSE-NEXT: testw %ax, %ax
; SSE-NEXT: testl %eax, %eax
; SSE-NEXT: setne %al
; SSE-NEXT: retq
;
@ -1186,7 +1186,7 @@ define i1 @bool_reduction_v16i16(<16 x i16> %x, <16 x i16> %y) {
; AVX1-NEXT: vpcmpeqw %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpacksswb %xmm2, %xmm0, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: testw %ax, %ax
; AVX1-NEXT: testl %eax, %eax
; AVX1-NEXT: setne %al
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
@ -1227,7 +1227,7 @@ define i1 @bool_reduction_v32i8(<32 x i8> %x, <32 x i8> %y) {
; SSE-NEXT: pcmpeqb %xmm2, %xmm0
; SSE-NEXT: por %xmm1, %xmm0
; SSE-NEXT: pmovmskb %xmm0, %eax
; SSE-NEXT: testw %ax, %ax
; SSE-NEXT: testl %eax, %eax
; SSE-NEXT: setne %al
; SSE-NEXT: retq
;
@ -1239,7 +1239,7 @@ define i1 @bool_reduction_v32i8(<32 x i8> %x, <32 x i8> %y) {
; AVX1-NEXT: vpcmpeqb %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpor %xmm2, %xmm0, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: testw %ax, %ax
; AVX1-NEXT: testl %eax, %eax
; AVX1-NEXT: setne %al
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq

106
llvm/test/CodeGen/X86/vector-reduce-or-bool.ll
View File

@ -16,7 +16,7 @@ define i1 @trunc_v2i64_v2i1(<2 x i64>) {
; SSE: # %bb.0:
; SSE-NEXT: psllq $63, %xmm0
; SSE-NEXT: movmskpd %xmm0, %eax
; SSE-NEXT: testb %al, %al
; SSE-NEXT: testl %eax, %eax
; SSE-NEXT: setne %al
; SSE-NEXT: retq
;
@ -24,7 +24,7 @@ define i1 @trunc_v2i64_v2i1(<2 x i64>) {
; AVX: # %bb.0:
; AVX-NEXT: vpsllq $63, %xmm0, %xmm0
; AVX-NEXT: vmovmskpd %xmm0, %eax
; AVX-NEXT: testb %al, %al
; AVX-NEXT: testl %eax, %eax
; AVX-NEXT: setne %al
; AVX-NEXT: retq
;
@ -66,7 +66,7 @@ define i1 @trunc_v4i32_v4i1(<4 x i32>) {
; SSE: # %bb.0:
; SSE-NEXT: pslld $31, %xmm0
; SSE-NEXT: movmskps %xmm0, %eax
; SSE-NEXT: testb %al, %al
; SSE-NEXT: testl %eax, %eax
; SSE-NEXT: setne %al
; SSE-NEXT: retq
;
@ -74,7 +74,7 @@ define i1 @trunc_v4i32_v4i1(<4 x i32>) {
; AVX: # %bb.0:
; AVX-NEXT: vpslld $31, %xmm0, %xmm0
; AVX-NEXT: vmovmskps %xmm0, %eax
; AVX-NEXT: testb %al, %al
; AVX-NEXT: testl %eax, %eax
; AVX-NEXT: setne %al
; AVX-NEXT: retq
;
@ -178,7 +178,7 @@ define i1 @trunc_v16i8_v16i1(<16 x i8>) {
; SSE: # %bb.0:
; SSE-NEXT: psllw $7, %xmm0
; SSE-NEXT: pmovmskb %xmm0, %eax
; SSE-NEXT: testw %ax, %ax
; SSE-NEXT: testl %eax, %eax
; SSE-NEXT: setne %al
; SSE-NEXT: retq
;
@ -186,7 +186,7 @@ define i1 @trunc_v16i8_v16i1(<16 x i8>) {
; AVX: # %bb.0:
; AVX-NEXT: vpsllw $7, %xmm0, %xmm0
; AVX-NEXT: vpmovmskb %xmm0, %eax
; AVX-NEXT: testw %ax, %ax
; AVX-NEXT: testl %eax, %eax
; AVX-NEXT: setne %al
; AVX-NEXT: retq
;
@ -194,7 +194,7 @@ define i1 @trunc_v16i8_v16i1(<16 x i8>) {
; AVX512: # %bb.0:
; AVX512-NEXT: vpsllw $7, %xmm0, %xmm0
; AVX512-NEXT: vpmovmskb %xmm0, %eax
; AVX512-NEXT: testw %ax, %ax
; AVX512-NEXT: testl %eax, %eax
; AVX512-NEXT: setne %al
; AVX512-NEXT: retq
%a = trunc <16 x i8> %0 to <16 x i1>
@ -208,7 +208,7 @@ define i1 @trunc_v4i64_v4i1(<4 x i64>) {
; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
; SSE-NEXT: pslld $31, %xmm0
; SSE-NEXT: movmskps %xmm0, %eax
; SSE-NEXT: testb %al, %al
; SSE-NEXT: testl %eax, %eax
; SSE-NEXT: setne %al
; SSE-NEXT: retq
;
@ -218,7 +218,7 @@ define i1 @trunc_v4i64_v4i1(<4 x i64>) {
; AVX1-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
; AVX1-NEXT: vpslld $31, %xmm0, %xmm0
; AVX1-NEXT: vmovmskps %xmm0, %eax
; AVX1-NEXT: testb %al, %al
; AVX1-NEXT: testl %eax, %eax
; AVX1-NEXT: setne %al
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
@ -227,7 +227,7 @@ define i1 @trunc_v4i64_v4i1(<4 x i64>) {
; AVX2: # %bb.0:
; AVX2-NEXT: vpsllq $63, %ymm0, %ymm0
; AVX2-NEXT: vmovmskpd %ymm0, %eax
; AVX2-NEXT: testb %al, %al
; AVX2-NEXT: testl %eax, %eax
; AVX2-NEXT: setne %al
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
@ -299,7 +299,7 @@ define i1 @trunc_v8i32_v8i1(<8 x i32>) {
; AVX1-NEXT: vpslld $31, %xmm0, %xmm0
; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; AVX1-NEXT: vmovmskps %ymm0, %eax
; AVX1-NEXT: testb %al, %al
; AVX1-NEXT: testl %eax, %eax
; AVX1-NEXT: setne %al
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
@ -308,7 +308,7 @@ define i1 @trunc_v8i32_v8i1(<8 x i32>) {
; AVX2: # %bb.0:
; AVX2-NEXT: vpslld $31, %ymm0, %ymm0
; AVX2-NEXT: vmovmskps %ymm0, %eax
; AVX2-NEXT: testb %al, %al
; AVX2-NEXT: testl %eax, %eax
; AVX2-NEXT: setne %al
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
@ -356,7 +356,7 @@ define i1 @trunc_v16i16_v16i1(<16 x i16>) {
; SSE-NEXT: packuswb %xmm1, %xmm0
; SSE-NEXT: psllw $7, %xmm0
; SSE-NEXT: pmovmskb %xmm0, %eax
; SSE-NEXT: testw %ax, %ax
; SSE-NEXT: testl %eax, %eax
; SSE-NEXT: setne %al
; SSE-NEXT: retq
;
@ -367,7 +367,7 @@ define i1 @trunc_v16i16_v16i1(<16 x i16>) {
; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpsllw $7, %xmm0, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: testw %ax, %ax
; AVX1-NEXT: testl %eax, %eax
; AVX1-NEXT: setne %al
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
@ -379,7 +379,7 @@ define i1 @trunc_v16i16_v16i1(<16 x i16>) {
; AVX2-NEXT: vpackuswb %xmm1, %xmm0, %xmm0
; AVX2-NEXT: vpsllw $7, %xmm0, %xmm0
; AVX2-NEXT: vpmovmskb %xmm0, %eax
; AVX2-NEXT: testw %ax, %ax
; AVX2-NEXT: testl %eax, %eax
; AVX2-NEXT: setne %al
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
@ -422,7 +422,7 @@ define i1 @trunc_v32i8_v32i1(<32 x i8>) {
; SSE-NEXT: por %xmm1, %xmm0
; SSE-NEXT: psllw $7, %xmm0
; SSE-NEXT: pmovmskb %xmm0, %eax
; SSE-NEXT: testw %ax, %ax
; SSE-NEXT: testl %eax, %eax
; SSE-NEXT: setne %al
; SSE-NEXT: retq
;
@ -432,7 +432,7 @@ define i1 @trunc_v32i8_v32i1(<32 x i8>) {
; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpsllw $7, %xmm0, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: testw %ax, %ax
; AVX1-NEXT: testl %eax, %eax
; AVX1-NEXT: setne %al
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
@ -534,7 +534,7 @@ define i1 @trunc_v8i64_v8i1(<8 x i64>) {
; AVX1-NEXT: vpslld $31, %xmm1, %xmm1
; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVX1-NEXT: vmovmskps %ymm0, %eax
; AVX1-NEXT: testb %al, %al
; AVX1-NEXT: testl %eax, %eax
; AVX1-NEXT: setne %al
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
@ -546,7 +546,7 @@ define i1 @trunc_v8i64_v8i1(<8 x i64>) {
; AVX2-NEXT: vshufps {{.*#+}} ymm0 = ymm0[0,2],ymm2[0,2],ymm0[4,6],ymm2[4,6]
; AVX2-NEXT: vpslld $31, %ymm0, %ymm0
; AVX2-NEXT: vmovmskps %ymm0, %eax
; AVX2-NEXT: testb %al, %al
; AVX2-NEXT: testl %eax, %eax
; AVX2-NEXT: setne %al
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
@ -598,7 +598,7 @@ define i1 @trunc_v16i32_v16i1(<16 x i32>) {
; SSE2-NEXT: packuswb %xmm2, %xmm0
; SSE2-NEXT: psllw $7, %xmm0
; SSE2-NEXT: pmovmskb %xmm0, %eax
; SSE2-NEXT: testw %ax, %ax
; SSE2-NEXT: testl %eax, %eax
; SSE2-NEXT: setne %al
; SSE2-NEXT: retq
;
@ -614,7 +614,7 @@ define i1 @trunc_v16i32_v16i1(<16 x i32>) {
; SSE41-NEXT: packuswb %xmm2, %xmm0
; SSE41-NEXT: psllw $7, %xmm0
; SSE41-NEXT: pmovmskb %xmm0, %eax
; SSE41-NEXT: testw %ax, %ax
; SSE41-NEXT: testl %eax, %eax
; SSE41-NEXT: setne %al
; SSE41-NEXT: retq
;
@ -630,7 +630,7 @@ define i1 @trunc_v16i32_v16i1(<16 x i32>) {
; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpsllw $7, %xmm0, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: testw %ax, %ax
; AVX1-NEXT: testl %eax, %eax
; AVX1-NEXT: setne %al
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
@ -646,7 +646,7 @@ define i1 @trunc_v16i32_v16i1(<16 x i32>) {
; AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,1,3]
; AVX2-NEXT: vpsllw $7, %xmm0, %xmm0
; AVX2-NEXT: vpmovmskb %xmm0, %eax
; AVX2-NEXT: testw %ax, %ax
; AVX2-NEXT: testl %eax, %eax
; AVX2-NEXT: setne %al
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
@ -677,7 +677,7 @@ define i1 @trunc_v32i16_v32i1(<32 x i16>) {
; SSE-NEXT: por %xmm2, %xmm0
; SSE-NEXT: psllw $7, %xmm0
; SSE-NEXT: pmovmskb %xmm0, %eax
; SSE-NEXT: testw %ax, %ax
; SSE-NEXT: testl %eax, %eax
; SSE-NEXT: setne %al
; SSE-NEXT: retq
;
@ -689,7 +689,7 @@ define i1 @trunc_v32i16_v32i1(<32 x i16>) {
; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpsllw $7, %xmm0, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: testw %ax, %ax
; AVX1-NEXT: testl %eax, %eax
; AVX1-NEXT: setne %al
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
@ -758,7 +758,7 @@ define i1 @trunc_v64i8_v64i1(<64 x i8>) {
; SSE-NEXT: por %xmm0, %xmm1
; SSE-NEXT: psllw $7, %xmm1
; SSE-NEXT: pmovmskb %xmm1, %eax
; SSE-NEXT: testw %ax, %ax
; SSE-NEXT: testl %eax, %eax
; SSE-NEXT: setne %al
; SSE-NEXT: retq
;
@ -769,7 +769,7 @@ define i1 @trunc_v64i8_v64i1(<64 x i8>) {
; AVX1-NEXT: vorps %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpsllw $7, %xmm0, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: testw %ax, %ax
; AVX1-NEXT: testl %eax, %eax
; AVX1-NEXT: setne %al
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
@ -842,7 +842,7 @@ define i1 @icmp_v2i64_v2i1(<2 x i64>) {
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,0,3,2]
; SSE2-NEXT: pand %xmm1, %xmm0
; SSE2-NEXT: movmskpd %xmm0, %eax
; SSE2-NEXT: testb %al, %al
; SSE2-NEXT: testl %eax, %eax
; SSE2-NEXT: setne %al
; SSE2-NEXT: retq
;
@ -851,7 +851,7 @@ define i1 @icmp_v2i64_v2i1(<2 x i64>) {
; SSE41-NEXT: pxor %xmm1, %xmm1
; SSE41-NEXT: pcmpeqq %xmm0, %xmm1
; SSE41-NEXT: movmskpd %xmm1, %eax
; SSE41-NEXT: testb %al, %al
; SSE41-NEXT: testl %eax, %eax
; SSE41-NEXT: setne %al
; SSE41-NEXT: retq
;
@ -860,7 +860,7 @@ define i1 @icmp_v2i64_v2i1(<2 x i64>) {
; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1
; AVX-NEXT: vpcmpeqq %xmm1, %xmm0, %xmm0
; AVX-NEXT: vmovmskpd %xmm0, %eax
; AVX-NEXT: testb %al, %al
; AVX-NEXT: testl %eax, %eax
; AVX-NEXT: setne %al
; AVX-NEXT: retq
;
@ -902,7 +902,7 @@ define i1 @icmp_v4i32_v4i1(<4 x i32>) {
; SSE-NEXT: pxor %xmm1, %xmm1
; SSE-NEXT: pcmpeqd %xmm0, %xmm1
; SSE-NEXT: movmskps %xmm1, %eax
; SSE-NEXT: testb %al, %al
; SSE-NEXT: testl %eax, %eax
; SSE-NEXT: setne %al
; SSE-NEXT: retq
;
@ -911,7 +911,7 @@ define i1 @icmp_v4i32_v4i1(<4 x i32>) {
; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1
; AVX-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
; AVX-NEXT: vmovmskps %xmm0, %eax
; AVX-NEXT: testb %al, %al
; AVX-NEXT: testl %eax, %eax
; AVX-NEXT: setne %al
; AVX-NEXT: retq
;
@ -1006,7 +1006,7 @@ define i1 @icmp_v16i8_v16i1(<16 x i8>) {
; SSE-NEXT: pxor %xmm1, %xmm1
; SSE-NEXT: pcmpeqb %xmm0, %xmm1
; SSE-NEXT: pmovmskb %xmm1, %eax
; SSE-NEXT: testw %ax, %ax
; SSE-NEXT: testl %eax, %eax
; SSE-NEXT: setne %al
; SSE-NEXT: retq
;
@ -1015,7 +1015,7 @@ define i1 @icmp_v16i8_v16i1(<16 x i8>) {
; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1
; AVX-NEXT: vpcmpeqb %xmm1, %xmm0, %xmm0
; AVX-NEXT: vpmovmskb %xmm0, %eax
; AVX-NEXT: testw %ax, %ax
; AVX-NEXT: testl %eax, %eax
; AVX-NEXT: setne %al
; AVX-NEXT: retq
;
@ -1024,7 +1024,7 @@ define i1 @icmp_v16i8_v16i1(<16 x i8>) {
; AVX512F-NEXT: vpxor %xmm1, %xmm1, %xmm1
; AVX512F-NEXT: vpcmpeqb %xmm1, %xmm0, %xmm0
; AVX512F-NEXT: vpmovmskb %xmm0, %eax
; AVX512F-NEXT: testw %ax, %ax
; AVX512F-NEXT: testl %eax, %eax
; AVX512F-NEXT: setne %al
; AVX512F-NEXT: retq
;
@ -1060,7 +1060,7 @@ define i1 @icmp_v4i64_v4i1(<4 x i64>) {
; SSE2-NEXT: pand %xmm0, %xmm1
; SSE2-NEXT: packssdw %xmm3, %xmm1
; SSE2-NEXT: movmskps %xmm1, %eax
; SSE2-NEXT: testb %al, %al
; SSE2-NEXT: testl %eax, %eax
; SSE2-NEXT: setne %al
; SSE2-NEXT: retq
;
@ -1071,7 +1071,7 @@ define i1 @icmp_v4i64_v4i1(<4 x i64>) {
; SSE41-NEXT: pcmpeqq %xmm2, %xmm0
; SSE41-NEXT: packssdw %xmm1, %xmm0
; SSE41-NEXT: movmskps %xmm0, %eax
; SSE41-NEXT: testb %al, %al
; SSE41-NEXT: testl %eax, %eax
; SSE41-NEXT: setne %al
; SSE41-NEXT: retq
;
@ -1083,7 +1083,7 @@ define i1 @icmp_v4i64_v4i1(<4 x i64>) {
; AVX1-NEXT: vpcmpeqq %xmm2, %xmm0, %xmm0
; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVX1-NEXT: vmovmskpd %ymm0, %eax
; AVX1-NEXT: testb %al, %al
; AVX1-NEXT: testl %eax, %eax
; AVX1-NEXT: setne %al
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
@ -1093,7 +1093,7 @@ define i1 @icmp_v4i64_v4i1(<4 x i64>) {
; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
; AVX2-NEXT: vpcmpeqq %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vmovmskpd %ymm0, %eax
; AVX2-NEXT: testb %al, %al
; AVX2-NEXT: testl %eax, %eax
; AVX2-NEXT: setne %al
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
@ -1151,7 +1151,7 @@ define i1 @icmp_v8i32_v8i1(<8 x i32>) {
; AVX1-NEXT: vpcmpeqd %xmm2, %xmm0, %xmm0
; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVX1-NEXT: vmovmskps %ymm0, %eax
; AVX1-NEXT: testb %al, %al
; AVX1-NEXT: testl %eax, %eax
; AVX1-NEXT: setne %al
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
@ -1161,7 +1161,7 @@ define i1 @icmp_v8i32_v8i1(<8 x i32>) {
; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
; AVX2-NEXT: vpcmpeqd %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vmovmskps %ymm0, %eax
; AVX2-NEXT: testb %al, %al
; AVX2-NEXT: testl %eax, %eax
; AVX2-NEXT: setne %al
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
@ -1207,7 +1207,7 @@ define i1 @icmp_v16i16_v16i1(<16 x i16>) {
; SSE-NEXT: pcmpeqw %xmm2, %xmm0
; SSE-NEXT: packsswb %xmm1, %xmm0
; SSE-NEXT: pmovmskb %xmm0, %eax
; SSE-NEXT: testw %ax, %ax
; SSE-NEXT: testl %eax, %eax
; SSE-NEXT: setne %al
; SSE-NEXT: retq
;
@ -1219,7 +1219,7 @@ define i1 @icmp_v16i16_v16i1(<16 x i16>) {
; AVX1-NEXT: vpcmpeqw %xmm2, %xmm0, %xmm0
; AVX1-NEXT: vpacksswb %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: testw %ax, %ax
; AVX1-NEXT: testl %eax, %eax
; AVX1-NEXT: setne %al
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
@ -1274,7 +1274,7 @@ define i1 @icmp_v32i8_v32i1(<32 x i8>) {
; SSE-NEXT: pcmpeqb %xmm2, %xmm0
; SSE-NEXT: por %xmm1, %xmm0
; SSE-NEXT: pmovmskb %xmm0, %eax
; SSE-NEXT: testw %ax, %ax
; SSE-NEXT: testl %eax, %eax
; SSE-NEXT: setne %al
; SSE-NEXT: retq
;
@ -1286,7 +1286,7 @@ define i1 @icmp_v32i8_v32i1(<32 x i8>) {
; AVX1-NEXT: vpcmpeqb %xmm2, %xmm0, %xmm0
; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: testw %ax, %ax
; AVX1-NEXT: testl %eax, %eax
; AVX1-NEXT: setne %al
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
@ -1395,7 +1395,7 @@ define i1 @icmp_v8i64_v8i1(<8 x i64>) {
; AVX1-NEXT: vpackssdw %xmm2, %xmm0, %xmm0
; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVX1-NEXT: vmovmskps %ymm0, %eax
; AVX1-NEXT: testb %al, %al
; AVX1-NEXT: testl %eax, %eax
; AVX1-NEXT: setne %al
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
@ -1407,7 +1407,7 @@ define i1 @icmp_v8i64_v8i1(<8 x i64>) {
; AVX2-NEXT: vpcmpeqq %ymm2, %ymm0, %ymm0
; AVX2-NEXT: vpackssdw %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vmovmskps %ymm0, %eax
; AVX2-NEXT: testb %al, %al
; AVX2-NEXT: testl %eax, %eax
; AVX2-NEXT: setne %al
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
@ -1455,7 +1455,7 @@ define i1 @icmp_v16i32_v16i1(<16 x i32>) {
; SSE-NEXT: packssdw %xmm1, %xmm0
; SSE-NEXT: packsswb %xmm2, %xmm0
; SSE-NEXT: pmovmskb %xmm0, %eax
; SSE-NEXT: testw %ax, %ax
; SSE-NEXT: testl %eax, %eax
; SSE-NEXT: setne %al
; SSE-NEXT: retq
;
@ -1472,7 +1472,7 @@ define i1 @icmp_v16i32_v16i1(<16 x i32>) {
; AVX1-NEXT: vpackssdw %xmm2, %xmm0, %xmm0
; AVX1-NEXT: vpacksswb %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: testw %ax, %ax
; AVX1-NEXT: testl %eax, %eax
; AVX1-NEXT: setne %al
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
@ -1513,7 +1513,7 @@ define i1 @icmp_v32i16_v32i1(<32 x i16>) {
; SSE-NEXT: packsswb %xmm3, %xmm2
; SSE-NEXT: por %xmm0, %xmm2
; SSE-NEXT: pmovmskb %xmm2, %eax
; SSE-NEXT: testw %ax, %ax
; SSE-NEXT: testl %eax, %eax
; SSE-NEXT: setne %al
; SSE-NEXT: retq
;
@ -1530,7 +1530,7 @@ define i1 @icmp_v32i16_v32i1(<32 x i16>) {
; AVX1-NEXT: vpacksswb %xmm2, %xmm0, %xmm0
; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: testw %ax, %ax
; AVX1-NEXT: testl %eax, %eax
; AVX1-NEXT: setne %al
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
@ -1601,7 +1601,7 @@ define i1 @icmp_v64i8_v64i1(<64 x i8>) {
; SSE-NEXT: por %xmm2, %xmm1
; SSE-NEXT: por %xmm0, %xmm1
; SSE-NEXT: pmovmskb %xmm1, %eax
; SSE-NEXT: testw %ax, %ax
; SSE-NEXT: testl %eax, %eax
; SSE-NEXT: setne %al
; SSE-NEXT: retq
;
@ -1618,7 +1618,7 @@ define i1 @icmp_v64i8_v64i1(<64 x i8>) {
; AVX1-NEXT: vpor %xmm0, %xmm3, %xmm0
; AVX1-NEXT: vpor %xmm0, %xmm4, %xmm0
; AVX1-NEXT: vpmovmskb %xmm0, %eax
; AVX1-NEXT: testw %ax, %ax
; AVX1-NEXT: testl %eax, %eax
; AVX1-NEXT: setne %al
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq