forked from OSchip/llvm-project
AArch64: refactor ReconstructShuffle function
Quite a bit of cruft had accumulated as we realised the various different cases it had to handle and squeezed them in where possible. This refactoring mostly flattens the logic and special-cases. The result is slightly longer, but I think clearer. Should be no functionality change. llvm-svn: 213867
This commit is contained in:
Tim Northover
parent
857fd660d8
commit
7324e845a4
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@ -4138,10 +4138,30 @@ SDValue AArch64TargetLowering::ReconstructShuffle(SDValue Op,
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EVT VT = Op.getValueType();
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unsigned NumElts = VT.getVectorNumElements();
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SmallVector<SDValue, 2> SourceVecs;
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SmallVector<unsigned, 2> MinElts;
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SmallVector<unsigned, 2> MaxElts;
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struct ShuffleSourceInfo {
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SDValue Vec;
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unsigned MinElt;
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unsigned MaxElt;
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// We may insert some combination of BITCASTs and VEXT nodes to force Vec to
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// be compatible with the shuffle we intend to construct. As a result
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// ShuffleVec will be some sliding window into the original Vec.
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SDValue ShuffleVec;
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// Code should guarantee that element i in Vec starts at element "WindowBase
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// + i * WindowScale in ShuffleVec".
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int WindowBase;
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int WindowScale;
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bool operator ==(SDValue OtherVec) { return Vec == OtherVec; }
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ShuffleSourceInfo(SDValue Vec)
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: Vec(Vec), MinElt(UINT_MAX), MaxElt(0), ShuffleVec(Vec), WindowBase(0),
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WindowScale(1) {}
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};
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// First gather all vectors used as an immediate source for this BUILD_VECTOR
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// node.
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SmallVector<ShuffleSourceInfo, 2> Sources;
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for (unsigned i = 0; i < NumElts; ++i) {
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SDValue V = Op.getOperand(i);
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if (V.getOpcode() == ISD::UNDEF)
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@ -4152,158 +4172,153 @@ SDValue AArch64TargetLowering::ReconstructShuffle(SDValue Op,
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return SDValue();
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}
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// Record this extraction against the appropriate vector if possible...
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// Add this element source to the list if it's not already there.
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SDValue SourceVec = V.getOperand(0);
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unsigned EltNo = cast<ConstantSDNode>(V.getOperand(1))->getZExtValue();
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bool FoundSource = false;
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for (unsigned j = 0; j < SourceVecs.size(); ++j) {
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if (SourceVecs[j] == SourceVec) {
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if (MinElts[j] > EltNo)
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MinElts[j] = EltNo;
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if (MaxElts[j] < EltNo)
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MaxElts[j] = EltNo;
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FoundSource = true;
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break;
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}
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}
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auto Source = std::find(Sources.begin(), Sources.end(), SourceVec);
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if (Source == Sources.end())
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Sources.push_back(ShuffleSourceInfo(SourceVec));
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// Or record a new source if not...
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if (!FoundSource) {
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SourceVecs.push_back(SourceVec);
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MinElts.push_back(EltNo);
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MaxElts.push_back(EltNo);
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}
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// Update the minimum and maximum lane number seen.
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unsigned EltNo = cast<ConstantSDNode>(V.getOperand(1))->getZExtValue();
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Source->MinElt = std::min(Source->MinElt, EltNo);
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Source->MaxElt = std::max(Source->MaxElt, EltNo);
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}
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// Currently only do something sane when at most two source vectors
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// involved.
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if (SourceVecs.size() > 2)
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// are involved.
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if (Sources.size() > 2)
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return SDValue();
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// Find out the smallest element size among result and two sources, and use
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// it as element size to build the shuffle_vector.
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EVT SmallestEltTy = VT.getVectorElementType();
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for (unsigned i = 0; i < SourceVecs.size(); ++i) {
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EVT SrcEltTy = SourceVecs[i].getValueType().getVectorElementType();
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for (auto &Source : Sources) {
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EVT SrcEltTy = Source.Vec.getValueType().getVectorElementType();
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if (SrcEltTy.bitsLT(SmallestEltTy)) {
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SmallestEltTy = SrcEltTy;
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}
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}
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unsigned ResMultiplier =
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VT.getVectorElementType().getSizeInBits() / SmallestEltTy.getSizeInBits();
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int VEXTOffsets[2] = { 0, 0 };
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int OffsetMultipliers[2] = { 1, 1 };
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NumElts = VT.getSizeInBits() / SmallestEltTy.getSizeInBits();
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EVT ShuffleVT = EVT::getVectorVT(*DAG.getContext(), SmallestEltTy, NumElts);
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SDValue ShuffleSrcs[2] = {DAG.getUNDEF(ShuffleVT), DAG.getUNDEF(ShuffleVT)};
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// This loop extracts the usage patterns of the source vectors
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// and prepares appropriate SDValues for a shuffle if possible.
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for (unsigned i = 0; i < SourceVecs.size(); ++i) {
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unsigned NumSrcElts = SourceVecs[i].getValueType().getVectorNumElements();
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SDValue CurSource = SourceVecs[i];
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if (SourceVecs[i].getValueType().getVectorElementType() !=
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ShuffleVT.getVectorElementType()) {
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// As ShuffleVT holds smallest element size, it may hit here only if
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// the element type of SourceVecs is bigger than that of ShuffleVT.
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// Adjust the element size of SourceVecs to match ShuffleVT, and record
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// the multipliers.
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EVT CastVT = EVT::getVectorVT(
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*DAG.getContext(), ShuffleVT.getVectorElementType(),
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SourceVecs[i].getValueSizeInBits() /
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ShuffleVT.getVectorElementType().getSizeInBits());
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// If the source vector is too wide or too narrow, we may nevertheless be able
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// to construct a compatible shuffle either by concatenating it with UNDEF or
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// extracting a suitable range of elements.
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for (auto &Src : Sources) {
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EVT SrcVT = Src.ShuffleVec.getValueType();
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CurSource = DAG.getNode(ISD::BITCAST, dl, CastVT, SourceVecs[i]);
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OffsetMultipliers[i] = CastVT.getVectorNumElements() / NumSrcElts;
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NumSrcElts *= OffsetMultipliers[i];
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MaxElts[i] *= OffsetMultipliers[i];
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MinElts[i] *= OffsetMultipliers[i];
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}
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if (CurSource.getValueType() == ShuffleVT) {
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// No VEXT necessary
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ShuffleSrcs[i] = CurSource;
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VEXTOffsets[i] = 0;
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if (SrcVT.getSizeInBits() == VT.getSizeInBits())
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continue;
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} else if (NumSrcElts < NumElts) {
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// This stage of the search produces a source with the same element type as
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// the original, but with a total width matching the BUILD_VECTOR output.
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EVT EltVT = SrcVT.getVectorElementType();
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EVT DestVT = EVT::getVectorVT(*DAG.getContext(), EltVT,
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VT.getSizeInBits() / EltVT.getSizeInBits());
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if (SrcVT.getSizeInBits() < VT.getSizeInBits()) {
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assert(2 * SrcVT.getSizeInBits() == VT.getSizeInBits());
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// We can pad out the smaller vector for free, so if it's part of a
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// shuffle...
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ShuffleSrcs[i] =
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DAG.getNode(ISD::CONCAT_VECTORS, dl, ShuffleVT, CurSource,
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DAG.getUNDEF(CurSource.getValueType()));
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Src.ShuffleVec =
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DAG.getNode(ISD::CONCAT_VECTORS, dl, DestVT, Src.ShuffleVec,
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DAG.getUNDEF(Src.ShuffleVec.getValueType()));
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continue;
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}
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// Since only 64-bit and 128-bit vectors are legal on ARM and
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// we've eliminated the other cases...
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assert(NumSrcElts == 2 * NumElts &&
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"unexpected vector sizes in ReconstructShuffle");
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assert(SrcVT.getSizeInBits() == 2 * VT.getSizeInBits());
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if (MaxElts[i] - MinElts[i] >= NumElts) {
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if (Src.MaxElt - Src.MinElt >= NumElts) {
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// Span too large for a VEXT to cope
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return SDValue();
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}
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if (MinElts[i] >= NumElts) {
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if (Src.MinElt >= NumElts) {
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// The extraction can just take the second half
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VEXTOffsets[i] = NumElts;
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ShuffleSrcs[i] = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, ShuffleVT,
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CurSource, DAG.getIntPtrConstant(NumElts));
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} else if (MaxElts[i] < NumElts) {
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Src.ShuffleVec =
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DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DestVT, Src.ShuffleVec,
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DAG.getIntPtrConstant(NumElts));
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Src.WindowBase = -NumElts;
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} else if (Src.MaxElt < NumElts) {
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// The extraction can just take the first half
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VEXTOffsets[i] = 0;
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ShuffleSrcs[i] = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, ShuffleVT,
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CurSource, DAG.getIntPtrConstant(0));
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Src.ShuffleVec = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DestVT,
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Src.ShuffleVec, DAG.getIntPtrConstant(0));
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} else {
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// An actual VEXT is needed
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VEXTOffsets[i] = MinElts[i];
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SDValue VEXTSrc1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, ShuffleVT,
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CurSource, DAG.getIntPtrConstant(0));
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SDValue VEXTSrc2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, ShuffleVT,
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CurSource, DAG.getIntPtrConstant(NumElts));
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unsigned Imm = VEXTOffsets[i] * getExtFactor(VEXTSrc1);
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ShuffleSrcs[i] = DAG.getNode(AArch64ISD::EXT, dl, ShuffleVT, VEXTSrc1,
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SDValue VEXTSrc1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DestVT,
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Src.ShuffleVec, DAG.getIntPtrConstant(0));
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SDValue VEXTSrc2 =
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DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DestVT, Src.ShuffleVec,
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DAG.getIntPtrConstant(NumElts));
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unsigned Imm = Src.MinElt * getExtFactor(VEXTSrc1);
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Src.ShuffleVec = DAG.getNode(AArch64ISD::EXT, dl, DestVT, VEXTSrc1,
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VEXTSrc2, DAG.getConstant(Imm, MVT::i32));
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Src.WindowBase = -Src.MinElt;
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}
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}
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SmallVector<int, 8> Mask;
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unsigned VTEltSize = VT.getVectorElementType().getSizeInBits();
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// Another possible incompatibility occurs from the vector element types. We
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// can fix this by bitcasting the source vectors to the same type we intend
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// for the shuffle.
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for (auto &Src : Sources) {
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EVT SrcEltTy = Src.ShuffleVec.getValueType().getVectorElementType();
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if (SrcEltTy == SmallestEltTy)
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continue;
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assert(ShuffleVT.getVectorElementType() == SmallestEltTy);
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Src.ShuffleVec = DAG.getNode(ISD::BITCAST, dl, ShuffleVT, Src.ShuffleVec);
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Src.WindowScale = SrcEltTy.getSizeInBits() / SmallestEltTy.getSizeInBits();
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Src.WindowBase *= Src.WindowScale;
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}
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// Final sanity check before we try to actually produce a shuffle.
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DEBUG(
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for (auto Src : Sources)
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assert(Src.ShuffleVec.getValueType() == ShuffleVT);
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);
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// The stars all align, our next step is to produce the mask for the shuffle.
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SmallVector<int, 8> Mask(ShuffleVT.getVectorNumElements(), -1);
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int BitsPerShuffleLane = ShuffleVT.getVectorElementType().getSizeInBits();
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for (unsigned i = 0; i < VT.getVectorNumElements(); ++i) {
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SDValue Entry = Op.getOperand(i);
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int SourceNum = 1;
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unsigned LanePartNum = 0;
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int ExtractElt;
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if (Entry.getOpcode() != ISD::UNDEF) {
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// Check how many parts of source lane should be inserted.
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SDValue ExtractVec = Entry.getOperand(0);
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if (ExtractVec == SourceVecs[0])
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SourceNum = 0;
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ExtractElt = cast<ConstantSDNode>(Entry.getOperand(1))->getSExtValue();
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unsigned ExtEltSize =
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ExtractVec.getValueType().getVectorElementType().getSizeInBits();
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unsigned SmallerSize = ExtEltSize < VTEltSize ? ExtEltSize : VTEltSize;
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LanePartNum = SmallerSize / SmallestEltTy.getSizeInBits();
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}
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if (Entry.getOpcode() == ISD::UNDEF)
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continue;
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for (unsigned j = 0; j != ResMultiplier; ++j) {
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if (j < LanePartNum)
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Mask.push_back(ExtractElt * OffsetMultipliers[SourceNum] +
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NumElts * SourceNum - VEXTOffsets[SourceNum] + j);
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else
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Mask.push_back(-1);
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}
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auto Src = std::find(Sources.begin(), Sources.end(), Entry.getOperand(0));
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int EltNo = cast<ConstantSDNode>(Entry.getOperand(1))->getSExtValue();
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// EXTRACT_VECTOR_ELT performs an implicit any_ext; BUILD_VECTOR an implicit
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// trunc. So only std::min(SrcBits, DestBits) actually get defined in this
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// segment.
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EVT OrigEltTy = Entry.getOperand(0).getValueType().getVectorElementType();
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int BitsDefined = std::min(OrigEltTy.getSizeInBits(),
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VT.getVectorElementType().getSizeInBits());
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int LanesDefined = BitsDefined / BitsPerShuffleLane;
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// This source is expected to fill ResMultiplier lanes of the final shuffle,
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// starting at the appropriate offset.
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int *LaneMask = &Mask[i * ResMultiplier];
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int ExtractBase = EltNo * Src->WindowScale + Src->WindowBase;
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ExtractBase += NumElts * (Src - Sources.begin());
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for (int j = 0; j < LanesDefined; ++j)
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LaneMask[j] = ExtractBase + j;
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}
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// Final check before we try to produce nonsense...
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if (isShuffleMaskLegal(Mask, ShuffleVT)) {
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SDValue Shuffle = DAG.getVectorShuffle(ShuffleVT, dl, ShuffleSrcs[0],
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ShuffleSrcs[1], &Mask[0]);
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return DAG.getNode(ISD::BITCAST, dl, VT, Shuffle);
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}
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if (!isShuffleMaskLegal(Mask, ShuffleVT))
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return SDValue();
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return SDValue();
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SDValue ShuffleOps[] = { DAG.getUNDEF(ShuffleVT), DAG.getUNDEF(ShuffleVT) };
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for (unsigned i = 0; i < Sources.size(); ++i)
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ShuffleOps[i] = Sources[i].ShuffleVec;
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SDValue Shuffle = DAG.getVectorShuffle(ShuffleVT, dl, ShuffleOps[0],
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ShuffleOps[1], &Mask[0]);
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return DAG.getNode(ISD::BITCAST, dl, VT, Shuffle);
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}
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// check if an EXT instruction can handle the shuffle mask when the
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