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AMDGPU: Implement ReverseBranchCondition 

llvm-svn: 270296
This commit is contained in:
Matt Arsenault 2016-05-21 00:29:34 +00:00
parent 6d09380532
commit 72fcd5f597
3 changed files with 12 additions and 6 deletions
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7
llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
View File

@ -1166,6 +1166,13 @@ unsigned SIInstrInfo::InsertBranch(MachineBasicBlock &MBB,
return 2;
}
bool SIInstrInfo::ReverseBranchCondition(
SmallVectorImpl<MachineOperand> &Cond) const {
assert(Cond.size() == 1);
Cond[0].setImm(-Cond[0].getImm());
return false;
}
static void removeModOperands(MachineInstr &MI) {
unsigned Opc = MI.getOpcode();
int Src0ModIdx = AMDGPU::getNamedOperandIdx(Opc,

3
llvm/lib/Target/AMDGPU/SIInstrInfo.h
View File

@ -157,6 +157,9 @@ public:
MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
DebugLoc DL) const override;
bool ReverseBranchCondition(
SmallVectorImpl<MachineOperand> &Cond) const override;
bool areMemAccessesTriviallyDisjoint(
MachineInstr *MIa, MachineInstr *MIb,
AliasAnalysis *AA = nullptr) const override;

8
llvm/test/CodeGen/AMDGPU/uniform-cfg.ll
View File

@ -168,10 +168,8 @@ endif:
; SI-LABEL: {{^}}uniform_if_else_ret:
; SI: s_cmp_lg_i32 s{{[0-9]+}}, 0
; SI-NEXT: s_cbranch_scc1 [[ELSE_LABEL:[0-9_A-Za-z]+]]
; SI-NEXT: s_branch [[IF_LABEL:[0-9_A-Za-z]+]]
; SI-NEXT: s_cbranch_scc0 [[IF_LABEL:[0-9_A-Za-z]+]]
; SI: [[ELSE_LABEL]]:
; SI: v_mov_b32_e32 [[TWO:v[0-9]+]], 2
; SI: buffer_store_dword [[TWO]]
; SI: s_endpgm
@ -199,10 +197,8 @@ if.end: ; preds = %if.else, %if.then
; SI-LABEL: {{^}}uniform_if_else:
; SI: s_cmp_lg_i32 s{{[0-9]+}}, 0
; SI-NEXT: s_cbranch_scc1 [[ELSE_LABEL:[0-9_A-Za-z]+]]
; SI-NEXT: s_branch [[IF_LABEL:[0-9_A-Za-z]+]]
; SI-NEXT: s_cbranch_scc0 [[IF_LABEL:[0-9_A-Za-z]+]]
; SI: [[ELSE_LABEL]]:
; SI: v_mov_b32_e32 [[TWO:v[0-9]+]], 2
; SI: buffer_store_dword [[TWO]]
; SI: s_branch [[ENDIF_LABEL:[0-9_A-Za-z]+]]