forked from OSchip/llvm-project
[X86] Change rounding parameter of all the AVX512 builtins to an ICE.
llvm-svn: 227712
This commit is contained in:
parent
d6f73ac366
commit
72c7d51251
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@ -738,12 +738,12 @@ BUILTIN(__builtin_ia32_vfmaddsubps256, "V8fV8fV8fV8f", "")
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BUILTIN(__builtin_ia32_vfmaddsubpd256, "V4dV4dV4dV4d", "")
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BUILTIN(__builtin_ia32_vfmsubaddps256, "V8fV8fV8fV8f", "")
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BUILTIN(__builtin_ia32_vfmsubaddpd256, "V4dV4dV4dV4d", "")
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BUILTIN(__builtin_ia32_vfmaddpd512_mask, "V8dV8dV8dV8dUci", "")
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BUILTIN(__builtin_ia32_vfmsubpd512_mask, "V8dV8dV8dV8dUci", "")
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BUILTIN(__builtin_ia32_vfnmaddpd512_mask, "V8dV8dV8dV8dUci", "")
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BUILTIN(__builtin_ia32_vfmaddps512_mask, "V16fV16fV16fV16fUsi", "")
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BUILTIN(__builtin_ia32_vfmsubps512_mask, "V16fV16fV16fV16fUsi", "")
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BUILTIN(__builtin_ia32_vfnmaddps512_mask, "V16fV16fV16fV16fUsi", "")
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BUILTIN(__builtin_ia32_vfmaddpd512_mask, "V8dV8dV8dV8dUcIi", "")
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BUILTIN(__builtin_ia32_vfmsubpd512_mask, "V8dV8dV8dV8dUcIi", "")
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BUILTIN(__builtin_ia32_vfnmaddpd512_mask, "V8dV8dV8dV8dUcIi", "")
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BUILTIN(__builtin_ia32_vfmaddps512_mask, "V16fV16fV16fV16fUsIi", "")
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BUILTIN(__builtin_ia32_vfmsubps512_mask, "V16fV16fV16fV16fUsIi", "")
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BUILTIN(__builtin_ia32_vfnmaddps512_mask, "V16fV16fV16fV16fUsIi", "")
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// XOP
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BUILTIN(__builtin_ia32_vpmacssww, "V8sV8sV8sV8s", "")
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@ -820,29 +820,29 @@ BUILTIN(__builtin_ia32_rdtsc, "ULLi", "")
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BUILTIN(__builtin_ia32_rdtscp, "ULLiUi*", "")
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// AVX-512
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BUILTIN(__builtin_ia32_sqrtpd512_mask, "V8dV8dV8dUciC", "")
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BUILTIN(__builtin_ia32_sqrtps512_mask, "V16fV16fV16fUsiC", "")
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BUILTIN(__builtin_ia32_sqrtpd512_mask, "V8dV8dV8dUcIi", "")
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BUILTIN(__builtin_ia32_sqrtps512_mask, "V16fV16fV16fUsIi", "")
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BUILTIN(__builtin_ia32_rsqrt14sd_mask, "V2dV2dV2dV2dUc", "")
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BUILTIN(__builtin_ia32_rsqrt14ss_mask, "V4fV4fV4fV4fUc", "")
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BUILTIN(__builtin_ia32_rsqrt14pd512_mask, "V8dV8dV8dUc", "")
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BUILTIN(__builtin_ia32_rsqrt14ps512_mask, "V16fV16fV16fUs", "")
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BUILTIN(__builtin_ia32_rsqrt28sd_mask, "V2dV2dV2dV2dUciC", "")
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BUILTIN(__builtin_ia32_rsqrt28ss_mask, "V4fV4fV4fV4fUciC", "")
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BUILTIN(__builtin_ia32_rsqrt28pd_mask, "V8dV8dV8dUciC", "")
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BUILTIN(__builtin_ia32_rsqrt28ps_mask, "V16fV16fV16fUsiC", "")
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BUILTIN(__builtin_ia32_rsqrt28sd_mask, "V2dV2dV2dV2dUcIi", "")
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BUILTIN(__builtin_ia32_rsqrt28ss_mask, "V4fV4fV4fV4fUcIi", "")
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BUILTIN(__builtin_ia32_rsqrt28pd_mask, "V8dV8dV8dUcIi", "")
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BUILTIN(__builtin_ia32_rsqrt28ps_mask, "V16fV16fV16fUsIi", "")
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BUILTIN(__builtin_ia32_rcp14sd_mask, "V2dV2dV2dV2dUc", "")
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BUILTIN(__builtin_ia32_rcp14ss_mask, "V4fV4fV4fV4fUc", "")
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BUILTIN(__builtin_ia32_rcp14pd512_mask, "V8dV8dV8dUc", "")
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BUILTIN(__builtin_ia32_rcp14ps512_mask, "V16fV16fV16fUs", "")
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BUILTIN(__builtin_ia32_rcp28sd_mask, "V2dV2dV2dV2dUciC", "")
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BUILTIN(__builtin_ia32_rcp28ss_mask, "V4fV4fV4fV4fUciC", "")
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BUILTIN(__builtin_ia32_rcp28pd_mask, "V8dV8dV8dUciC", "")
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BUILTIN(__builtin_ia32_rcp28ps_mask, "V16fV16fV16fUsiC", "")
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BUILTIN(__builtin_ia32_cvttps2dq512_mask, "V16iV16fV16iUsiC", "")
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BUILTIN(__builtin_ia32_cvttps2udq512_mask, "V16iV16fV16iUsiC", "")
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BUILTIN(__builtin_ia32_cvttpd2dq512_mask, "V8iV8dV8iUciC", "")
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BUILTIN(__builtin_ia32_cvttpd2udq512_mask, "V8iV8dV8iUciC", "")
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BUILTIN(__builtin_ia32_cmpps512_mask, "UsV16fV16fIcUsi", "")
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BUILTIN(__builtin_ia32_rcp28sd_mask, "V2dV2dV2dV2dUcIi", "")
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BUILTIN(__builtin_ia32_rcp28ss_mask, "V4fV4fV4fV4fUcIi", "")
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BUILTIN(__builtin_ia32_rcp28pd_mask, "V8dV8dV8dUcIi", "")
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BUILTIN(__builtin_ia32_rcp28ps_mask, "V16fV16fV16fUsIi", "")
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BUILTIN(__builtin_ia32_cvttps2dq512_mask, "V16iV16fV16iUsIi", "")
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BUILTIN(__builtin_ia32_cvttps2udq512_mask, "V16iV16fV16iUsIi", "")
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BUILTIN(__builtin_ia32_cvttpd2dq512_mask, "V8iV8dV8iUcIi", "")
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BUILTIN(__builtin_ia32_cvttpd2udq512_mask, "V8iV8dV8iUcIi", "")
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BUILTIN(__builtin_ia32_cmpps512_mask, "UsV16fV16fIcUsIi", "")
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BUILTIN(__builtin_ia32_pcmpeqb512_mask, "LLiV64cV64cLLi", "")
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BUILTIN(__builtin_ia32_pcmpeqd512_mask, "sV16iV16is", "")
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BUILTIN(__builtin_ia32_pcmpeqq512_mask, "cV8LLiV8LLic", "")
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@ -867,24 +867,24 @@ BUILTIN(__builtin_ia32_pcmpgtb128_mask, "sV16cV16cs", "")
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BUILTIN(__builtin_ia32_pcmpgtd128_mask, "cV4iV4ic", "")
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BUILTIN(__builtin_ia32_pcmpgtq128_mask, "cV2LLiV2LLic", "")
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BUILTIN(__builtin_ia32_pcmpgtw128_mask, "cV8sV8sc", "")
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BUILTIN(__builtin_ia32_cmppd512_mask, "UcV8dV8dIcUci", "")
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BUILTIN(__builtin_ia32_rndscaleps_mask, "V16fV16fiCV16fUsiC", "")
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BUILTIN(__builtin_ia32_rndscalepd_mask, "V8dV8diCV8dUciC", "")
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BUILTIN(__builtin_ia32_cvtps2dq512_mask, "V16iV16fV16iUsiC", "")
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BUILTIN(__builtin_ia32_cvtpd2dq512_mask, "V8iV8dV8iUciC", "")
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BUILTIN(__builtin_ia32_cvtps2udq512_mask, "V16iV16fV16iUsiC", "")
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BUILTIN(__builtin_ia32_cvtpd2udq512_mask, "V8iV8dV8iUciC", "")
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BUILTIN(__builtin_ia32_minps512_mask, "V16fV16fV16fV16fUsiC", "")
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BUILTIN(__builtin_ia32_minpd512_mask, "V8dV8dV8dV8dUciC", "")
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BUILTIN(__builtin_ia32_maxps512_mask, "V16fV16fV16fV16fUsiC", "")
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BUILTIN(__builtin_ia32_maxpd512_mask, "V8dV8dV8dV8dUciC", "")
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BUILTIN(__builtin_ia32_cvtdq2ps512_mask, "V16fV16iV16fUsiC", "")
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BUILTIN(__builtin_ia32_cvtudq2ps512_mask, "V16fV16iV16fUsiC", "")
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BUILTIN(__builtin_ia32_cmppd512_mask, "UcV8dV8dIcUcIi", "")
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BUILTIN(__builtin_ia32_rndscaleps_mask, "V16fV16fIiV16fUsIi", "")
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BUILTIN(__builtin_ia32_rndscalepd_mask, "V8dV8dIiV8dUcIi", "")
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BUILTIN(__builtin_ia32_cvtps2dq512_mask, "V16iV16fV16iUsIi", "")
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BUILTIN(__builtin_ia32_cvtpd2dq512_mask, "V8iV8dV8iUcIi", "")
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BUILTIN(__builtin_ia32_cvtps2udq512_mask, "V16iV16fV16iUsIi", "")
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BUILTIN(__builtin_ia32_cvtpd2udq512_mask, "V8iV8dV8iUcIi", "")
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BUILTIN(__builtin_ia32_minps512_mask, "V16fV16fV16fV16fUsIi", "")
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BUILTIN(__builtin_ia32_minpd512_mask, "V8dV8dV8dV8dUcIi", "")
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BUILTIN(__builtin_ia32_maxps512_mask, "V16fV16fV16fV16fUsIi", "")
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BUILTIN(__builtin_ia32_maxpd512_mask, "V8dV8dV8dV8dUcIi", "")
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BUILTIN(__builtin_ia32_cvtdq2ps512_mask, "V16fV16iV16fUsIi", "")
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BUILTIN(__builtin_ia32_cvtudq2ps512_mask, "V16fV16iV16fUsIi", "")
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BUILTIN(__builtin_ia32_cvtdq2pd512_mask, "V8dV8iV8dUc", "")
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BUILTIN(__builtin_ia32_cvtudq2pd512_mask, "V8dV8iV8dUc", "")
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BUILTIN(__builtin_ia32_cvtpd2ps512_mask, "V8fV8dV8fUciC", "")
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BUILTIN(__builtin_ia32_vcvtps2ph512_mask, "V16sV16fiCV16sUs", "")
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BUILTIN(__builtin_ia32_vcvtph2ps512_mask, "V16fV16sV16fUsiC", "")
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BUILTIN(__builtin_ia32_cvtpd2ps512_mask, "V8fV8dV8fUcIi", "")
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BUILTIN(__builtin_ia32_vcvtps2ph512_mask, "V16sV16fIiV16sUs", "")
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BUILTIN(__builtin_ia32_vcvtph2ps512_mask, "V16fV16sV16fUsIi", "")
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BUILTIN(__builtin_ia32_pabsd512_mask, "V16iV16iV16iUs", "")
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BUILTIN(__builtin_ia32_pabsq512_mask, "V8LLiV8LLiV8LLiUc", "")
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BUILTIN(__builtin_ia32_pmaxsd512_mask, "V16iV16iV16iV16iUs", "")
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@ -492,20 +492,13 @@ _mm512_abs_epi32(__m512i __A)
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(__mmask16) -1);
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}
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static __inline __m512 __attribute__ ((__always_inline__, __nodebug__))
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_mm512_roundscale_ps(__m512 __A, const int __imm)
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{
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return (__m512) __builtin_ia32_rndscaleps_mask ((__v16sf) __A, __imm,
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(__v16sf) __A, -1,
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_MM_FROUND_CUR_DIRECTION);
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}
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static __inline __m512d __attribute__ ((__always_inline__, __nodebug__))
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_mm512_roundscale_pd(__m512d __A, const int __imm)
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{
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return (__m512d) __builtin_ia32_rndscalepd_mask ((__v8df) __A, __imm,
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(__v8df) __A, -1,
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_MM_FROUND_CUR_DIRECTION);
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}
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#define _mm512_roundscale_ps(A, B) __extension__ ({ \
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(__m512)__builtin_ia32_rndscaleps_mask((__v16sf)(A), (B), (__v16sf)(A), \
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-1, _MM_FROUND_CUR_DIRECTION); })
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#define _mm512_roundscale_pd(A, B) __extension__ ({ \
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(__m512d)__builtin_ia32_rndscalepd_mask((__v8df)(A), (B), (__v8df)(A), \
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-1, _MM_FROUND_CUR_DIRECTION); })
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static __inline__ __m512d __attribute__((__always_inline__, __nodebug__))
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_mm512_fmadd_pd(__m512d __A, __m512d __B, __m512d __C)
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@ -713,25 +706,15 @@ _mm512_cvttps_epu32(__m512 __A)
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_MM_FROUND_CUR_DIRECTION);
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}
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static __inline __m512 __attribute__ (( __always_inline__, __nodebug__))
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_mm512_cvt_roundepi32_ps(__m512i __A, const int __R)
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{
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return (__m512) __builtin_ia32_cvtdq2ps512_mask ((__v16si) __A,
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(__v16sf)
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_mm512_setzero_ps (),
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(__mmask16) -1,
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__R);
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}
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#define _mm512_cvt_roundepi32_ps(A, R) __extension__ ({ \
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(__m512)__builtin_ia32_cvtdq2ps512_mask((__v16si)(A), \
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(__v16sf)_mm512_setzero_ps(), \
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(__mmask16)-1, (R)); })
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static __inline __m512 __attribute__ (( __always_inline__, __nodebug__))
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_mm512_cvt_roundepu32_ps(__m512i __A, const int __R)
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{
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return (__m512) __builtin_ia32_cvtudq2ps512_mask ((__v16si) __A,
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(__v16sf)
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_mm512_setzero_ps (),
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(__mmask16) -1,
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__R);
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}
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#define _mm512_cvt_roundepu32_ps(A, R) __extension__ ({ \
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(__m512)__builtin_ia32_cvtudq2ps512_mask((__v16si)(A), \
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(__v16sf)_mm512_setzero_ps(), \
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(__mmask16)-1, (R)); })
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static __inline __m512d __attribute__ (( __always_inline__, __nodebug__))
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_mm512_cvtepi32_pd(__m256i __A)
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@ -750,25 +733,16 @@ _mm512_cvtepu32_pd(__m256i __A)
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_mm512_setzero_pd (),
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(__mmask8) -1);
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}
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static __inline __m256 __attribute__ (( __always_inline__, __nodebug__))
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_mm512_cvt_roundpd_ps(__m512d __A, const int __R)
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{
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return (__m256) __builtin_ia32_cvtpd2ps512_mask ((__v8df) __A,
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(__v8sf)
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_mm256_setzero_ps (),
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(__mmask8) -1,
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__R);
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}
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static __inline __m256i __attribute__ ((__always_inline__, __nodebug__))
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_mm512_cvtps_ph(__m512 __A, const int __I)
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{
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return (__m256i) __builtin_ia32_vcvtps2ph512_mask ((__v16sf) __A,
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__I,
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(__v16hi)
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_mm256_setzero_si256 (),
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-1);
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}
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#define _mm512_cvt_roundpd_ps(A, R) __extension__ ({ \
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(__m256)__builtin_ia32_cvtpd2ps512_mask((__v8df)(A), \
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(__v8sf)_mm256_setzero_ps(), \
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(__mmask8)-1, (R)); })
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#define _mm512_cvtps_ph(A, I) __extension__ ({ \
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(__m256i)__builtin_ia32_vcvtps2ph512_mask((__v16sf)(A), (I), \
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(__v16hi)_mm256_setzero_si256(), \
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-1); })
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static __inline __m512 __attribute__ ((__always_inline__, __nodebug__))
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_mm512_cvtph_ps(__m256i __A)
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@ -798,61 +772,35 @@ _mm512_cvttpd_epi32(__m512d a)
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_MM_FROUND_CUR_DIRECTION);
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}
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static __inline __m256i __attribute__ ((__always_inline__, __nodebug__))
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_mm512_cvtt_roundpd_epi32(__m512d __A, const int __R)
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{
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return (__m256i) __builtin_ia32_cvttpd2dq512_mask ((__v8df) __A,
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(__v8si)
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_mm256_setzero_si256 (),
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(__mmask8) -1,
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__R);
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}
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static __inline __m512i __attribute__ ((__always_inline__, __nodebug__))
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_mm512_cvtt_roundps_epi32(__m512 __A, const int __R)
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{
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return (__m512i) __builtin_ia32_cvttps2dq512_mask ((__v16sf) __A,
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(__v16si)
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_mm512_setzero_si512 (),
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(__mmask16) -1,
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__R);
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}
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#define _mm512_cvtt_roundpd_epi32(A, R) __extension__ ({ \
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(__m256i)__builtin_ia32_cvttpd2dq512_mask((__v8df)(A), \
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(__v8si)_mm256_setzero_si256(), \
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(__mmask8)-1, (R)); })
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static __inline __m512i __attribute__ ((__always_inline__, __nodebug__))
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_mm512_cvt_roundps_epi32(__m512 __A, const int __R)
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{
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return (__m512i) __builtin_ia32_cvtps2dq512_mask ((__v16sf) __A,
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(__v16si)
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_mm512_setzero_si512 (),
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(__mmask16) -1,
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__R);
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}
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static __inline __m256i __attribute__ ((__always_inline__, __nodebug__))
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_mm512_cvt_roundpd_epi32(__m512d __A, const int __R)
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{
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return (__m256i) __builtin_ia32_cvtpd2dq512_mask ((__v8df) __A,
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(__v8si)
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_mm256_setzero_si256 (),
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(__mmask8) -1,
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__R);
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}
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static __inline __m512i __attribute__ ((__always_inline__, __nodebug__))
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_mm512_cvt_roundps_epu32(__m512 __A, const int __R)
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{
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return (__m512i) __builtin_ia32_cvtps2udq512_mask ((__v16sf) __A,
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(__v16si)
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_mm512_setzero_si512 (),
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(__mmask16) -1,
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__R);
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}
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static __inline __m256i __attribute__ ((__always_inline__, __nodebug__))
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_mm512_cvt_roundpd_epu32(__m512d __A, const int __R)
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{
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return (__m256i) __builtin_ia32_cvtpd2udq512_mask ((__v8df) __A,
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(__v8si)
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_mm256_setzero_si256 (),
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(__mmask8) -1,
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__R);
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}
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#define _mm512_cvtt_roundps_epi32(A, R) __extension__ ({ \
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(__m512i)__builtin_ia32_cvttps2dq512_mask((__v16sf)(A), \
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(__v16si)_mm512_setzero_si512(), \
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(__mmask16)-1, (R)); })
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#define _mm512_cvt_roundps_epi32(A, R) __extension__ ({ \
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(__m512i)__builtin_ia32_cvtps2dq512_mask((__v16sf)(A), \
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(__v16si)_mm512_setzero_si512(), \
|
||||
(__mmask16)-1, (R)); })
|
||||
|
||||
#define _mm512_cvt_roundpd_epi32(A, R) __extension__ ({ \
|
||||
(__m256i)__builtin_ia32_cvtpd2dq512_mask((__v8df)(A), \
|
||||
(__v8si)_mm256_setzero_si256(), \
|
||||
(__mmask8)-1, (R)); })
|
||||
|
||||
#define _mm512_cvt_roundps_epu32(A, R) __extension__ ({ \
|
||||
(__m512i)__builtin_ia32_cvtps2udq512_mask((__v16sf)(A), \
|
||||
(__v16si)_mm512_setzero_si512(), \
|
||||
(__mmask16)-1, (R)); })
|
||||
|
||||
#define _mm512_cvt_roundpd_epu32(A, R) __extension__ ({ \
|
||||
(__m256i)__builtin_ia32_cvtpd2udq512_mask((__v8df)(A), \
|
||||
(__v8si)_mm256_setzero_si256(), \
|
||||
(__mmask8) -1, (R)); })
|
||||
|
||||
/* Unpack and Interleave */
|
||||
static __inline __m512d __attribute__((__always_inline__, __nodebug__))
|
||||
|
|
Loading…
Reference in New Issue