forked from OSchip/llvm-project
Revert "Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem). "
This reverts commit r192351. The LLVM side broke the build and the Clang tests will inevitably fail without it. llvm-svn: 192356
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@ -497,26 +497,6 @@ def VFMA : SInst<"vfma", "dddd", "fQf">;
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let isA64 = 1 in {
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////////////////////////////////////////////////////////////////////////////////
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// Load/Store
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// With additional QUl, Ql, Qd type.
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def LD1 : WInst<"vld1", "dc",
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"QUcQUsQUiQUlQcQsQiQlQhQfQdQPcQPsUcUsUiUlcsilhfdPcPs">;
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def LD2 : WInst<"vld2", "2c",
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"QUcQUsQUiQUlQcQsQiQlQhQfQdQPcQPsUcUsUiUlcsilhfdPcPs">;
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def LD3 : WInst<"vld3", "3c",
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"QUcQUsQUiQUlQcQsQiQlQhQfQdQPcQPsUcUsUiUlcsilhfdPcPs">;
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def LD4 : WInst<"vld4", "4c",
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"QUcQUsQUiQUlQcQsQiQlQhQfQdQPcQPsUcUsUiUlcsilhfdPcPs">;
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def ST1 : WInst<"vst1", "vpd",
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"QUcQUsQUiQUlQcQsQiQlQhQfQdQPcQPsUcUsUiUlcsilhfdPcPs">;
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def ST2 : WInst<"vst2", "vp2",
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"QUcQUsQUiQUlQcQsQiQlQhQfQdQPcQPsUcUsUiUlcsilhfdPcPs">;
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def ST3 : WInst<"vst3", "vp3",
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"QUcQUsQUiQUlQcQsQiQlQhQfQdQPcQPsUcUsUiUlcsilhfdPcPs">;
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def ST4 : WInst<"vst4", "vp4",
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"QUcQUsQUiQUlQcQsQiQlQhQfQdQPcQPsUcUsUiUlcsilhfdPcPs">;
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////////////////////////////////////////////////////////////////////////////////
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// Addition
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// With additional Qd type.
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@ -2345,40 +2345,6 @@ Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID,
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return EmitNeonCall(F, Ops, "vcvt_n");
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}
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// Load/Store
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case AArch64::BI__builtin_neon_vld1_v:
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return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vld1_v, E);
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case AArch64::BI__builtin_neon_vld1q_v:
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return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vld1q_v, E);
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case AArch64::BI__builtin_neon_vld2_v:
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return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vld2_v, E);
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case AArch64::BI__builtin_neon_vld2q_v:
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return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vld2q_v, E);
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case AArch64::BI__builtin_neon_vld3_v:
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return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vld3_v, E);
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case AArch64::BI__builtin_neon_vld3q_v:
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return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vld3q_v, E);
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case AArch64::BI__builtin_neon_vld4_v:
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return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vld4_v, E);
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case AArch64::BI__builtin_neon_vld4q_v:
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return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vld4q_v, E);
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case AArch64::BI__builtin_neon_vst1_v:
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return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vst1_v, E);
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case AArch64::BI__builtin_neon_vst1q_v:
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return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vst1q_v, E);
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case AArch64::BI__builtin_neon_vst2_v:
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return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vst2_v, E);
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case AArch64::BI__builtin_neon_vst2q_v:
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return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vst2q_v, E);
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case AArch64::BI__builtin_neon_vst3_v:
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return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vst3_v, E);
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case AArch64::BI__builtin_neon_vst3q_v:
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return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vst3q_v, E);
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case AArch64::BI__builtin_neon_vst4_v:
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return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vst4_v, E);
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case AArch64::BI__builtin_neon_vst4q_v:
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return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vst4q_v, E);
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// AArch64-only builtins
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case AArch64::BI__builtin_neon_vfma_lane_v:
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case AArch64::BI__builtin_neon_vfmaq_laneq_v: {
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