Revert "Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem). "

This reverts commit r192351. The LLVM side broke the build and the Clang tests
will inevitably fail without it.

llvm-svn: 192356
This commit is contained in:
Tim Northover 2013-10-10 16:00:08 +00:00
parent fbb194ff34
commit 72ace5cf12
3 changed files with 0 additions and 1406 deletions

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@ -497,26 +497,6 @@ def VFMA : SInst<"vfma", "dddd", "fQf">;
let isA64 = 1 in {
////////////////////////////////////////////////////////////////////////////////
// Load/Store
// With additional QUl, Ql, Qd type.
def LD1 : WInst<"vld1", "dc",
"QUcQUsQUiQUlQcQsQiQlQhQfQdQPcQPsUcUsUiUlcsilhfdPcPs">;
def LD2 : WInst<"vld2", "2c",
"QUcQUsQUiQUlQcQsQiQlQhQfQdQPcQPsUcUsUiUlcsilhfdPcPs">;
def LD3 : WInst<"vld3", "3c",
"QUcQUsQUiQUlQcQsQiQlQhQfQdQPcQPsUcUsUiUlcsilhfdPcPs">;
def LD4 : WInst<"vld4", "4c",
"QUcQUsQUiQUlQcQsQiQlQhQfQdQPcQPsUcUsUiUlcsilhfdPcPs">;
def ST1 : WInst<"vst1", "vpd",
"QUcQUsQUiQUlQcQsQiQlQhQfQdQPcQPsUcUsUiUlcsilhfdPcPs">;
def ST2 : WInst<"vst2", "vp2",
"QUcQUsQUiQUlQcQsQiQlQhQfQdQPcQPsUcUsUiUlcsilhfdPcPs">;
def ST3 : WInst<"vst3", "vp3",
"QUcQUsQUiQUlQcQsQiQlQhQfQdQPcQPsUcUsUiUlcsilhfdPcPs">;
def ST4 : WInst<"vst4", "vp4",
"QUcQUsQUiQUlQcQsQiQlQhQfQdQPcQPsUcUsUiUlcsilhfdPcPs">;
////////////////////////////////////////////////////////////////////////////////
// Addition
// With additional Qd type.

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@ -2345,40 +2345,6 @@ Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID,
return EmitNeonCall(F, Ops, "vcvt_n");
}
// Load/Store
case AArch64::BI__builtin_neon_vld1_v:
return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vld1_v, E);
case AArch64::BI__builtin_neon_vld1q_v:
return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vld1q_v, E);
case AArch64::BI__builtin_neon_vld2_v:
return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vld2_v, E);
case AArch64::BI__builtin_neon_vld2q_v:
return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vld2q_v, E);
case AArch64::BI__builtin_neon_vld3_v:
return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vld3_v, E);
case AArch64::BI__builtin_neon_vld3q_v:
return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vld3q_v, E);
case AArch64::BI__builtin_neon_vld4_v:
return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vld4_v, E);
case AArch64::BI__builtin_neon_vld4q_v:
return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vld4q_v, E);
case AArch64::BI__builtin_neon_vst1_v:
return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vst1_v, E);
case AArch64::BI__builtin_neon_vst1q_v:
return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vst1q_v, E);
case AArch64::BI__builtin_neon_vst2_v:
return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vst2_v, E);
case AArch64::BI__builtin_neon_vst2q_v:
return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vst2q_v, E);
case AArch64::BI__builtin_neon_vst3_v:
return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vst3_v, E);
case AArch64::BI__builtin_neon_vst3q_v:
return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vst3q_v, E);
case AArch64::BI__builtin_neon_vst4_v:
return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vst4_v, E);
case AArch64::BI__builtin_neon_vst4q_v:
return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vst4q_v, E);
// AArch64-only builtins
case AArch64::BI__builtin_neon_vfma_lane_v:
case AArch64::BI__builtin_neon_vfmaq_laneq_v: {

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