forked from OSchip/llvm-project
There is only one case where GVRequiresExtraLoad returns true for calls:
split its handling out to PCRelGVRequiresExtraLoad, and simplify code based on this. llvm-svn: 75230
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@ -589,15 +589,15 @@ bool X86FastISel::X86SelectCallAddress(Value *V, X86AddressMode &AM) {
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// Can't handle TLS yet.
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if (GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV))
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if (GVar->isThreadLocal())
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if (GVar->isThreadLocal() || GVar->hasDLLImportLinkage())
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return false;
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// Okay, we've committed to selecting this global. Set up the basic address.
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AM.GV = GV;
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// If the ABI doesn't require an extra load, return a direct reference to
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// the global.
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if (!Subtarget->GVRequiresExtraLoad(GV, TM, true)) {
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// No ABI requires an extra load for anything other than DLLImport, which
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// we rejected above. Return a direct reference to the global.
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assert(!Subtarget->PCRelGVRequiresExtraLoad(GV, TM));
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if (Subtarget->isPICStyleRIPRel()) {
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// Use rip-relative addressing if we can. Above we verified that the
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// base and index registers are unused.
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@ -613,68 +613,6 @@ bool X86FastISel::X86SelectCallAddress(Value *V, X86AddressMode &AM) {
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return true;
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}
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// Check to see if we've already materialized this stub loaded value into a
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// register in this block. If so, just reuse it.
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DenseMap<const Value*, unsigned>::iterator I = LocalValueMap.find(V);
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unsigned LoadReg;
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if (I != LocalValueMap.end() && I->second != 0) {
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LoadReg = I->second;
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} else {
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// Issue load from stub.
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unsigned Opc = 0;
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const TargetRegisterClass *RC = NULL;
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X86AddressMode StubAM;
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StubAM.Base.Reg = AM.Base.Reg;
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StubAM.GV = GV;
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if (TLI.getPointerTy() == MVT::i64) {
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Opc = X86::MOV64rm;
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RC = X86::GR64RegisterClass;
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if (Subtarget->isPICStyleRIPRel()) {
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StubAM.GVOpFlags = X86II::MO_GOTPCREL;
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StubAM.Base.Reg = X86::RIP;
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}
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} else {
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Opc = X86::MOV32rm;
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RC = X86::GR32RegisterClass;
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if (Subtarget->isPICStyleGOT())
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StubAM.GVOpFlags = X86II::MO_GOT;
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else if (Subtarget->isPICStyleStub()) {
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// In darwin, we have multiple different stub types, and we have both
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// PIC and -mdynamic-no-pic. Determine whether we have a stub
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// reference and/or whether the reference is relative to the PIC base
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// or not.
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bool IsPIC = TM.getRelocationModel() == Reloc::PIC_;
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if (!GV->hasHiddenVisibility()) {
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// Non-hidden $non_lazy_ptr reference.
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StubAM.GVOpFlags = IsPIC ? X86II::MO_DARWIN_NONLAZY_PIC_BASE :
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X86II::MO_DARWIN_NONLAZY;
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} else {
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// Hidden $non_lazy_ptr reference.
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StubAM.GVOpFlags = IsPIC ? X86II::MO_DARWIN_HIDDEN_NONLAZY_PIC_BASE:
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X86II::MO_DARWIN_HIDDEN_NONLAZY;
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}
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}
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}
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LoadReg = createResultReg(RC);
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addFullAddress(BuildMI(MBB, DL, TII.get(Opc), LoadReg), StubAM);
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// Prevent loading GV stub multiple times in same MBB.
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LocalValueMap[V] = LoadReg;
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}
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// Now construct the final address. Note that the Disp, Scale,
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// and Index values may already be set here.
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AM.Base.Reg = LoadReg;
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AM.GV = 0;
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return true;
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}
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// If all else fails, try to materialize the value in a register.
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if (!AM.GV || !Subtarget->isPICStyleRIPRel()) {
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if (AM.Base.Reg == 0) {
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@ -1902,7 +1902,7 @@ SDValue X86TargetLowering::LowerCALL(SDValue Op, SelectionDAG &DAG) {
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// We should use extra load for direct calls to dllimported functions in
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// non-JIT mode.
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GlobalValue *GV = G->getGlobal();
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if (!Subtarget->GVRequiresExtraLoad(GV, getTargetMachine(), true)) {
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if (!Subtarget->PCRelGVRequiresExtraLoad(GV, getTargetMachine())) {
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unsigned char OpFlags = 0;
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// On ELF targets, in both X86-64 and X86-32 mode, direct calls to
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@ -38,8 +38,8 @@ AsmWriterFlavor("x86-asm-syntax", cl::init(X86Subtarget::Unset),
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/// symbols are indirect, loading the value at address GV rather then the
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/// value of GV itself. This means that the GlobalAddress must be in the base
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/// or index register of the address, not the GV offset field.
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bool X86Subtarget::GVRequiresExtraLoad(const GlobalValue* GV,
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const TargetMachine& TM,
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bool X86Subtarget::GVRequiresExtraLoad(const GlobalValue *GV,
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const TargetMachine &TM,
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bool isDirectCall) const {
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// Windows targets only require an extra load for DLLImport linkage values,
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// and they need these regardless of whether we're in PIC mode or not.
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@ -72,6 +72,19 @@ bool X86Subtarget::GVRequiresExtraLoad(const GlobalValue* GV,
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return false;
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}
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/// PCRelGVRequiresExtraLoad - True if accessing the GV from a PC-relative
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/// operand like a call target requires an extra load.
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bool X86Subtarget::PCRelGVRequiresExtraLoad(const GlobalValue *GV,
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const TargetMachine &TM) const {
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// Windows targets only require an extra load for DLLImport linkage values,
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// and they need these regardless of whether we're in PIC mode or not.
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if (isTargetCygMing() || isTargetWindows())
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return GV->hasDLLImportLinkage();
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return false;
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}
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/// True if accessing the GV requires a register. This is a superset of the
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/// cases where GVRequiresExtraLoad is true. Some variations of PIC require
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/// a register, but not an extra load.
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@ -204,10 +204,16 @@ public:
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bool GVRequiresExtraLoad(const GlobalValue* GV, const TargetMachine &TM,
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bool isDirectCall) const;
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/// PCRelGVRequiresExtraLoad - True if accessing the GV from a PC-relative
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/// operand like a call target requires an extra load.
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bool PCRelGVRequiresExtraLoad(const GlobalValue *GV,
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const TargetMachine &TM) const;
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/// True if accessing the GV requires a register. This is a superset of the
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/// cases where GVRequiresExtraLoad is true. Some variations of PIC require
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/// a register, but not an extra load.
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bool GVRequiresRegister(const GlobalValue* GV, const TargetMachine &TM) const;
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bool GVRequiresRegister(const GlobalValue *GV, const TargetMachine &TM) const;
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/// IsLegalToCallImmediateAddr - Return true if the subtarget allows calls
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/// to immediate address.
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