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R600/SI: Refactor local atomics. 

Use patterns that will also match the immediate offset to
match the normal read / writes.

llvm-svn: 210673
This commit is contained in:
Matt Arsenault 2014-06-11 18:08:34 +00:00
parent 7dcc0e6f57
commit 725741004c
4 changed files with 92 additions and 43 deletions
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24
llvm/lib/Target/R600/AMDGPUInstructions.td
View File

@ -232,15 +232,25 @@ def local_load : PatFrag<(ops node:$ptr), (load node:$ptr), [{
return isLocalLoad(dyn_cast<LoadSDNode>(N));
}]>;
def atomic_load_add_local : PatFrag<(ops node:$ptr, node:$value),
(atomic_load_add node:$ptr, node:$value), [{
return dyn_cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::LOCAL_ADDRESS;
class local_binary_atomic_op<SDNode atomic_op> :
PatFrag<(ops node:$ptr, node:$value),
(atomic_op node:$ptr, node:$value), [{
return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::LOCAL_ADDRESS;
}]>;
def atomic_load_sub_local : PatFrag<(ops node:$ptr, node:$value),
(atomic_load_sub node:$ptr, node:$value), [{
return dyn_cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::LOCAL_ADDRESS;
}]>;
def atomic_swap_local : local_binary_atomic_op<atomic_swap>;
def atomic_load_add_local : local_binary_atomic_op<atomic_load_add>;
def atomic_load_sub_local : local_binary_atomic_op<atomic_load_sub>;
def atomic_load_and_local : local_binary_atomic_op<atomic_load_and>;
def atomic_load_or_local : local_binary_atomic_op<atomic_load_or>;
def atomic_load_xor_local : local_binary_atomic_op<atomic_load_xor>;
def atomic_load_nand_local : local_binary_atomic_op<atomic_load_nand>;
def atomic_load_min_local : local_binary_atomic_op<atomic_load_min>;
def atomic_load_max_local : local_binary_atomic_op<atomic_load_max>;
def atomic_load_umin_local : local_binary_atomic_op<atomic_load_umin>;
def atomic_load_umax_local : local_binary_atomic_op<atomic_load_umax>;
def mskor_global : PatFrag<(ops node:$val, node:$ptr),
(AMDGPUstore_mskor node:$val, node:$ptr), [{

17
llvm/lib/Target/R600/SIInstructions.td
View File

@ -2168,11 +2168,20 @@ defm : DSWritePat <DS_WRITE_B16, i32, truncstorei16_local>;
defm : DSWritePat <DS_WRITE_B32, i32, local_store>;
defm : DSWritePat <DS_WRITE_B64, i64, local_store>;
def : Pat <(atomic_load_add_local i32:$ptr, i32:$val),
(DS_ADD_U32_RTN 0, $ptr, $val, 0)>;
multiclass DSAtomicPat<DS inst, ValueType vt, PatFrag frag> {
def : Pat <
(frag (add i32:$ptr, (i32 IMM16bit:$offset)), vt:$value),
(inst (i1 0), $ptr, $value, (as_i16imm $offset))
>;
def : Pat <(atomic_load_sub_local i32:$ptr, i32:$val),
(DS_SUB_U32_RTN 0, $ptr, $val, 0)>;
def : Pat <
(frag i32:$ptr, vt:$val),
(inst 0, $ptr, $val, 0)
>;
}
defm : DSAtomicPat<DS_ADD_U32_RTN, i32, atomic_load_add_local>;
defm : DSAtomicPat<DS_SUB_U32_RTN, i32, atomic_load_sub_local>;
//===----------------------------------------------------------------------===//
// MUBUF Patterns

47
llvm/test/CodeGen/R600/atomic_load_add.ll
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@ -1,23 +1,38 @@
; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=R600-CHECK
; RUN: llc < %s -march=r600 -mcpu=SI -verify-machineinstrs | FileCheck %s --check-prefix=SI-CHECK
; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck %s -check-prefix=SI -check-prefix=FUNC
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s
; R600-CHECK-LABEL: @atomic_add_local
; R600-CHECK: LDS_ADD *
; SI-CHECK-LABEL: @atomic_add_local
; SI-CHECK: DS_ADD_U32_RTN
; FUNC-LABEL: @atomic_add_local
; R600: LDS_ADD *
; SI: DS_ADD_U32_RTN
define void @atomic_add_local(i32 addrspace(3)* %local) {
entry:
%0 = atomicrmw volatile add i32 addrspace(3)* %local, i32 5 seq_cst
%unused = atomicrmw volatile add i32 addrspace(3)* %local, i32 5 seq_cst
ret void
}
; R600-CHECK-LABEL: @atomic_add_ret_local
; R600-CHECK: LDS_ADD_RET *
; SI-CHECK-LABEL: @atomic_add_ret_local
; SI-CHECK: DS_ADD_U32_RTN
define void @atomic_add_ret_local(i32 addrspace(1)* %out, i32 addrspace(3)* %local) {
entry:
%0 = atomicrmw volatile add i32 addrspace(3)* %local, i32 5 seq_cst
store i32 %0, i32 addrspace(1)* %out
; FUNC-LABEL: @atomic_add_local_const_offset
; R600: LDS_ADD *
; SI: DS_ADD_U32_RTN v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x10
define void @atomic_add_local_const_offset(i32 addrspace(3)* %local) {
%gep = getelementptr i32 addrspace(3)* %local, i32 4
%val = atomicrmw volatile add i32 addrspace(3)* %gep, i32 5 seq_cst
ret void
}
; FUNC-LABEL: @atomic_add_ret_local
; R600: LDS_ADD_RET *
; SI: DS_ADD_U32_RTN
define void @atomic_add_ret_local(i32 addrspace(1)* %out, i32 addrspace(3)* %local) {
%val = atomicrmw volatile add i32 addrspace(3)* %local, i32 5 seq_cst
store i32 %val, i32 addrspace(1)* %out
ret void
}
; FUNC-LABEL: @atomic_add_ret_local_const_offset
; R600: LDS_ADD_RET *
; SI: DS_ADD_U32_RTN v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x14
define void @atomic_add_ret_local_const_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %local) {
%gep = getelementptr i32 addrspace(3)* %local, i32 5
%val = atomicrmw volatile add i32 addrspace(3)* %gep, i32 5 seq_cst
store i32 %val, i32 addrspace(1)* %out
ret void
}

47
llvm/test/CodeGen/R600/atomic_load_sub.ll
View File

@ -1,23 +1,38 @@
; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=R600-CHECK
; RUN: llc < %s -march=r600 -mcpu=SI -verify-machineinstrs | FileCheck %s --check-prefix=SI-CHECK
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s
; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; R600-CHECK-LABEL: @atomic_sub_local
; R600-CHECK: LDS_SUB *
; SI-CHECK-LABEL: @atomic_sub_local
; SI-CHECK: DS_SUB_U32_RTN
; FUNC-LABEL: @atomic_sub_local
; R600: LDS_SUB *
; SI: DS_SUB_U32_RTN
define void @atomic_sub_local(i32 addrspace(3)* %local) {
entry:
%0 = atomicrmw volatile sub i32 addrspace(3)* %local, i32 5 seq_cst
%unused = atomicrmw volatile sub i32 addrspace(3)* %local, i32 5 seq_cst
ret void
}
; R600-CHECK-LABEL: @atomic_sub_ret_local
; R600-CHECK: LDS_SUB_RET *
; SI-CHECK-LABEL: @atomic_sub_ret_local
; SI-CHECK: DS_SUB_U32_RTN
define void @atomic_sub_ret_local(i32 addrspace(1)* %out, i32 addrspace(3)* %local) {
entry:
%0 = atomicrmw volatile sub i32 addrspace(3)* %local, i32 5 seq_cst
store i32 %0, i32 addrspace(1)* %out
; FUNC-LABEL: @atomic_sub_local_const_offset
; R600: LDS_SUB *
; SI: DS_SUB_U32_RTN v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x10
define void @atomic_sub_local_const_offset(i32 addrspace(3)* %local) {
%gep = getelementptr i32 addrspace(3)* %local, i32 4
%val = atomicrmw volatile sub i32 addrspace(3)* %gep, i32 5 seq_cst
ret void
}
; FUNC-LABEL: @atomic_sub_ret_local
; R600: LDS_SUB_RET *
; SI: DS_SUB_U32_RTN
define void @atomic_sub_ret_local(i32 addrspace(1)* %out, i32 addrspace(3)* %local) {
%val = atomicrmw volatile sub i32 addrspace(3)* %local, i32 5 seq_cst
store i32 %val, i32 addrspace(1)* %out
ret void
}
; FUNC-LABEL: @atomic_sub_ret_local_const_offset
; R600: LDS_SUB_RET *
; SI: DS_SUB_U32_RTN v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x14
define void @atomic_sub_ret_local_const_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %local) {
%gep = getelementptr i32 addrspace(3)* %local, i32 5
%val = atomicrmw volatile sub i32 addrspace(3)* %gep, i32 5 seq_cst
store i32 %val, i32 addrspace(1)* %out
ret void
}