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increase the accuracy of register pressure computation in the presence of dead definitions by using live intervals, if available, to identify dead definitions and proceed accordingly. 

llvm-svn: 194286
This commit is contained in:
Pedro Artigas 2013-11-08 22:46:28 +00:00
parent 2fca51d3b4
commit 71f87cb33a
2 changed files with 36 additions and 16 deletions
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19
llvm/lib/CodeGen/MachineVerifier.cpp
View File

@ -1096,6 +1096,14 @@ void MachineVerifier::checkLiveness(const MachineOperand *MO, unsigned MONum) {
report("No live segment at def", MO, MONum);
*OS << DefIdx << " is not live in " << LI << '\n';
}
// Check that, if the dead def flag is present, LiveInts agree.
if (MO->isDead()) {
LiveQueryResult LRQ = LI.Query(DefIdx);
if (!LRQ.isDeadDef()) {
report("Live range continues after dead def flag", MO, MONum);
*OS << "Live range: " << LI << '\n';
}
}
} else {
report("Virtual register has no Live interval", MO, MONum);
}
@ -1517,22 +1525,13 @@ void MachineVerifier::verifyLiveRangeSegment(const LiveRange &LR,
// A live segment can end with either a redefinition, a kill flag on a
// use, or a dead flag on a def.
bool hasRead = false;
bool hasDeadDef = false;
for (ConstMIBundleOperands MOI(MI); MOI.isValid(); ++MOI) {
if (!MOI->isReg() || MOI->getReg() != Reg)
continue;
if (MOI->readsReg())
hasRead = true;
if (MOI->isDef() && MOI->isDead())
hasDeadDef = true;
}
if (S.end.isDead()) {
if (!hasDeadDef) {
report("Instruction doesn't have a dead def operand", MI);
*OS << S << " in " << LR << '\n';
}
} else {
if (!S.end.isDead()) {
if (!hasRead) {
report("Instruction ending live segment doesn't read the register", MI);
*OS << S << " in " << LR << '\n';

33
llvm/lib/CodeGen/RegisterPressure.cpp
View File

@ -498,10 +498,20 @@ bool RegPressureTracker::recede(SmallVectorImpl<unsigned> *LiveUses,
// TODO: consider earlyclobbers?
for (unsigned i = 0, e = RegOpers.Defs.size(); i < e; ++i) {
unsigned Reg = RegOpers.Defs[i];
if (LiveRegs.erase(Reg))
decreaseRegPressure(Reg);
else
discoverLiveOut(Reg);
bool DeadDef = false;
if (RequireIntervals) {
const LiveRange *LR = getLiveRange(Reg);
if (LR) {
LiveQueryResult LRQ = LR->Query(SlotIdx);
DeadDef = LRQ.isDeadDef();
}
}
if (!DeadDef) {
if (LiveRegs.erase(Reg))
decreaseRegPressure(Reg);
else
discoverLiveOut(Reg);
}
}
// Generate liveness for uses.
@ -702,8 +712,19 @@ void RegPressureTracker::bumpUpwardPressure(const MachineInstr *MI) {
// Kill liveness at live defs.
for (unsigned i = 0, e = RegOpers.Defs.size(); i < e; ++i) {
unsigned Reg = RegOpers.Defs[i];
if (!containsReg(RegOpers.Uses, Reg))
decreaseRegPressure(Reg);
bool DeadDef = false;
if (RequireIntervals) {
const LiveRange *LR = getLiveRange(Reg);
if (LR) {
SlotIndex SlotIdx = LIS->getInstructionIndex(MI);
LiveQueryResult LRQ = LR->Query(SlotIdx);
DeadDef = LRQ.isDeadDef();
}
}
if (!DeadDef) {
if (!containsReg(RegOpers.Uses, Reg))
decreaseRegPressure(Reg);
}
}
// Generate liveness for uses.
for (unsigned i = 0, e = RegOpers.Uses.size(); i < e; ++i) {