forked from OSchip/llvm-project
Add the ability to promote legal integer VAARGs. This is required for the PPC64 SVR4 ABI.
llvm-svn: 153372
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@ -718,10 +718,15 @@ void SelectionDAGLegalize::LegalizeOp(SDNode *Node) {
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case ISD::INTRINSIC_W_CHAIN:
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case ISD::INTRINSIC_WO_CHAIN:
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case ISD::INTRINSIC_VOID:
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case ISD::VAARG:
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case ISD::STACKSAVE:
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Action = TLI.getOperationAction(Node->getOpcode(), MVT::Other);
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break;
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case ISD::VAARG:
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Action = TLI.getOperationAction(Node->getOpcode(),
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Node->getValueType(0));
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if (Action != TargetLowering::Promote)
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Action = TLI.getOperationAction(Node->getOpcode(), MVT::Other);
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break;
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case ISD::SINT_TO_FP:
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case ISD::UINT_TO_FP:
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case ISD::EXTRACT_VECTOR_ELT:
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@ -3528,6 +3533,33 @@ void SelectionDAGLegalize::PromoteNode(SDNode *Node) {
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Node->getOpcode() == ISD::SINT_TO_FP, dl);
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Results.push_back(Tmp1);
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break;
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case ISD::VAARG: {
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SDValue Chain = Node->getOperand(0); // Get the chain.
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SDValue Ptr = Node->getOperand(1); // Get the pointer.
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unsigned TruncOp;
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if (OVT.isVector()) {
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TruncOp = ISD::BITCAST;
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} else {
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assert(OVT.isInteger()
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&& "VAARG promotion is supported only for vectors or integer types");
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TruncOp = ISD::TRUNCATE;
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}
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// Perform the larger operation, then convert back
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Tmp1 = DAG.getVAArg(NVT, dl, Chain, Ptr, Node->getOperand(2),
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Node->getConstantOperandVal(3));
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Chain = Tmp1.getValue(1);
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Tmp2 = DAG.getNode(TruncOp, dl, OVT, Tmp1);
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// Modified the chain result - switch anything that used the old chain to
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// use the new one.
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DAG.ReplaceAllUsesOfValueWith(SDValue(Node, 0), Tmp2);
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DAG.ReplaceAllUsesOfValueWith(SDValue(Node, 1), Chain);
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ReplacedNode(Node);
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break;
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}
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case ISD::AND:
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case ISD::OR:
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case ISD::XOR: {
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